Re: [PATCH v15 10/10] arm64: dts: qcom: sa8775p: Add CTCU and ETR nodes

[Jie Gan <quic_jiegan@quicinc.com>]

On 3/4/2025 8:28 PM, Suzuki K Poulose wrote:
> On 03/03/2025 03:29, Jie Gan wrote:
>> Add CTCU and ETR nodes in DT to enable related functionalities.
>>
>> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
>> Signed-off-by: Jie Gan <quic_jiegan@quicinc.com>
> 
> Assuming this goes via the soc tree,
> 
> Acked-by: Suzuki K Poulose <suzuki.poulose@arm.com>

Hi Bjorn, Konrad

Gentle ping.

The driver part has applied. BTW, I found this patch has a conflict on 
tag next-20250307, do you need me to send a new rebased patch?

Thanks,
Jie

> 
> 
>> ---
>>   arch/arm64/boot/dts/qcom/sa8775p.dtsi | 153 ++++++++++++++++++++++++++
>>   1 file changed, 153 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/ 
>> dts/qcom/sa8775p.dtsi
>> index 3394ae2d1300..31aa94d2a043 100644
>> --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
>> @@ -2429,6 +2429,35 @@ crypto: crypto@1dfa000 {
>>               interconnect-names = "memory";
>>           };
>> +        ctcu@4001000 {
>> +            compatible = "qcom,sa8775p-ctcu";
>> +            reg = <0x0 0x04001000 0x0 0x1000>;
>> +
>> +            clocks = <&aoss_qmp>;
>> +            clock-names = "apb";
>> +
>> +            in-ports {
>> +                #address-cells = <1>;
>> +                #size-cells = <0>;
>> +
>> +                port@0 {
>> +                    reg = <0>;
>> +
>> +                    ctcu_in0: endpoint {
>> +                        remote-endpoint = <&etr0_out>;
>> +                    };
>> +                };
>> +
>> +                port@1 {
>> +                    reg = <1>;
>> +
>> +                    ctcu_in1: endpoint {
>> +                        remote-endpoint = <&etr1_out>;
>> +                    };
>> +                };
>> +            };
>> +        };
>> +
>>           stm: stm@4002000 {
>>               compatible = "arm,coresight-stm", "arm,primecell";
>>               reg = <0x0 0x4002000 0x0 0x1000>,
>> @@ -2633,6 +2662,122 @@ qdss_funnel_in1: endpoint {
>>               };
>>           };
>> +        replicator@4046000 {
>> +            compatible = "arm,coresight-dynamic-replicator", 
>> "arm,primecell";
>> +            reg = <0x0 0x04046000 0x0 0x1000>;
>> +
>> +            clocks = <&aoss_qmp>;
>> +            clock-names = "apb_pclk";
>> +
>> +            in-ports {
>> +                port {
>> +                    qdss_rep_in: endpoint {
>> +                        remote-endpoint = <&swao_rep_out0>;
>> +                    };
>> +                };
>> +            };
>> +
>> +            out-ports {
>> +                port {
>> +                    qdss_rep_out0: endpoint {
>> +                        remote-endpoint = <&etr_rep_in>;
>> +                    };
>> +                };
>> +            };
>> +        };
>> +
>> +        tmc_etr: tmc@4048000 {
>> +            compatible = "arm,coresight-tmc", "arm,primecell";
>> +            reg = <0x0 0x04048000 0x0 0x1000>;
>> +
>> +            clocks = <&aoss_qmp>;
>> +            clock-names = "apb_pclk";
>> +            iommus = <&apps_smmu 0x04c0 0x00>;
>> +
>> +            arm,scatter-gather;
>> +
>> +            in-ports {
>> +                port {
>> +                    etr0_in: endpoint {
>> +                        remote-endpoint = <&etr_rep_out0>;
>> +                    };
>> +                };
>> +            };
>> +
>> +            out-ports {
>> +                port {
>> +                    etr0_out: endpoint {
>> +                        remote-endpoint = <&ctcu_in0>;
>> +                    };
>> +                };
>> +            };
>> +        };
>> +
>> +        replicator@404e000 {
>> +            compatible = "arm,coresight-dynamic-replicator", 
>> "arm,primecell";
>> +            reg = <0x0 0x0404e000 0x0 0x1000>;
>> +
>> +            clocks = <&aoss_qmp>;
>> +            clock-names = "apb_pclk";
>> +
>> +            in-ports {
>> +                port {
>> +                    etr_rep_in: endpoint {
>> +                        remote-endpoint = <&qdss_rep_out0>;
>> +                    };
>> +                };
>> +            };
>> +
>> +            out-ports {
>> +                #address-cells = <1>;
>> +                #size-cells = <0>;
>> +
>> +                port@0 {
>> +                    reg = <0>;
>> +
>> +                    etr_rep_out0: endpoint {
>> +                        remote-endpoint = <&etr0_in>;
>> +                    };
>> +                };
>> +
>> +                port@1 {
>> +                    reg = <1>;
>> +
>> +                    etr_rep_out1: endpoint {
>> +                        remote-endpoint = <&etr1_in>;
>> +                    };
>> +                };
>> +            };
>> +        };
>> +
>> +        tmc_etr1: tmc@404f000 {
>> +            compatible = "arm,coresight-tmc", "arm,primecell";
>> +            reg = <0x0 0x0404f000 0x0 0x1000>;
>> +
>> +            clocks = <&aoss_qmp>;
>> +            clock-names = "apb_pclk";
>> +            iommus = <&apps_smmu 0x04a0 0x40>;
>> +
>> +            arm,scatter-gather;
>> +            arm,buffer-size = <0x400000>;
>> +
>> +            in-ports {
>> +                port {
>> +                    etr1_in: endpoint {
>> +                        remote-endpoint = <&etr_rep_out1>;
>> +                    };
>> +                };
>> +            };
>> +
>> +            out-ports {
>> +                port {
>> +                    etr1_out: endpoint {
>> +                        remote-endpoint = <&ctcu_in1>;
>> +                    };
>> +                };
>> +            };
>> +        };
>> +
>>           funnel@4b04000 {
>>               compatible = "arm,coresight-dynamic-funnel", 
>> "arm,primecell";
>>               reg = <0x0 0x4b04000 0x0 0x1000>;
>> @@ -2708,6 +2853,14 @@ out-ports {
>>                   #address-cells = <1>;
>>                   #size-cells = <0>;
>> +                port@0 {
>> +                    reg = <0>;
>> +
>> +                    swao_rep_out0: endpoint {
>> +                        remote-endpoint = <&qdss_rep_in>;
>> +                    };
>> +                };
>> +
>>                   port@1 {
>>                       reg = <1>;
>>                       swao_rep_out1: endpoint {
>