From: <Ryan.Wanner@microchip.com>
To: <lee@kernel.org>, <robh@kernel.org>, <krzk+dt@kernel.org>,
<conor+dt@kernel.org>, <claudiu.beznea@tuxon.dev>,
<sre@kernel.org>, <nicolas.ferre@microchip.com>,
<alexandre.belloni@bootlin.com>, <p.zabel@pengutronix.de>
Cc: <linux@armlinux.org.uk>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <linux-pm@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-rtc@vger.kernel.org>,
"Ryan Wanner" <Ryan.Wanner@microchip.com>
Subject: [PATCH v3 12/21] ARM: at91: pm: Enable ULP0/ULP1 for SAMA7D65
Date: Thu, 27 Feb 2025 08:51:59 -0700 [thread overview]
Message-ID: <2ac0832f6ede17a5c111ede09b44b8a126e33e36.1740671156.git.Ryan.Wanner@microchip.com> (raw)
In-Reply-To: <cover.1740671156.git.Ryan.Wanner@microchip.com>
From: Ryan Wanner <Ryan.Wanner@microchip.com>
New clocks are saved to enable ULP0/ULP1 for SAMA7D65 because this SoC has a
total of 9 main clocks that need to be saved for ULP0/ULP1 mode.
Add mcks member to at91_pm_data, this will be used to determine
how many main clocks need to be saved. In the pm_mcks variable will also make
sure that no unnecessary clock settings are written during
mck_ps_restore.
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
---
arch/arm/mach-at91/pm.c | 11 ++-
arch/arm/mach-at91/pm.h | 1 +
arch/arm/mach-at91/pm_data-offsets.c | 2 +
arch/arm/mach-at91/pm_suspend.S | 101 ++++++++++++++++++++++++---
4 files changed, 105 insertions(+), 10 deletions(-)
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index d82a507bc8da..ab51ca03632b 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach-at91/pm.c
@@ -1340,6 +1340,7 @@ struct pmc_info {
unsigned long uhp_udp_mask;
unsigned long mckr;
unsigned long version;
+ unsigned long mcks;
};
static const struct pmc_info pmc_infos[] __initconst = {
@@ -1371,6 +1372,13 @@ static const struct pmc_info pmc_infos[] __initconst = {
{
.mckr = 0x28,
.version = AT91_PMC_V2,
+ .mcks = 4,
+ },
+ {
+ .uhp_udp_mask = AT91SAM926x_PMC_UHP,
+ .mckr = 0x28,
+ .version = AT91_PMC_V2,
+ .mcks = 9,
},
};
@@ -1389,7 +1397,7 @@ static const struct of_device_id atmel_pmc_ids[] __initconst = {
{ .compatible = "atmel,sama5d2-pmc", .data = &pmc_infos[1] },
{ .compatible = "microchip,sam9x60-pmc", .data = &pmc_infos[4] },
{ .compatible = "microchip,sam9x7-pmc", .data = &pmc_infos[4] },
- { .compatible = "microchip,sama7d65-pmc", .data = &pmc_infos[4] },
+ { .compatible = "microchip,sama7d65-pmc", .data = &pmc_infos[6] },
{ .compatible = "microchip,sama7g5-pmc", .data = &pmc_infos[5] },
{ /* sentinel */ },
};
@@ -1460,6 +1468,7 @@ static void __init at91_pm_init(void (*pm_idle)(void))
soc_pm.data.uhp_udp_mask = pmc->uhp_udp_mask;
soc_pm.data.pmc_mckr_offset = pmc->mckr;
soc_pm.data.pmc_version = pmc->version;
+ soc_pm.data.pmc_mcks = pmc->mcks;
if (pm_idle)
arm_pm_idle = pm_idle;
diff --git a/arch/arm/mach-at91/pm.h b/arch/arm/mach-at91/pm.h
index 53bdc9000e44..50c3a425d140 100644
--- a/arch/arm/mach-at91/pm.h
+++ b/arch/arm/mach-at91/pm.h
@@ -39,6 +39,7 @@ struct at91_pm_data {
unsigned int suspend_mode;
unsigned int pmc_mckr_offset;
unsigned int pmc_version;
+ unsigned int pmc_mcks;
};
#endif
diff --git a/arch/arm/mach-at91/pm_data-offsets.c b/arch/arm/mach-at91/pm_data-offsets.c
index 40bd4e8fe40a..0ca5da66dc26 100644
--- a/arch/arm/mach-at91/pm_data-offsets.c
+++ b/arch/arm/mach-at91/pm_data-offsets.c
@@ -18,6 +18,8 @@ int main(void)
pmc_mckr_offset));
DEFINE(PM_DATA_PMC_VERSION, offsetof(struct at91_pm_data,
pmc_version));
+ DEFINE(PM_DATA_PMC_MCKS, offsetof(struct at91_pm_data,
+ pmc_mcks));
return 0;
}
diff --git a/arch/arm/mach-at91/pm_suspend.S b/arch/arm/mach-at91/pm_suspend.S
index e5869cca5e79..e23b86834096 100644
--- a/arch/arm/mach-at91/pm_suspend.S
+++ b/arch/arm/mach-at91/pm_suspend.S
@@ -814,18 +814,20 @@ sr_dis_exit:
.endm
/**
- * at91_mckx_ps_enable: save MCK1..4 settings and switch it to main clock
+ * at91_mckx_ps_enable: save MCK settings and switch it to main clock
*
- * Side effects: overwrites tmp1, tmp2
+ * Side effects: overwrites tmp1, tmp2, tmp3
*/
.macro at91_mckx_ps_enable
#ifdef CONFIG_SOC_SAMA7
ldr pmc, .pmc_base
+ ldr tmp3, .mcks
- /* There are 4 MCKs we need to handle: MCK1..4 */
+ /* Start at MCK1 and go until MCKs */
mov tmp1, #1
-e_loop: cmp tmp1, #5
- beq e_done
+e_loop:
+ cmp tmp1, tmp3
+ bgt e_done
/* Write MCK ID to retrieve the settings. */
str tmp1, [pmc, #AT91_PMC_MCR_V2]
@@ -850,7 +852,37 @@ e_save_mck3:
b e_ps
e_save_mck4:
+ cmp tmp1, #4
+ bne e_save_mck5
str tmp2, .saved_mck4
+ b e_ps
+
+e_save_mck5:
+ cmp tmp1, #5
+ bne e_save_mck6
+ str tmp2, .saved_mck5
+ b e_ps
+
+e_save_mck6:
+ cmp tmp1, #6
+ bne e_save_mck7
+ str tmp2, .saved_mck6
+ b e_ps
+
+e_save_mck7:
+ cmp tmp1, #7
+ bne e_save_mck8
+ str tmp2, .saved_mck7
+ b e_ps
+
+e_save_mck8:
+ cmp tmp1, #8
+ bne e_save_mck9
+ str tmp2, .saved_mck8
+ b e_ps
+
+e_save_mck9:
+ str tmp2, .saved_mck9
e_ps:
/* Use CSS=MAINCK and DIV=1. */
@@ -870,18 +902,20 @@ e_done:
.endm
/**
- * at91_mckx_ps_restore: restore MCK1..4 settings
+ * at91_mckx_ps_restore: restore MCKx settings
*
* Side effects: overwrites tmp1, tmp2
*/
.macro at91_mckx_ps_restore
#ifdef CONFIG_SOC_SAMA7
ldr pmc, .pmc_base
+ ldr tmp2, .mcks
- /* There are 4 MCKs we need to handle: MCK1..4 */
+ /* Start from MCK1 and go up to MCKs */
mov tmp1, #1
-r_loop: cmp tmp1, #5
- beq r_done
+r_loop:
+ cmp tmp1, tmp2
+ bgt r_done
r_save_mck1:
cmp tmp1, #1
@@ -902,7 +936,37 @@ r_save_mck3:
b r_ps
r_save_mck4:
+ cmp tmp1, #4
+ bne r_save_mck5
ldr tmp2, .saved_mck4
+ b r_ps
+
+r_save_mck5:
+ cmp tmp1, #5
+ bne r_save_mck6
+ ldr tmp2, .saved_mck5
+ b r_ps
+
+r_save_mck6:
+ cmp tmp1, #6
+ bne r_save_mck7
+ ldr tmp2, .saved_mck6
+ b r_ps
+
+r_save_mck7:
+ cmp tmp1, #7
+ bne r_save_mck8
+ ldr tmp2, .saved_mck7
+ b r_ps
+
+r_save_mck8:
+ cmp tmp1, #8
+ bne r_save_mck9
+ ldr tmp2, .saved_mck8
+ b r_ps
+
+r_save_mck9:
+ ldr tmp2, .saved_mck9
r_ps:
/* Write MCK ID to retrieve the settings. */
@@ -921,6 +985,7 @@ r_ps:
wait_mckrdy tmp1
add tmp1, tmp1, #1
+ ldr tmp2, .mcks
b r_loop
r_done:
#endif
@@ -1045,6 +1110,10 @@ ENTRY(at91_pm_suspend_in_sram)
str tmp1, .memtype
ldr tmp1, [r0, #PM_DATA_MODE]
str tmp1, .pm_mode
+#ifdef CONFIG_SOC_SAMA7
+ ldr tmp1, [r0, #PM_DATA_PMC_MCKS]
+ str tmp1, .mcks
+#endif
/*
* ldrne below are here to preload their address in the TLB as access
@@ -1132,6 +1201,10 @@ ENDPROC(at91_pm_suspend_in_sram)
.word 0
.pmc_version:
.word 0
+#ifdef CONFIG_SOC_SAMA7
+.mcks:
+ .word 0
+#endif
.saved_mckr:
.word 0
.saved_pllar:
@@ -1155,6 +1228,16 @@ ENDPROC(at91_pm_suspend_in_sram)
.word 0
.saved_mck4:
.word 0
+.saved_mck5:
+ .word 0
+.saved_mck6:
+ .word 0
+.saved_mck7:
+ .word 0
+.saved_mck8:
+ .word 0
+.saved_mck9:
+ .word 0
#endif
ENTRY(at91_pm_suspend_in_sram_sz)
--
2.43.0
next prev parent reply other threads:[~2025-02-27 15:53 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-27 15:51 [PATCH v3 00/21] Enable Power Modes Support for SAMA7D65 SoC Ryan.Wanner
2025-02-27 15:51 ` [PATCH v3 01/21] dt-bindings: mfd: syscon: add microchip,sama7d65-ddr3phy Ryan.Wanner
2025-03-21 11:32 ` (subset) " Lee Jones
2025-02-27 15:51 ` [PATCH v3 02/21] dt-bindings: mfd: syscon: add microchip,sama7d65-sfrbu Ryan.Wanner
2025-02-28 21:22 ` Rob Herring (Arm)
2025-03-21 11:32 ` (subset) " Lee Jones
2025-02-27 15:51 ` [PATCH v3 03/21] dt-bindings: sram: Add microchip,sama7d65-sram Ryan.Wanner
2025-02-27 15:51 ` [PATCH v3 04/21] dt-bindings: power: reset: atmel,sama5d2-shdwc: Add microchip,sama7d65-shdwc Ryan.Wanner
2025-02-27 15:51 ` [PATCH v3 05/21] dt-bindings: reset: atmel,at91sam9260-reset: add microchip,sama7d65-rstc Ryan.Wanner
2025-02-27 15:51 ` [PATCH v3 06/21] dt-bindings: rtc: at91rm9200: add microchip,sama7d65-rtc Ryan.Wanner
2025-02-28 21:22 ` Rob Herring (Arm)
2025-02-27 15:51 ` [PATCH v3 07/21] dt-bindings: at91rm9260-rtt: add microchip,sama7d65-rtt Ryan.Wanner
2025-02-28 21:23 ` Rob Herring (Arm)
2025-02-27 15:51 ` [PATCH v3 08/21] ARM: at91: Add PM support to sama7d65 Ryan.Wanner
2025-03-03 8:26 ` Claudiu Beznea
2025-02-27 15:51 ` [PATCH v3 09/21] ARM: at91: pm: fix at91_suspend_finish for ZQ calibration Ryan.Wanner
2025-02-27 15:51 ` [PATCH v3 10/21] ARM: at91: pm: add DT compatible support for sama7d65 Ryan.Wanner
2025-03-03 8:37 ` claudiu beznea (tuxon)
2025-02-27 15:51 ` [PATCH v3 11/21] ARM: at91: PM: Add Backup mode for SAMA7D65 Ryan.Wanner
2025-03-03 8:37 ` claudiu beznea (tuxon)
2025-02-27 15:51 ` Ryan.Wanner [this message]
2025-02-27 15:52 ` [PATCH v3 13/21] power: reset: at91-sama5d2_shdwc: Add sama7d65 PMC Ryan.Wanner
2025-02-27 15:52 ` [PATCH v3 14/21] ARM: dts: microchip: sama7d65: Add SRAM and DRAM components support Ryan.Wanner
2025-03-03 8:28 ` Claudiu Beznea
2025-02-27 15:52 ` [PATCH v3 15/21] ARM: dts: microchip: sama7d65: Add Reset Controller to sama7d65 SoC Ryan.Wanner
2025-02-27 15:52 ` [PATCH v3 16/21] ARM: dts: microchip: sama7d65: Add Shutdown controller support Ryan.Wanner
2025-02-27 15:52 ` [PATCH v3 17/21] ARM: dts: microchip: sama7d65: Add RTT and GPBR Support for sama7d65 SoC Ryan.Wanner
2025-03-03 8:28 ` Claudiu Beznea
2025-03-03 8:38 ` claudiu beznea (tuxon)
2025-02-27 15:52 ` [PATCH v3 18/21] ARM: dts: microchip: sama7d65: Add RTC support for sama7d65 Ryan.Wanner
2025-02-27 15:52 ` [PATCH v3 19/21] ARM: dts: microchip: sama7d65: Add SFRBU support to sama7d65 Ryan.Wanner
2025-02-27 15:52 ` [PATCH v3 20/21] ARM: dts: microchip: sama7d65: Enable shutdown controller Ryan.Wanner
2025-02-27 15:52 ` [PATCH v3 21/21] ARM: dts: microchip: sama7d65: Add RTT timer to curiosity board Ryan.Wanner
2025-02-28 14:23 ` [PATCH v3 00/21] Enable Power Modes Support for SAMA7D65 SoC Rob Herring (Arm)
2025-03-03 8:40 ` Claudiu Beznea
2025-03-05 17:39 ` Ryan Wanner
2025-03-08 0:38 ` (subset) " Sebastian Reichel
2025-03-13 16:42 ` Lee Jones
2025-03-17 19:29 ` Ryan.Wanner
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=2ac0832f6ede17a5c111ede09b44b8a126e33e36.1740671156.git.Ryan.Wanner@microchip.com \
--to=ryan.wanner@microchip.com \
--cc=alexandre.belloni@bootlin.com \
--cc=claudiu.beznea@tuxon.dev \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=krzk+dt@kernel.org \
--cc=lee@kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pm@vger.kernel.org \
--cc=linux-rtc@vger.kernel.org \
--cc=linux@armlinux.org.uk \
--cc=nicolas.ferre@microchip.com \
--cc=p.zabel@pengutronix.de \
--cc=robh@kernel.org \
--cc=sre@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®