From: Siddharth Vadapalli <s-vadapalli@ti.com>
To: Rob Herring <robh@kernel.org>
Cc: <davem@davemloft.net>, <edumazet@google.com>, <kuba@kernel.org>,
<pabeni@redhat.com>, <krzysztof.kozlowski+dt@linaro.org>,
<linux@armlinux.org.uk>, <vladimir.oltean@nxp.com>,
<grygorii.strashko@ti.com>, <vigneshr@ti.com>, <nsekhar@ti.com>,
<netdev@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <kishon@ti.com>
Subject: Re: [PATCH v2 1/3] dt-bindings: net: ti: k3-am654-cpsw-nuss: Update bindings for J7200 CPSW5G
Date: Mon, 6 Jun 2022 11:50:56 +0530 [thread overview]
Message-ID: <2c72a658-9427-b7ab-08ef-b78f51cd151b@ti.com> (raw)
In-Reply-To: <20220605224343.GA3657277-robh@kernel.org>
Hello Rob,
On 06/06/22 04:13, Rob Herring wrote:
> On Thu, Jun 02, 2022 at 05:15:56PM +0530, Siddharth Vadapalli wrote:
>> Update bindings for TI K3 J7200 SoC which contains 5 ports (4 external
>> ports) CPSW5G module and add compatible for it.
>>
>> Changes made:
>> - Add new compatible ti,j7200-cpswxg-nuss for CPSW5G.
>> - Extend pattern properties for new compatible.
>> - Change maximum number of CPSW ports to 4 for new compatible.
>>
>> Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
>> ---
>> .../bindings/net/ti,k3-am654-cpsw-nuss.yaml | 140 ++++++++++++------
>> 1 file changed, 98 insertions(+), 42 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml b/Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml
>> index b8281d8be940..ec57bde7ac26 100644
>> --- a/Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml
>> +++ b/Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml
>> @@ -57,6 +57,7 @@ properties:
>> - ti,am654-cpsw-nuss
>> - ti,j721e-cpsw-nuss
>> - ti,am642-cpsw-nuss
>> + - ti,j7200-cpswxg-nuss
>>
>> reg:
>> maxItems: 1
>> @@ -108,48 +109,103 @@ properties:
>> const: 1
>> '#size-cells':
>> const: 0
>> -
>> - patternProperties:
>> - port@[1-2]:
>> - type: object
>> - description: CPSWxG NUSS external ports
>> -
>> - $ref: ethernet-controller.yaml#
>> -
>> - properties:
>> - reg:
>> - minimum: 1
>> - maximum: 2
>> - description: CPSW port number
>> -
>> - phys:
>> - maxItems: 1
>> - description: phandle on phy-gmii-sel PHY
>> -
>> - label:
>> - description: label associated with this port
>> -
>> - ti,mac-only:
>> - $ref: /schemas/types.yaml#/definitions/flag
>> - description:
>> - Specifies the port works in mac-only mode.
>> -
>> - ti,syscon-efuse:
>> - $ref: /schemas/types.yaml#/definitions/phandle-array
>> - items:
>> - - items:
>> - - description: Phandle to the system control device node which
>> - provides access to efuse
>> - - description: offset to efuse registers???
>> - description:
>> - Phandle to the system control device node which provides access
>> - to efuse IO range with MAC addresses
>> -
>> - required:
>> - - reg
>> - - phys
>> -
>> - additionalProperties: false
>> + allOf:
>> + - if:
>> + properties:
>> + compatible:
>> + contains:
>> + enum:
>> + - ti,am654-cpsw-nuss
>> + - ti,j721e-cpsw-nuss
>> + - ti,am642-cpsw-nuss
>> + then:
>> + patternProperties:
>> + port@[1-2]:
>> + type: object
>> + description: CPSWxG NUSS external ports
>> +
>> + $ref: ethernet-controller.yaml#
>> +
>> + properties:
>> + reg:
>> + minimum: 1
>> + maximum: 2
>> + description: CPSW port number
>> +
>> + phys:
>> + maxItems: 1
>> + description: phandle on phy-gmii-sel PHY
>> +
>> + label:
>> + description: label associated with this port
>> +
>> + ti,mac-only:
>> + $ref: /schemas/types.yaml#/definitions/flag
>> + description:
>> + Specifies the port works in mac-only mode.
>> +
>> + ti,syscon-efuse:
>> + $ref: /schemas/types.yaml#/definitions/phandle-array
>> + items:
>> + - items:
>> + - description: Phandle to the system control device node which
>> + provides access to efuse
>> + - description: offset to efuse registers???
>> + description:
>> + Phandle to the system control device node which provides access
>> + to efuse IO range with MAC addresses
>> +
>> + required:
>> + - reg
>> + - phys
>> + - if:
>> + properties:
>> + compatible:
>> + contains:
>> + enum:
>> + - ti,j7200-cpswxg-nuss
>> + then:
>> + patternProperties:
>> + port@[1-4]:
>> + type: object
>> + description: CPSWxG NUSS external ports
>> +
>> + $ref: ethernet-controller.yaml#
>> +
>> + properties:
>> + reg:
>> + minimum: 1
>> + maximum: 4
>> + description: CPSW port number
>> +
>> + phys:
>> + maxItems: 1
>> + description: phandle on phy-gmii-sel PHY
>> +
>> + label:
>> + description: label associated with this port
>> +
>> + ti,mac-only:
>> + $ref: /schemas/types.yaml#/definitions/flag
>> + description:
>> + Specifies the port works in mac-only mode.
>> +
>> + ti,syscon-efuse:
>> + $ref: /schemas/types.yaml#/definitions/phandle-array
>> + items:
>> + - items:
>> + - description: Phandle to the system control device node which
>> + provides access to efuse
>> + - description: offset to efuse registers???
>> + description:
>> + Phandle to the system control device node which provides access
>> + to efuse IO range with MAC addresses
>> +
>> + required:
>> + - reg
>> + - phys
>
> You are now defining the same properties twice. Don't do that. Just add
> an if/then schema restrict port nodes.
Thank you for reviewing the patch. I will fix this and send v3 for this series.
Thanks,
Siddharth.
next prev parent reply other threads:[~2022-06-06 6:21 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-02 11:45 [PATCH v2 0/3] J7200: CPSW5G: Add support for QSGMII mode to am65-cpsw driver Siddharth Vadapalli
2022-06-02 11:45 ` [PATCH v2 1/3] dt-bindings: net: ti: k3-am654-cpsw-nuss: Update bindings for J7200 CPSW5G Siddharth Vadapalli
2022-06-05 22:43 ` Rob Herring
2022-06-06 6:20 ` Siddharth Vadapalli [this message]
2022-06-02 11:45 ` [PATCH v2 2/3] net: ethernet: ti: am65-cpsw: Add support " Siddharth Vadapalli
2022-06-02 11:45 ` [PATCH v2 3/3] net: ethernet: ti: am65-cpsw: Move phy_set_mode_ext() to correct location Siddharth Vadapalli
2022-06-03 2:48 ` [PATCH v2 0/3] J7200: CPSW5G: Add support for QSGMII mode to am65-cpsw driver Jakub Kicinski
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