* [PATCH v6 0/3] arm64: dts: rockchip: Add FriendlyElec NanoPi R28S
@ 2026-09-14 13:35 安容 via B4 Relay
2026-09-14 13:35 ` [PATCH v6 1/3] dt-bindings: arm: " 安容 via B4 Relay
` (2 more replies)
0 siblings, 3 replies; 7+ messages in thread
From: 安容 via B4 Relay @ 2026-09-14 13:35 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner
Cc: devicetree, linux-arm-kernel, linux-rockchip, linux-kernel,
Chukun Pan, Jonas Karlman, jensen, Andrey Korshunov,
Diederik de Haas, Conor Dooley, 安容
The NanoPi R28S is a dual gigabit Ethernet router board based on the
Rockchip RK3528 SoC:
https://wiki.friendlyelec.com/wiki/index.php/NanoPi_R28S
It is closely related to the already supported NanoPi Zero2, sharing
most of its power tree and peripheral routing. Patch 2 therefore moves
the common parts into rk3528-nanopi.dtsi, and patch 3 adds the board on
top of it. The split leaves the NanoPi Zero2 dtb unchanged; I verified
this by comparing the node and property sets of the dtb before and after
the split, which differ only in node order and phandle numbering.
The devicetree was derived from the vendor tree:
https://github.com/friendlyarm/kernel-rockchip/commit/ee640c5344b13a0a317436e2357df01af8268ce7
but with many changes to make it suitable for mainline.
Tested on a metal-case unit without the optional onboard eMMC: boots
from microSD, both Ethernet ports link up at 1000 Mbps, the HYM8563 RTC
registers, and all three LEDs are functional. The USB Type-C connector
registers as a DWC3 UDC in peripheral mode; gadget enumeration against
a USB host was not completed, because that connector is also the 5V
input and a PC port cannot power the board.
The bootloader was U-Boot 2026.07 with a board specific R28S target,
which releases the RGMII PHY reset before Linux starts, so the reset
description in the PHY node is all the kernel needs.
Two things I did not do, because my hardware cannot verify them:
- The AICSemi AIC8800D80 WiFi chip on sdio0 has no upstream driver, so
only the SDIO controller is described.
- The eMMC is described as HS200 rather than the vendor's HS400 with
enhanced strobe, since the board at hand has an unpopulated eMMC
footprint and the faster modes could not be verified.
---
Changes in v6:
- Dropped the coding style patch, and the blank line before "status" in
the new devicetree along with it. Only 18 of the ~2900 "status"
properties in arch/arm64/boot/dts/rockchip are preceded by a blank
line, so the series now does what the rockchip devicetrees do (Jonas
Karlman).
- Listed the NanoPi R28S and the NanoPi Zero2 in a single binding entry,
since they share a devicetree. The entry only changed shape, so I kept
Conor's Acked-by; please shout if that is not fine (Jonas Karlman).
- Kept all USB nodes in the board devicetrees instead of moving the OTG
port into rk3528-nanopi.dtsi, since the NanoPi NEO3 Plus has USB 3.0
and configures it differently (Jonas Karlman).
- Added the serial2 alias for the Bluetooth UART (Jonas Karlman).
- Named the user button pin configuration after its net in the
schematic, GPIO4_B2_USR_BTN (Jonas Karlman).
- Described the SDIO slot more precisely: no-mmc, no-sd and the missing
vmmc-supply. The module's VBAT comes from VCC_3V3 through a ferrite
bead, VDDIO from VCC_1V8 (Jonas Karlman).
- Enabled DMA on uart2 with dma-names (Jonas Karlman).
- Kept dr_mode = "peripheral" and said why in a comment. The Type-C port
is the 5V input: both CC pins have a 5.1k pull-down (R3811, R3812),
USB20_OTG0_ID is not connected (R3922 is /NC) and VBUS only feeds
VCC5V0_SYS through the input protection. So the port cannot present
itself as a host or source VBUS, not even behind a powered hub.
- Did not add the WiFi and Bluetooth wake pin configurations. The pins
are there, HOST_WAKE_WL and WL_WAKE_HOST on GPIO1_A6 and GPIO1_A7,
HOST_WAKE_BT and BT_WAKE_HOST on GPIO1_B4 and GPIO1_B5, but the
AIC8800D80 has no upstream driver, so there is no wifi@1 or bluetooth
node to reference them from and the pin states would never be applied.
They belong in the patch that adds those nodes (Jonas Karlman).
- Link to v5: https://patch.msgid.link/20260914-r28s-upstream-v5-0-7409c498e8dc@proton.me
Changes in v5:
- Dropped the pinctrl-0 before pinctrl-names reordering from the coding
style patch and used the order the rest of the rockchip devicetrees
use, pinctrl-names first, in the new devicetree as well. The strict
mode of scripts/dtc/dt-check-style asks for the alphabetical order,
but it does so for many other properties that no rockchip devicetree
sorts that way either (Chukun Pan).
- Moved the SYS LED, which the NanoPi R28S shares with the NanoPi Zero2,
and the led1 and led_sys pin configurations into rk3528-nanopi.dtsi.
Both boards now only add their own LEDs to &leds (Chukun Pan).
- Renamed the NanoPi R28S LED nodes to led-1 and led-2, to use the
led-[0-9] node naming (Chukun Pan).
- Changed the user button from KEY_RESTART to BTN_1. It is a general
purpose button on this board, not a reset button (Chukun Pan).
- Link to v4: https://patch.msgid.link/20260911-r28s-upstream-v4-0-fb6c85f226d4@proton.me
Changes in v4:
- Dropped the patch that moved the NanoPi Zero2 RGMII PHY reset to the
MDIO bus. GPIO4_C2 resets the PHY, not the bus, so describing it on
&mdio1 is not a description of the hardware. It would also break
Ethernet in U-Boot, which reads reset-gpios, reset-assert-us and
reset-deassert-us from the PHY node and has no support for a bus
level reset. The nanopi-zero2-rk3528 U-Boot target releases the PHY
reset before Linux starts; the failure I reported was seen with the
generic-rk3528 target, which carries no board devicetree. Pointed out
by Chukun Pan, and by Jonas Karlman in the same discussion for the
HINLINK H28K:
https://lore.kernel.org/lkml/1e8da54f-ef87-4d31-9a0a-17c0ff66bee0@kwiboo.se/
My own R28S has in fact been running a board specific U-Boot target
all along, with the PHY node description this series now keeps, so
the reset ordering problem I described does not arise there.
- Reworded the coding style patch to state the coding style violation
itself as the reason, rather than the tool that found it (Diederik de
Haas).
- Link to v3: https://patch.msgid.link/20260909-r28s-upstream-v3-0-ee3e1a34a353@proton.me
Changes in v3:
- New patch 1: describe the NanoPi Zero2 RGMII PHY reset on the MDIO
bus rather than in the PHY node, so that it is applied before the PHY
ID is read. A PHY held in reset by the bootloader was otherwise never
probed, leaving the port dead. Reported by Andrey Korshunov, who
proposed the deprecated snps,reset-gpio properties on the MAC; the
bus level reset-gpios in mdio.yaml fixes the same ordering without a
deprecated property.
- New patch 5: follow the DTS coding style in the three NanoPi RK3528
devicetrees, as found by scripts/dtc/dt-check-style --mode=strict:
pinctrl-0 before pinctrl-names, and a blank line before status.
Suggested by Diederik de Haas.
- Picked up Conor Dooley's Acked-by on the binding.
- Link to v2: https://patch.msgid.link/20260907-r28s-upstream-v2-0-21ab570fc91c@proton.me
Changes in v2:
- Split the parts shared with the NanoPi Zero2 into a new
rk3528-nanopi.dtsi (new patch 2). The NanoPi Zero2 dtb is unchanged.
- Name the pinctrl labels after the nets in the schematic: usr_btn,
led1, led2, led_sys, pwr_wf and pcie_eth_perstb.
- Rename the button node to button-user and its label to "USER".
- Link to v1: https://patch.msgid.link/20260905-r28s-upstream-v1-0-f68d5389269a@proton.me
---
安容 (3):
dt-bindings: arm: rockchip: Add FriendlyElec NanoPi R28S
arm64: dts: rockchip: Split out the common NanoPi RK3528 parts
arm64: dts: rockchip: Add devicetree for the FriendlyElec NanoPi R28S
.../devicetree/bindings/arm/rockchip.yaml | 12 +-
arch/arm64/boot/dts/rockchip/Makefile | 1 +
.../arm64/boot/dts/rockchip/rk3528-nanopi-r28s.dts | 146 +++++++++++
.../boot/dts/rockchip/rk3528-nanopi-zero2.dts | 291 +--------------------
arch/arm64/boot/dts/rockchip/rk3528-nanopi.dtsi | 288 ++++++++++++++++++++
5 files changed, 451 insertions(+), 287 deletions(-)
---
base-commit: 32e0f64640d558a0f5410ac5cdd8ebf371c5e6a6
change-id: 20260905-r28s-upstream-e212e27d6165
Best regards,
--
安容 <HystericalDragons@proton.me>
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH v6 1/3] dt-bindings: arm: rockchip: Add FriendlyElec NanoPi R28S
2026-09-14 13:35 [PATCH v6 0/3] arm64: dts: rockchip: Add FriendlyElec NanoPi R28S 安容 via B4 Relay
@ 2026-09-14 13:35 ` 安容 via B4 Relay
2026-09-19 9:38 ` Jonas Karlman
2026-09-14 13:35 ` [PATCH v6 2/3] arm64: dts: rockchip: Split out the common NanoPi RK3528 parts 安容 via B4 Relay
2026-09-14 13:35 ` [PATCH v6 3/3] arm64: dts: rockchip: Add devicetree for the FriendlyElec NanoPi R28S 安容 via B4 Relay
2 siblings, 1 reply; 7+ messages in thread
From: 安容 via B4 Relay @ 2026-09-14 13:35 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner
Cc: devicetree, linux-arm-kernel, linux-rockchip, linux-kernel,
Chukun Pan, Jonas Karlman, jensen, Andrey Korshunov,
Diederik de Haas, Conor Dooley, 安容
From: 安容 <HystericalDragons@proton.me>
The NanoPi R28S is a dual gigabit Ethernet router board based on the
Rockchip RK3528 SoC. It shares its base devicetree with the NanoPi
Zero2, so list both boards in a single entry.
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: 安容 <HystericalDragons@proton.me>
---
Documentation/devicetree/bindings/arm/rockchip.yaml | 12 +++++++-----
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml
index 81744fbee9..dc04946db0 100644
--- a/Documentation/devicetree/bindings/arm/rockchip.yaml
+++ b/Documentation/devicetree/bindings/arm/rockchip.yaml
@@ -347,6 +347,13 @@ properties:
- friendlyarm,nanopi-r2s-plus
- const: rockchip,rk3328
+ - description: FriendlyElec NanoPi R28S/Zero2
+ items:
+ - enum:
+ - friendlyarm,nanopi-r28s
+ - friendlyarm,nanopi-zero2
+ - const: rockchip,rk3528
+
- description: FriendlyElec NanoPi R3S
items:
- const: friendlyarm,nanopi-r3s
@@ -388,11 +395,6 @@ properties:
- const: friendlyarm,nanopi-r76s
- const: rockchip,rk3576
- - description: FriendlyElec NanoPi Zero2
- items:
- - const: friendlyarm,nanopi-zero2
- - const: rockchip,rk3528
-
- description: FriendlyElec NanoPC T6 series boards
items:
- enum:
--
2.55.0
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH v6 2/3] arm64: dts: rockchip: Split out the common NanoPi RK3528 parts
2026-09-14 13:35 [PATCH v6 0/3] arm64: dts: rockchip: Add FriendlyElec NanoPi R28S 安容 via B4 Relay
2026-09-14 13:35 ` [PATCH v6 1/3] dt-bindings: arm: " 安容 via B4 Relay
@ 2026-09-14 13:35 ` 安容 via B4 Relay
2026-09-19 9:39 ` Jonas Karlman
2026-09-14 13:35 ` [PATCH v6 3/3] arm64: dts: rockchip: Add devicetree for the FriendlyElec NanoPi R28S 安容 via B4 Relay
2 siblings, 1 reply; 7+ messages in thread
From: 安容 via B4 Relay @ 2026-09-14 13:35 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner
Cc: devicetree, linux-arm-kernel, linux-rockchip, linux-kernel,
Chukun Pan, Jonas Karlman, jensen, Andrey Korshunov,
Diederik de Haas, 安容
From: 安容 <HystericalDragons@proton.me>
The FriendlyElec NanoPi Zero2 and the NanoPi R28S share their power
tree, storage, RGMII Ethernet, RTC, SYS LED and debug console. Move
those parts into rk3528-nanopi.dtsi so the NanoPi R28S can reuse them,
and leave only the board specific nodes in the NanoPi Zero2 devicetree.
Suggested-by: Chukun Pan <amadeus@jmu.edu.cn>
Signed-off-by: 安容 <HystericalDragons@proton.me>
---
.../boot/dts/rockchip/rk3528-nanopi-zero2.dts | 291 +--------------------
arch/arm64/boot/dts/rockchip/rk3528-nanopi.dtsi | 288 ++++++++++++++++++++
2 files changed, 297 insertions(+), 282 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3528-nanopi-zero2.dts b/arch/arm64/boot/dts/rockchip/rk3528-nanopi-zero2.dts
index 97d85124d2..8a7dbd539f 100644
--- a/arch/arm64/boot/dts/rockchip/rk3528-nanopi-zero2.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3528-nanopi-zero2.dts
@@ -2,41 +2,13 @@
/dts-v1/;
-#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
-#include <dt-bindings/pwm/pwm.h>
-#include "rk3528.dtsi"
+#include "rk3528-nanopi.dtsi"
/ {
model = "FriendlyElec NanoPi Zero2";
compatible = "friendlyarm,nanopi-zero2", "rockchip,rk3528";
- aliases {
- ethernet0 = &gmac1;
- i2c1 = &i2c1;
- mmc0 = &sdhci;
- mmc1 = &sdmmc;
- serial0 = &uart0;
- };
-
- chosen {
- stdout-path = "serial0:1500000n8";
- };
-
- adc-keys-0 {
- compatible = "adc-keys";
- io-channels = <&saradc 0>;
- io-channel-names = "buttons";
- keyup-threshold-microvolt = <1800000>;
- poll-interval = <100>;
-
- button-maskrom {
- label = "MASK";
- linux,code = <KEY_SETUP>;
- press-threshold-microvolt = <0>;
- };
- };
-
adc-keys-1 {
compatible = "adc-keys";
io-channels = <&saradc 1>;
@@ -51,28 +23,6 @@ button-recovery {
};
};
- leds {
- compatible = "gpio-leds";
- pinctrl-names = "default";
- pinctrl-0 = <&led1>, <&led_sys>;
-
- led-0 {
- color = <LED_COLOR_ID_RED>;
- default-state = "on";
- function = LED_FUNCTION_HEARTBEAT;
- gpios = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "heartbeat";
- };
-
- led-1 {
- color = <LED_COLOR_ID_GREEN>;
- default-state = "on";
- function = LED_FUNCTION_STATUS;
- gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "default-on";
- };
- };
-
vcc0v6_ddr: regulator-0v6-vcc-ddr {
compatible = "regulator-fixed";
regulator-name = "vcc0v6_ddr";
@@ -83,66 +33,6 @@ vcc0v6_ddr: regulator-0v6-vcc-ddr {
vin-supply = <&vcc5v0_sys>;
};
- vdd_0v9: regulator-0v9-vdd {
- compatible = "regulator-fixed";
- regulator-name = "vdd_0v9";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <900000>;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vcc_ddr: regulator-1v1-vcc-ddr {
- compatible = "regulator-fixed";
- regulator-name = "vcc_ddr";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1100000>;
- regulator-max-microvolt = <1100000>;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vcc_1v8: regulator-1v8-vcc {
- compatible = "regulator-fixed";
- regulator-name = "vcc_1v8";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vcc_3v3>;
- };
-
- vcc_3v3: regulator-3v3-vcc {
- compatible = "regulator-fixed";
- regulator-name = "vcc_3v3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vcc3v3_sd: regulator-3v3-vcc-sd {
- compatible = "regulator-fixed";
- gpios = <&gpio4 RK_PA1 GPIO_ACTIVE_LOW>;
- pinctrl-names = "default";
- pinctrl-0 = <&sdmmc_pwren_l>;
- regulator-name = "vcc3v3_sd";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vcc_3v3>;
- };
-
- vcc5v0_sys: regulator-5v0-vcc-sys {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- };
-
usb2_host_5v: regulator-5v0-usb2-host {
compatible = "regulator-fixed";
enable-active-high;
@@ -154,138 +44,21 @@ usb2_host_5v: regulator-5v0-usb2-host {
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc5v0_sys>;
};
-
- vccio_sd: regulator-vccio-sd {
- compatible = "regulator-gpio";
- gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&sdmmc_vol_ctrl_h>;
- regulator-name = "vccio_sd";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- states = <1800000 0x0>, <3300000 0x1>;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vdd_arm: regulator-vdd-arm {
- compatible = "pwm-regulator";
- pwms = <&pwm1 0 5000 PWM_POLARITY_INVERTED>;
- pwm-supply = <&vcc5v0_sys>;
- regulator-name = "vdd_arm";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <746000>;
- regulator-max-microvolt = <1201000>;
- regulator-settling-time-up-us = <250>;
- };
-
- vdd_logic: regulator-vdd-logic {
- compatible = "pwm-regulator";
- pwms = <&pwm2 0 5000 PWM_POLARITY_INVERTED>;
- pwm-supply = <&vcc5v0_sys>;
- regulator-name = "vdd_logic";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <705000>;
- regulator-max-microvolt = <1006000>;
- regulator-settling-time-up-us = <250>;
- };
-};
-
-&cpu0 {
- cpu-supply = <&vdd_arm>;
-};
-
-&cpu1 {
- cpu-supply = <&vdd_arm>;
-};
-
-&cpu2 {
- cpu-supply = <&vdd_arm>;
-};
-
-&cpu3 {
- cpu-supply = <&vdd_arm>;
-};
-
-&gmac1 {
- clock_in_out = "output";
- phy-handle = <&rgmii_phy>;
- phy-mode = "rgmii-id";
- phy-supply = <&vcc_3v3>;
- pinctrl-names = "default";
- pinctrl-0 = <&rgmii_miim>, <&rgmii_tx_bus2>, <&rgmii_rx_bus2>,
- <&rgmii_rgmii_clk>, <&rgmii_rgmii_bus>;
- status = "okay";
-};
-
-&gpu {
- mali-supply = <&vdd_logic>;
- status = "okay";
};
-&i2c1 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c1m0_xfer>;
- status = "okay";
+&leds {
+ pinctrl-0 = <&led1>, <&led_sys>;
- hym8563: rtc@51 {
- compatible = "haoyu,hym8563";
- reg = <0x51>;
- #clock-cells = <0>;
- interrupt-parent = <&gpio4>;
- interrupts = <RK_PC1 IRQ_TYPE_LEVEL_LOW>;
- pinctrl-names = "default";
- pinctrl-0 = <&rtc_int_l>;
- wakeup-source;
- };
-};
-
-&mdio1 {
- rgmii_phy: ethernet-phy@1 {
- compatible = "ethernet-phy-ieee802.3-c22";
- reg = <0x1>;
- pinctrl-names = "default";
- pinctrl-0 = <&gmac1_rstn_l>;
- reset-assert-us = <20000>;
- reset-deassert-us = <100000>;
- reset-gpios = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;
+ led-1 {
+ color = <LED_COLOR_ID_GREEN>;
+ default-state = "on";
+ function = LED_FUNCTION_STATUS;
+ gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "default-on";
};
};
&pinctrl {
- ethernet {
- gmac1_rstn_l: gmac1-rstn-l {
- rockchip,pins = <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- leds {
- led1: led1 {
- rockchip,pins = <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- led_sys: led-sys {
- rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- rtc {
- rtc_int_l: rtc-int-l {
- rockchip,pins = <4 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- sdmmc {
- sdmmc_vol_ctrl_h: sdmmc-vol-ctrl-h {
- rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- sdmmc_pwren_l: sdmmc-pwren-l {
- rockchip,pins = <4 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
usb {
usb20_host1_pwren: usb20-host1-pwren {
rockchip,pins = <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
@@ -293,52 +66,6 @@ usb20_host1_pwren: usb20-host1-pwren {
};
};
-&pwm1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pwm1m0_pins>;
- status = "okay";
-};
-
-&pwm2 {
- pinctrl-names = "default";
- pinctrl-0 = <&pwm2m0_pins>;
- status = "okay";
-};
-
-&saradc {
- vref-supply = <&vcc_1v8>;
- status = "okay";
-};
-
-&sdhci {
- bus-width = <8>;
- cap-mmc-highspeed;
- mmc-hs200-1_8v;
- no-sd;
- no-sdio;
- non-removable;
- vmmc-supply = <&vcc_3v3>;
- vqmmc-supply = <&vcc_1v8>;
- status = "okay";
-};
-
-&sdmmc {
- bus-width = <4>;
- cap-mmc-highspeed;
- cap-sd-highspeed;
- disable-wp;
- sd-uhs-sdr104;
- vmmc-supply = <&vcc3v3_sd>;
- vqmmc-supply = <&vccio_sd>;
- status = "okay";
-};
-
-&uart0 {
- pinctrl-names = "default";
- pinctrl-0 = <&uart0m0_xfer>;
- status = "okay";
-};
-
&usb_host0_ehci {
status = "okay";
};
diff --git a/arch/arm64/boot/dts/rockchip/rk3528-nanopi.dtsi b/arch/arm64/boot/dts/rockchip/rk3528-nanopi.dtsi
new file mode 100644
index 0000000000..f15493f825
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3528-nanopi.dtsi
@@ -0,0 +1,288 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Common parts of the FriendlyElec RK3528 boards: NanoPi Zero2 and NanoPi R28S.
+ */
+
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/pwm/pwm.h>
+#include "rk3528.dtsi"
+
+/ {
+ aliases {
+ ethernet0 = &gmac1;
+ i2c1 = &i2c1;
+ mmc0 = &sdhci;
+ mmc1 = &sdmmc;
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:1500000n8";
+ };
+
+ adc-keys-0 {
+ compatible = "adc-keys";
+ io-channels = <&saradc 0>;
+ io-channel-names = "buttons";
+ keyup-threshold-microvolt = <1800000>;
+ poll-interval = <100>;
+
+ button-maskrom {
+ label = "MASK";
+ linux,code = <KEY_SETUP>;
+ press-threshold-microvolt = <0>;
+ };
+ };
+
+ leds: leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&led_sys>;
+
+ led-0 {
+ color = <LED_COLOR_ID_RED>;
+ default-state = "on";
+ function = LED_FUNCTION_HEARTBEAT;
+ gpios = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ vdd_0v9: regulator-0v9-vdd {
+ compatible = "regulator-fixed";
+ regulator-name = "vdd_0v9";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <900000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vcc_ddr: regulator-1v1-vcc-ddr {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_ddr";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1100000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vcc_1v8: regulator-1v8-vcc {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_1v8";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ vin-supply = <&vcc_3v3>;
+ };
+
+ vcc_3v3: regulator-3v3-vcc {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_3v3";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vcc3v3_sd: regulator-3v3-vcc-sd {
+ compatible = "regulator-fixed";
+ gpios = <&gpio4 RK_PA1 GPIO_ACTIVE_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdmmc_pwren_l>;
+ regulator-name = "vcc3v3_sd";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vcc_3v3>;
+ };
+
+ vcc5v0_sys: regulator-5v0-vcc-sys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ };
+
+ vccio_sd: regulator-vccio-sd {
+ compatible = "regulator-gpio";
+ gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdmmc_vol_ctrl_h>;
+ regulator-name = "vccio_sd";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ states = <1800000 0x0>, <3300000 0x1>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vdd_arm: regulator-vdd-arm {
+ compatible = "pwm-regulator";
+ pwms = <&pwm1 0 5000 PWM_POLARITY_INVERTED>;
+ pwm-supply = <&vcc5v0_sys>;
+ regulator-name = "vdd_arm";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <746000>;
+ regulator-max-microvolt = <1201000>;
+ regulator-settling-time-up-us = <250>;
+ };
+
+ vdd_logic: regulator-vdd-logic {
+ compatible = "pwm-regulator";
+ pwms = <&pwm2 0 5000 PWM_POLARITY_INVERTED>;
+ pwm-supply = <&vcc5v0_sys>;
+ regulator-name = "vdd_logic";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <705000>;
+ regulator-max-microvolt = <1006000>;
+ regulator-settling-time-up-us = <250>;
+ };
+};
+
+&cpu0 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu1 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu2 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu3 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&gmac1 {
+ clock_in_out = "output";
+ phy-handle = <&rgmii_phy>;
+ phy-mode = "rgmii-id";
+ phy-supply = <&vcc_3v3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&rgmii_miim>, <&rgmii_tx_bus2>, <&rgmii_rx_bus2>,
+ <&rgmii_rgmii_clk>, <&rgmii_rgmii_bus>;
+ status = "okay";
+};
+
+&gpu {
+ mali-supply = <&vdd_logic>;
+ status = "okay";
+};
+
+&i2c1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1m0_xfer>;
+ status = "okay";
+
+ hym8563: rtc@51 {
+ compatible = "haoyu,hym8563";
+ reg = <0x51>;
+ #clock-cells = <0>;
+ interrupt-parent = <&gpio4>;
+ interrupts = <RK_PC1 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&rtc_int_l>;
+ wakeup-source;
+ };
+};
+
+&mdio1 {
+ rgmii_phy: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <0x1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&gmac1_rstn_l>;
+ reset-assert-us = <20000>;
+ reset-deassert-us = <100000>;
+ reset-gpios = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;
+ };
+};
+
+&pinctrl {
+ ethernet {
+ gmac1_rstn_l: gmac1-rstn-l {
+ rockchip,pins = <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ leds {
+ led1: led1 {
+ rockchip,pins = <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ led_sys: led-sys {
+ rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ rtc {
+ rtc_int_l: rtc-int-l {
+ rockchip,pins = <4 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ sdmmc {
+ sdmmc_pwren_l: sdmmc-pwren-l {
+ rockchip,pins = <4 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ sdmmc_vol_ctrl_h: sdmmc-vol-ctrl-h {
+ rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+};
+
+&pwm1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm1m0_pins>;
+ status = "okay";
+};
+
+&pwm2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm2m0_pins>;
+ status = "okay";
+};
+
+&saradc {
+ vref-supply = <&vcc_1v8>;
+ status = "okay";
+};
+
+&sdhci {
+ bus-width = <8>;
+ cap-mmc-highspeed;
+ mmc-hs200-1_8v;
+ no-sd;
+ no-sdio;
+ non-removable;
+ vmmc-supply = <&vcc_3v3>;
+ vqmmc-supply = <&vcc_1v8>;
+ status = "okay";
+};
+
+&sdmmc {
+ bus-width = <4>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ disable-wp;
+ sd-uhs-sdr104;
+ vmmc-supply = <&vcc3v3_sd>;
+ vqmmc-supply = <&vccio_sd>;
+ status = "okay";
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0m0_xfer>;
+ status = "okay";
+};
--
2.55.0
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH v6 3/3] arm64: dts: rockchip: Add devicetree for the FriendlyElec NanoPi R28S
2026-09-14 13:35 [PATCH v6 0/3] arm64: dts: rockchip: Add FriendlyElec NanoPi R28S 安容 via B4 Relay
2026-09-14 13:35 ` [PATCH v6 1/3] dt-bindings: arm: " 安容 via B4 Relay
2026-09-14 13:35 ` [PATCH v6 2/3] arm64: dts: rockchip: Split out the common NanoPi RK3528 parts 安容 via B4 Relay
@ 2026-09-14 13:35 ` 安容 via B4 Relay
2026-09-19 9:40 ` Jonas Karlman
2 siblings, 1 reply; 7+ messages in thread
From: 安容 via B4 Relay @ 2026-09-14 13:35 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner
Cc: devicetree, linux-arm-kernel, linux-rockchip, linux-kernel,
Chukun Pan, Jonas Karlman, jensen, Andrey Korshunov,
Diederik de Haas, 安容
From: 安容 <HystericalDragons@proton.me>
The NanoPi R28S is a dual gigabit Ethernet router board based on the
Rockchip RK3528 SoC, designed and developed by FriendlyElec. It shares
most of its design with the NanoPi Zero2, so it builds on the common
rk3528-nanopi.dtsi.
Specification:
- Rockchip RK3528
- 1GB RAM
- eMMC socket (optional)
- MicroSD slot
- 1x 1000Base-T (GMAC1, Realtek RTL8211F)
- 1x 1000Base-T (PCIe, Realtek RTL8111H)
- AICSemi AIC8800D80 SDIO WiFi
- 3x LEDs (SYS, LAN, WAN)
- 1x USB 2.0 Type-C, peripheral only, shared with the 5V power input
- User and MaskROM buttons
- Haoyu HYM8563 RTC
- 1x USB Type-C debug UART (onboard WCH CH340E)
Assisted-by: LLM
Signed-off-by: 安容 <HystericalDragons@proton.me>
---
arch/arm64/boot/dts/rockchip/Makefile | 1 +
.../arm64/boot/dts/rockchip/rk3528-nanopi-r28s.dts | 146 +++++++++++++++++++++
2 files changed, 147 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index b677914cd3..51a9889088 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -94,6 +94,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-vicharak-vaaman.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399pro-rock-pi-n10.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-armsom-sige1.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-hinlink-h28k.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-nanopi-r28s.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-nanopi-zero2.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-radxa-e20c.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-rock-2a.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3528-nanopi-r28s.dts b/arch/arm64/boot/dts/rockchip/rk3528-nanopi-r28s.dts
new file mode 100644
index 0000000000..a453a990b3
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3528-nanopi-r28s.dts
@@ -0,0 +1,146 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2022 Rockchip Electronics Co., Ltd.
+ * Copyright (c) 2026 FriendlyElec Computer Tech. Co., Ltd.
+ * Copyright (c) 2026 安容 <HystericalDragons@proton.me>
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/leds/common.h>
+#include "rk3528-nanopi.dtsi"
+
+/ {
+ model = "FriendlyElec NanoPi R28S";
+ compatible = "friendlyarm,nanopi-r28s", "rockchip,rk3528";
+
+ aliases {
+ mmc2 = &sdio0;
+ serial2 = &uart2;
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+ pinctrl-names = "default";
+ pinctrl-0 = <&gpio4_b2_usr_btn>;
+
+ button-user {
+ debounce-interval = <50>;
+ gpios = <&gpio4 RK_PB2 GPIO_ACTIVE_LOW>;
+ label = "USER";
+ linux,code = <BTN_1>;
+ wakeup-source;
+ };
+ };
+
+ sdio_pwrseq: sdio-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwr_wf>;
+ post-power-on-delay-ms = <100>;
+ reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
+ };
+};
+
+&combphy {
+ status = "okay";
+};
+
+&leds {
+ pinctrl-0 = <&led1>, <&led2>, <&led_sys>;
+
+ led-1 {
+ color = <LED_COLOR_ID_GREEN>;
+ default-state = "off";
+ function = LED_FUNCTION_WAN;
+ gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "netdev";
+ };
+
+ led-2 {
+ color = <LED_COLOR_ID_GREEN>;
+ default-state = "off";
+ function = LED_FUNCTION_LAN;
+ gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "netdev";
+ };
+};
+
+&pcie {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie_eth_perstb>;
+ reset-gpios = <&gpio4 RK_PC0 GPIO_ACTIVE_HIGH>;
+ vpcie3v3-supply = <&vcc_3v3>;
+ status = "okay";
+};
+
+&pinctrl {
+ gpio-keys {
+ gpio4_b2_usr_btn: gpio4-b2-usr-btn {
+ rockchip,pins = <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ leds {
+ led2: led2 {
+ rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ pcie {
+ pcie_eth_perstb: pcie-eth-perstb {
+ rockchip,pins = <4 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ wifi {
+ pwr_wf: pwr-wf {
+ rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+};
+
+&sdio0 {
+ bus-width = <4>;
+ cap-sd-highspeed;
+ cap-sdio-irq;
+ keep-power-in-suspend;
+ mmc-pwrseq = <&sdio_pwrseq>;
+ no-mmc;
+ no-sd;
+ non-removable;
+ sd-uhs-sdr104;
+ vmmc-supply = <&vcc_3v3>;
+ vqmmc-supply = <&vcc_1v8>;
+ status = "okay";
+};
+
+&uart2 {
+ dma-names = "tx", "rx";
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2m1_xfer>, <&uart2m1_ctsn>, <&uart2m1_rtsn>;
+ uart-has-rtscts;
+ status = "okay";
+};
+
+&usb_host0_xhci {
+ /*
+ * The Type-C port is also the 5V power input. Both CC pins have a
+ * 5.1k pull-down, the ID pin is not connected and VBUS only feeds
+ * the 5V rail, so the port can only ever be a device.
+ */
+ dr_mode = "peripheral";
+ extcon = <&usb2phy>;
+ maximum-speed = "high-speed";
+ phys = <&usb2phy_otg>;
+ phy-names = "usb2-phy";
+ status = "okay";
+};
+
+&usb2phy {
+ status = "okay";
+};
+
+&usb2phy_otg {
+ status = "okay";
+};
--
2.55.0
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v6 1/3] dt-bindings: arm: rockchip: Add FriendlyElec NanoPi R28S
2026-09-14 13:35 ` [PATCH v6 1/3] dt-bindings: arm: " 安容 via B4 Relay
@ 2026-09-19 9:38 ` Jonas Karlman
0 siblings, 0 replies; 7+ messages in thread
From: Jonas Karlman @ 2026-09-19 9:38 UTC (permalink / raw)
To: HystericalDragons
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner,
devicetree, linux-arm-kernel, linux-rockchip, linux-kernel,
Chukun Pan, jensen, Andrey Korshunov, Diederik de Haas,
Conor Dooley
Hi,
On 9/14/2026 3:35 PM, 安容 via B4 Relay wrote:
> From: 安容 <HystericalDragons@proton.me>
>
> The NanoPi R28S is a dual gigabit Ethernet router board based on the
> Rockchip RK3528 SoC. It shares its base devicetree with the NanoPi
> Zero2, so list both boards in a single entry.
>
> Acked-by: Conor Dooley <conor.dooley@microchip.com>
> Signed-off-by: 安容 <HystericalDragons@proton.me>
> ---
> Documentation/devicetree/bindings/arm/rockchip.yaml | 12 +++++++-----
> 1 file changed, 7 insertions(+), 5 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml
> index 81744fbee9..dc04946db0 100644
> --- a/Documentation/devicetree/bindings/arm/rockchip.yaml
> +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml
> @@ -347,6 +347,13 @@ properties:
> - friendlyarm,nanopi-r2s-plus
> - const: rockchip,rk3328
>
> + - description: FriendlyElec NanoPi R28S/Zero2
Maybe name this something like 'FriendlyElec NanoPi RK3528 series boards'
to closer match other NanoPi/PC entries? That would also prevents
re-ordering once more when NanoPi NEO3 Plus is added.
Regards,
Jonas
> + items:
> + - enum:
> + - friendlyarm,nanopi-r28s
> + - friendlyarm,nanopi-zero2
> + - const: rockchip,rk3528
> +
> - description: FriendlyElec NanoPi R3S
> items:
> - const: friendlyarm,nanopi-r3s
> @@ -388,11 +395,6 @@ properties:
> - const: friendlyarm,nanopi-r76s
> - const: rockchip,rk3576
>
> - - description: FriendlyElec NanoPi Zero2
> - items:
> - - const: friendlyarm,nanopi-zero2
> - - const: rockchip,rk3528
> -
> - description: FriendlyElec NanoPC T6 series boards
> items:
> - enum:
>
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v6 2/3] arm64: dts: rockchip: Split out the common NanoPi RK3528 parts
2026-09-14 13:35 ` [PATCH v6 2/3] arm64: dts: rockchip: Split out the common NanoPi RK3528 parts 安容 via B4 Relay
@ 2026-09-19 9:39 ` Jonas Karlman
0 siblings, 0 replies; 7+ messages in thread
From: Jonas Karlman @ 2026-09-19 9:39 UTC (permalink / raw)
To: HystericalDragons, Heiko Stuebner
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, devicetree,
linux-arm-kernel, linux-rockchip, linux-kernel, Chukun Pan,
jensen, Andrey Korshunov, Diederik de Haas
Hi,
On 9/14/2026 3:35 PM, 安容 via B4 Relay wrote:
> From: 安容 <HystericalDragons@proton.me>
>
> The FriendlyElec NanoPi Zero2 and the NanoPi R28S share their power
> tree, storage, RGMII Ethernet, RTC, SYS LED and debug console. Move
> those parts into rk3528-nanopi.dtsi so the NanoPi R28S can reuse them,
> and leave only the board specific nodes in the NanoPi Zero2 devicetree.
>
> Suggested-by: Chukun Pan <amadeus@jmu.edu.cn>
> Signed-off-by: 安容 <HystericalDragons@proton.me>
> ---
> .../boot/dts/rockchip/rk3528-nanopi-zero2.dts | 291 +--------------------
> arch/arm64/boot/dts/rockchip/rk3528-nanopi.dtsi | 288 ++++++++++++++++++++
> 2 files changed, 297 insertions(+), 282 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3528-nanopi-zero2.dts b/arch/arm64/boot/dts/rockchip/rk3528-nanopi-zero2.dts
> index 97d85124d2..8a7dbd539f 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3528-nanopi-zero2.dts
> +++ b/arch/arm64/boot/dts/rockchip/rk3528-nanopi-zero2.dts
> @@ -2,41 +2,13 @@
>
> /dts-v1/;
>
> -#include <dt-bindings/input/input.h>
> #include <dt-bindings/leds/common.h>
You can also drop this include, you are also adding this include to the
rk3528-nanopi.dtsi file.
> -#include <dt-bindings/pwm/pwm.h>
> -#include "rk3528.dtsi"
> +#include "rk3528-nanopi.dtsi"
>
> / {
> model = "FriendlyElec NanoPi Zero2";
> compatible = "friendlyarm,nanopi-zero2", "rockchip,rk3528";
[snip]
> +&leds {
This should also include a 'pinctrl-names = "default"', as we are
re-defining pinctrl-0 here.
> + pinctrl-0 = <&led1>, <&led_sys>;
The led1 label is defined/shared among the three boards, yet led-1 is
defined in each board DT. Maybe define a common led-1 or move the led1
label to board DT?
>
> + led-1 {
> + color = <LED_COLOR_ID_GREEN>;
> + default-state = "on";
> + function = LED_FUNCTION_STATUS;
> + gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_HIGH>;
> + linux,default-trigger = "default-on";
> };
> };
[snip]
> diff --git a/arch/arm64/boot/dts/rockchip/rk3528-nanopi.dtsi b/arch/arm64/boot/dts/rockchip/rk3528-nanopi.dtsi
> new file mode 100644
> index 0000000000..f15493f825
> --- /dev/null
> +++ b/arch/arm64/boot/dts/rockchip/rk3528-nanopi.dtsi
> @@ -0,0 +1,288 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Common parts of the FriendlyElec RK3528 boards: NanoPi Zero2 and NanoPi R28S.
This comment does not really serve a purpose, this is already implied
from the filename. And if you want to keep it, please use something that
is more generic and does not need to change when R28S DT and NEO3 Plus
DT is added.
Common parts of the FriendlyElec NanoPi RK3528 series boards
> + */
> +
> +#include <dt-bindings/input/input.h>
> +#include <dt-bindings/leds/common.h>
> +#include <dt-bindings/pwm/pwm.h>
> +#include "rk3528.dtsi"
[snip]
> +&pinctrl {
> + ethernet {
> + gmac1_rstn_l: gmac1-rstn-l {
> + rockchip,pins = <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + };
> +
> + leds {
> + led1: led1 {
> + rockchip,pins = <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
As mentioned above, not sure why we cannot define a common led-1 here if
we also define the pin in the common dtsi.
Regards,
Jonas
> +
> + led_sys: led-sys {
> + rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + };
> +
> + rtc {
> + rtc_int_l: rtc-int-l {
> + rockchip,pins = <4 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>;
> + };
> + };
> +
> + sdmmc {
> + sdmmc_pwren_l: sdmmc-pwren-l {
> + rockchip,pins = <4 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> +
> + sdmmc_vol_ctrl_h: sdmmc-vol-ctrl-h {
> + rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + };
> +};
[snip]
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v6 3/3] arm64: dts: rockchip: Add devicetree for the FriendlyElec NanoPi R28S
2026-09-14 13:35 ` [PATCH v6 3/3] arm64: dts: rockchip: Add devicetree for the FriendlyElec NanoPi R28S 安容 via B4 Relay
@ 2026-09-19 9:40 ` Jonas Karlman
0 siblings, 0 replies; 7+ messages in thread
From: Jonas Karlman @ 2026-09-19 9:40 UTC (permalink / raw)
To: HystericalDragons, Heiko Stuebner
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, devicetree,
linux-arm-kernel, linux-rockchip, linux-kernel, Chukun Pan,
jensen, Andrey Korshunov, Diederik de Haas
Hi,
On 9/14/2026 3:35 PM, 安容 via B4 Relay wrote:
> From: 安容 <HystericalDragons@proton.me>
>
> The NanoPi R28S is a dual gigabit Ethernet router board based on the
> Rockchip RK3528 SoC, designed and developed by FriendlyElec. It shares
> most of its design with the NanoPi Zero2, so it builds on the common
> rk3528-nanopi.dtsi.
>
> Specification:
> - Rockchip RK3528
> - 1GB RAM
> - eMMC socket (optional)
> - MicroSD slot
> - 1x 1000Base-T (GMAC1, Realtek RTL8211F)
> - 1x 1000Base-T (PCIe, Realtek RTL8111H)
> - AICSemi AIC8800D80 SDIO WiFi
> - 3x LEDs (SYS, LAN, WAN)
> - 1x USB 2.0 Type-C, peripheral only, shared with the 5V power input
> - User and MaskROM buttons
> - Haoyu HYM8563 RTC
> - 1x USB Type-C debug UART (onboard WCH CH340E)
>
> Assisted-by: LLM
> Signed-off-by: 安容 <HystericalDragons@proton.me>
> ---
> arch/arm64/boot/dts/rockchip/Makefile | 1 +
> .../arm64/boot/dts/rockchip/rk3528-nanopi-r28s.dts | 146 +++++++++++++++++++++
> 2 files changed, 147 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
> index b677914cd3..51a9889088 100644
> --- a/arch/arm64/boot/dts/rockchip/Makefile
> +++ b/arch/arm64/boot/dts/rockchip/Makefile
> @@ -94,6 +94,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-vicharak-vaaman.dtb
> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399pro-rock-pi-n10.dtb
> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-armsom-sige1.dtb
> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-hinlink-h28k.dtb
> +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-nanopi-r28s.dtb
> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-nanopi-zero2.dtb
> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-radxa-e20c.dtb
> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-rock-2a.dtb
> diff --git a/arch/arm64/boot/dts/rockchip/rk3528-nanopi-r28s.dts b/arch/arm64/boot/dts/rockchip/rk3528-nanopi-r28s.dts
> new file mode 100644
> index 0000000000..a453a990b3
> --- /dev/null
> +++ b/arch/arm64/boot/dts/rockchip/rk3528-nanopi-r28s.dts
> @@ -0,0 +1,146 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2022 Rockchip Electronics Co., Ltd.
> + * Copyright (c) 2026 FriendlyElec Computer Tech. Co., Ltd.
> + * Copyright (c) 2026 安容 <HystericalDragons@proton.me>
> + */
> +
> +/dts-v1/;
> +
> +#include <dt-bindings/leds/common.h>
This is already included from rk3528-nanopi.dtsi, so this can be dropped
or we should possible also include input and gpio symbols used in this
board DT.
> +#include "rk3528-nanopi.dtsi"
> +
> +/ {
> + model = "FriendlyElec NanoPi R28S";
> + compatible = "friendlyarm,nanopi-r28s", "rockchip,rk3528";
> +
> + aliases {
> + mmc2 = &sdio0;
> + serial2 = &uart2;
> + };
> +
> + gpio-keys {
> + compatible = "gpio-keys";
> + pinctrl-names = "default";
> + pinctrl-0 = <&gpio4_b2_usr_btn>;
> +
> + button-user {
> + debounce-interval = <50>;
> + gpios = <&gpio4 RK_PB2 GPIO_ACTIVE_LOW>;
> + label = "USER";
> + linux,code = <BTN_1>;
> + wakeup-source;
> + };
> + };
> +
> + sdio_pwrseq: sdio-pwrseq {
> + compatible = "mmc-pwrseq-simple";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pwr_wf>;
> + post-power-on-delay-ms = <100>;
> + reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
> + };
> +};
> +
> +&combphy {
> + status = "okay";
> +};
> +
> +&leds {
This should also include a 'pinctrl-names = "default"', as we are
re-defining pinctrl-0 here.
> + pinctrl-0 = <&led1>, <&led2>, <&led_sys>;
> +
> + led-1 {
> + color = <LED_COLOR_ID_GREEN>;
> + default-state = "off";
> + function = LED_FUNCTION_WAN;
> + gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_HIGH>;
> + linux,default-trigger = "netdev";
> + };
> +
> + led-2 {
> + color = <LED_COLOR_ID_GREEN>;
> + default-state = "off";
> + function = LED_FUNCTION_LAN;
> + gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>;
> + linux,default-trigger = "netdev";
> + };
> +};
> +
> +&pcie {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pcie_eth_perstb>;
> + reset-gpios = <&gpio4 RK_PC0 GPIO_ACTIVE_HIGH>;
> + vpcie3v3-supply = <&vcc_3v3>;
> + status = "okay";
> +};
> +
> +&pinctrl {
This is still missing the bluetooth and wifi pins. We know the pins from
the schematics and already describe remaining pins and devices used by
the onboard WiFi+BT chip. Please also include the four missing pins.
bluetooth {
bt_wake_host: bt-wake-host {
rockchip,pins = <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_down>;
};
host_wake_bt: host-wake-bt {
rockchip,pins = <1 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
> + gpio-keys {
> + gpio4_b2_usr_btn: gpio4-b2-usr-btn {
> + rockchip,pins = <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
> + };
> + };
> +
> + leds {
> + led2: led2 {
> + rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + };
> +
> + pcie {
> + pcie_eth_perstb: pcie-eth-perstb {
> + rockchip,pins = <4 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + };
> +
> + wifi {
and:
host_wake_wl: host-wake-wl {
rockchip,pins = <1 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
};
> + pwr_wf: pwr-wf {
> + rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
and:
wl_wake_host: wl-wake-host {
rockchip,pins = <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_down>;
};
> + };
> +};
> +
> +&sdio0 {
> + bus-width = <4>;
> + cap-sd-highspeed;
> + cap-sdio-irq;
> + keep-power-in-suspend;
> + mmc-pwrseq = <&sdio_pwrseq>;
> + no-mmc;
> + no-sd;
> + non-removable;
> + sd-uhs-sdr104;
> + vmmc-supply = <&vcc_3v3>;
> + vqmmc-supply = <&vcc_1v8>;
> + status = "okay";
> +};
> +
> +&uart2 {
> + dma-names = "tx", "rx";
> + pinctrl-names = "default";
> + pinctrl-0 = <&uart2m1_xfer>, <&uart2m1_ctsn>, <&uart2m1_rtsn>;
> + uart-has-rtscts;
> + status = "okay";
> +};
> +
> +&usb_host0_xhci {
> + /*
> + * The Type-C port is also the 5V power input. Both CC pins have a
> + * 5.1k pull-down, the ID pin is not connected and VBUS only feeds
> + * the 5V rail, so the port can only ever be a device.
> + */
> + dr_mode = "peripheral";
The CC and ID pins only help signal the initial state, device mode. The
DWC3 controller can still work in dual role mode.
With dr_mode=otg and a Belkin USB-C 4-in-1 Multiport Adapter [1] hooked
up the OTG port on my R28S, I can access the storage device attached to
the hub, with dr_mode=peripheral mode it does not.
~ # lsusb
Bus 001 Device 005: ID 2109:8817 VIA Labs, Inc. USB Billboard Device
Bus 001 Device 001: ID 1d6b:0002 Linux 7.1.0-next-20260619 xhci-hcd xHCI Host Controller
Bus 001 Device 003: ID 050d:006b Belkin USB-C 4-in-1 Multiport
Bus 001 Device 002: ID 2109:2817 VIA Labs, Inc. USB2.0 Hub
Bus 001 Device 004: ID 1b1c:1a14 Corsair Voyager VEGA
[ 10.219627] usb usb1: New USB device found, idVendor=1d6b, idProduct=0002, bcdDevice= 7.01
[ 10.219691] usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[ 10.220672] usb usb1: Product: xHCI Host Controller
[ 10.223000] usb usb1: Manufacturer: Linux 7.1.0-next-20260619 xhci-hcd
[ 10.223814] usb usb1: SerialNumber: xhci-hcd.1.auto
[ 10.260442] hub 1-0:1.0: USB hub found
[ 10.534737] usb 1-1: new high-speed USB device number 2 using xhci-hcd
[ 10.690464] usb 1-1: New USB device found, idVendor=2109, idProduct=2817, bcdDevice= 1.24
[ 10.691662] usb 1-1: New USB device strings: Mfr=1, Product=2, SerialNumber=3
[ 10.692557] usb 1-1: Product: USB2.0 Hub
[ 10.693209] usb 1-1: Manufacturer: VIA Labs, Inc.
[ 10.693910] usb 1-1: SerialNumber: 000000000
[ 10.768322] hub 1-1:1.0: USB hub foundiver hub
[ 11.910478] usb 1-1.3: new full-speed USB device number 3 using xhci-hcd
[ 12.090565] usb 1-1.3: not running at top speed; connect to a high speed hub
[ 12.148576] usb 1-1.3: New USB device found, idVendor=050d, idProduct=006b, bcdDevice= 2.01
[ 12.149670] usb 1-1.3: New USB device strings: Mfr=1, Product=2, SerialNumber=3
[ 12.151418] usb 1-1.3: Product: USB-C 4-in-1 Multiport
[ 12.152164] usb 1-1.3: Manufacturer: Belkin
[ 12.152731] usb 1-1.3: SerialNumber: 000000000005
[ 12.326468] usb 1-1.4: new high-speed USB device number 4 using xhci-hcd
[ 12.491207] usb 1-1.4: New USB device found, idVendor=1b1c, idProduct=1a14, bcdDevice= 1.10
[ 12.492298] usb 1-1.4: New USB device strings: Mfr=1, Product=2, SerialNumber=3
[ 12.493213] usb 1-1.4: Product: Voyager VEGA
[ 12.493777] usb 1-1.4: Manufacturer: Corsair
[ 12.494489] usb 1-1.4: SerialNumber: 070894224D1DDF08
[ 12.526029] usb-storage 1-1.4:1.0: USB Mass Storage device detected
[ 12.540646] scsi host0: usb-storage 1-1.4:1.0
[ 12.658716] usb 1-1.5: new high-speed USB device number 5 using xhci-hcd
[ 12.759957] usb 1-1.5: New USB device found, idVendor=2109, idProduct=8817, bcdDevice= 0.01
[ 12.761051] usb 1-1.5: New USB device strings: Mfr=1, Product=2, SerialNumber=3
[ 12.761966] usb 1-1.5: Product: USB Billboard Device
[ 12.762748] usb 1-1.5: Manufacturer: VIA Labs, Inc.
[ 12.763476] usb 1-1.5: SerialNumber: 0000000000000001
[1] https://www.belkin.com/p/usb-c-4-in-1-multiport-adapter/AVC006btSGY.html
Regards,
Jonas
> + extcon = <&usb2phy>;
> + maximum-speed = "high-speed";
> + phys = <&usb2phy_otg>;
> + phy-names = "usb2-phy";
> + status = "okay";
> +};
> +
> +&usb2phy {
> + status = "okay";
> +};
> +
> +&usb2phy_otg {
> + status = "okay";
> +};
>
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2026-09-19 9:41 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2026-09-14 13:35 [PATCH v6 0/3] arm64: dts: rockchip: Add FriendlyElec NanoPi R28S 安容 via B4 Relay
2026-09-14 13:35 ` [PATCH v6 1/3] dt-bindings: arm: " 安容 via B4 Relay
2026-09-19 9:38 ` Jonas Karlman
2026-09-14 13:35 ` [PATCH v6 2/3] arm64: dts: rockchip: Split out the common NanoPi RK3528 parts 安容 via B4 Relay
2026-09-19 9:39 ` Jonas Karlman
2026-09-14 13:35 ` [PATCH v6 3/3] arm64: dts: rockchip: Add devicetree for the FriendlyElec NanoPi R28S 安容 via B4 Relay
2026-09-19 9:40 ` Jonas Karlman
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