From: Jing Zhang <renyu.zj@linux.alibaba.com>
To: John Garry <john.g.garry@oracle.com>, Ian Rogers <irogers@google.com>
Cc: Will Deacon <will@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Robin Murphy <robin.murphy@arm.com>,
Ilkka Koskinen <ilkka@os.amperecomputing.com>,
Namhyung Kim <namhyung@kernel.org>,
Arnaldo Carvalho de Melo <acme@kernel.org>,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-perf-users@vger.kernel.org, linux-doc@vger.kernel.org,
Zhuo Song <zhuo.song@linux.alibaba.com>,
Shuai Xue <xueshuai@linux.alibaba.com>
Subject: Re: [PATCH v5 3/5] perf test: Add pmu-event test for "Compat" and new event_field.
Date: Mon, 31 Jul 2023 20:30:43 +0800 [thread overview]
Message-ID: <2dc21269-2fa0-ea39-454d-5f12a414bc13@linux.alibaba.com> (raw)
In-Reply-To: <abeaafbe-2290-d272-ddd1-f358f7271edc@oracle.com>
在 2023/7/28 下午4:30, John Garry 写道:
> On 28/07/2023 07:17, Jing Zhang wrote:
>> Add new event test for uncore system event which is used to verify the
>> functionality of "Compat" matching multiple identifiers and the new event
>> fields "EventIdCode" and "Type".
>>
>
> Thanks for doing this. It looks ok. I just have a comment, below.
>
Thanks.
>> Signed-off-by: Jing Zhang <renyu.zj@linux.alibaba.com>
>> ---
>> .../pmu-events/arch/test/test_soc/sys/uncore.json | 8 ++++
>> tools/perf/tests/pmu-events.c | 55 ++++++++++++++++++++++
>> 2 files changed, 63 insertions(+)
>>
>> diff --git a/tools/perf/pmu-events/arch/test/test_soc/sys/uncore.json b/tools/perf/pmu-events/arch/test/test_soc/sys/uncore.json
>> index c7e7528..879a0ae 100644
>> --- a/tools/perf/pmu-events/arch/test/test_soc/sys/uncore.json
>> +++ b/tools/perf/pmu-events/arch/test/test_soc/sys/uncore.json
>> @@ -12,5 +12,13 @@
>> "EventName": "sys_ccn_pmu.read_cycles",
>> "Unit": "sys_ccn_pmu",
>> "Compat": "0x01"
>> + },
>> + {
>> + "BriefDescription": "Counts total cache misses in first lookup result (high priority).",
>> + "Type": "0x05",
>> + "EventIdCode": "0x01",
>> + "EventName": "sys_cmn_pmu.hnf_cache_miss",
>> + "Unit": "arm_cmn",
>> + "Compat": "434*;436*;43c*;43a01"
>> }
>> ]
>> diff --git a/tools/perf/tests/pmu-events.c b/tools/perf/tests/pmu-events.c
>> index 1dff863b..e227dcd 100644
>> --- a/tools/perf/tests/pmu-events.c
>> +++ b/tools/perf/tests/pmu-events.c
>> @@ -255,9 +255,24 @@ struct perf_pmu_test_pmu {
>> .matching_pmu = "uncore_sys_ccn_pmu",
>> };
>> +static const struct perf_pmu_test_event sys_cmn_pmu_hnf_cache_miss = {
>> + .event = {
>> + .name = "sys_cmn_pmu.hnf_cache_miss",
>> + .event = "type=0x05,eventid=0x01",
>> + .desc = "Counts total cache misses in first lookup result (high priority). Unit: uncore_arm_cmn ",
>> + .topic = "uncore",
>> + .pmu = "uncore_arm_cmn",
>> + .compat = "434*;436*;43c*;43a01",
>> + },
>> + .alias_str = "type=0x5,eventid=0x1",
>> + .alias_long_desc = "Counts total cache misses in first lookup result (high priority). Unit: uncore_arm_cmn ",
>> + .matching_pmu = "uncore_arm_cmn_0",
>> +};
>> +
>> static const struct perf_pmu_test_event *sys_events[] = {
>> &sys_ddr_pmu_write_cycles,
>> &sys_ccn_pmu_read_cycles,
>> + &sys_cmn_pmu_hnf_cache_miss,
>> NULL
>> };
>> @@ -699,6 +714,46 @@ static int __test_uncore_pmu_event_aliases(struct perf_pmu_test_pmu *test_pmu)
>> &sys_ccn_pmu_read_cycles,
>> },
>> },
>> + {
>> + .pmu = {
>> + .name = (char *)"uncore_arm_cmn_0",
>> + .is_uncore = 1,
>> + .id = (char *)"43401",
>> + },
>> + .aliases = {
>> + &sys_cmn_pmu_hnf_cache_miss,
>> + },
>> + },
>> + {
>> + .pmu = {
>> + .name = (char *)"uncore_arm_cmn_0",
>> + .is_uncore = 1,
>> + .id = (char *)"43602",
>> + },
>> + .aliases = {
>> + &sys_cmn_pmu_hnf_cache_miss,
>> + },
>> + },
>> + {
>> + .pmu = {
>> + .name = (char *)"uncore_arm_cmn_1",
>
> Shouldn't this match some perf_pmu_test_event entry with same matching_pmu member? But is perf_pmu_test_event.matching_pmu member ever used for any checking???
>
I need to double check because I was testing against 6.3-rc2.
Thanks,
Jing
> Thanks,
> John
>
>> + .is_uncore = 1,
>> + .id = (char *)"43c03",
>> + },
>> + .aliases = {
>> + &sys_cmn_pmu_hnf_cache_miss,
>> + },
>> + },
>> + {
>> + .pmu = {
>> + .name = (char *)"uncore_arm_cmn_1",
>> + .is_uncore = 1,
>> + .id = (char *)"43a01",
>> + },
>> + .aliases = {
>> + &sys_cmn_pmu_hnf_cache_miss,
>> + },
>> + }
>> };
>> /* Test that aliases generated are as expected */
next prev parent reply other threads:[~2023-07-31 12:30 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-28 6:17 [PATCH v5 0/5] Add aliases and metrics for Arm CMN Jing Zhang
2023-07-28 6:17 ` [PATCH v5 1/5] perf metric: Event "Compat" value supports matching multiple identifiers Jing Zhang
2023-07-28 8:11 ` John Garry
2023-07-31 10:59 ` Jing Zhang
2023-07-31 13:16 ` John Garry
2023-08-02 9:38 ` Jing Zhang
2023-08-02 9:43 ` John Garry
2023-08-02 9:47 ` Jing Zhang
2023-07-28 6:17 ` [PATCH v5 2/5] perf jevents: Support more event fields Jing Zhang
2023-07-28 6:17 ` [PATCH v5 3/5] perf test: Add pmu-event test for "Compat" and new event_field Jing Zhang
2023-07-28 8:30 ` John Garry
2023-07-31 12:30 ` Jing Zhang [this message]
2023-07-31 13:12 ` John Garry
2023-08-01 9:19 ` Jing Zhang
2023-08-01 15:10 ` John Garry
2023-08-02 3:49 ` Jing Zhang
2023-07-28 6:17 ` [PATCH v5 4/5] perf jevents: Add support for Arm CMN PMU aliasing Jing Zhang
2023-07-28 8:17 ` John Garry
2023-07-31 12:31 ` Jing Zhang
2023-07-28 6:17 ` [PATCH v5 5/5] perf vendor events: Add JSON metrics for Arm CMN Jing Zhang
2023-07-28 8:18 ` John Garry
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