[PATCH v4 0/2] Add support for K3 BIST

[PATCH v4 0/2] Add support for K3 BIST

[Neha Malcom Francis]

BIST (Built-In Self Test) is an IP responsible for triggering hardware
circuitry tests on both logic as well as memory blocks. This driver is
currently being upstreamed in U-Boot [1] (on hold till the dt-binding
is approved here) and triggers these tests on cores. This patch series
adds the dt-binding as well as a node for BIST on J784S4 and J742S2.

Changes since v3:
https://lore.kernel.org/all/20250514072056.639346-1-n-francis@ti.com/
- Udit
	- add support for J742S2

Changes since v2:
https://lore.kernel.org/all/20250328111439.374748-1-n-francis@ti.com/
- Krzysztof
	- use existing common definition (ti,sci-dev-id) for grabbing
	  the device ID instead of redefining properties

Changes since v1:
https://lore.kernel.org/all/20241128140825.263216-1-n-francis@ti.com/
- Krzysztof
	- move from misc/ to soc/ti/
	- minor property changes
	- drop ti,bist-instance and instead opt for ti,bist-under-test
	- correct example dt

[1] https://lore.kernel.org/all/20250204123147.939917-1-n-francis@ti.com/

Neha Malcom Francis (2):
  dt-bindings: soc: ti: bist: Add BIST for K3 devices
  arm64: dts: ti: k3-j784s4-j742s2-main-common: Add PBIST_14 node

 .../bindings/soc/ti/ti,j784s4-bist.yaml       | 63 +++++++++++++++++++
 .../dts/ti/k3-j784s4-j742s2-main-common.dtsi  | 11 ++++
 2 files changed, 74 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/soc/ti/ti,j784s4-bist.yaml

-- 
2.34.1

[PATCH v4 1/2] dt-bindings: soc: ti: bist: Add BIST for K3 devices

[Neha Malcom Francis]

Document the binding for TI K3 BIST (Built-In Self Test) block.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
---
No change since v3

 .../bindings/soc/ti/ti,j784s4-bist.yaml       | 63 +++++++++++++++++++
 1 file changed, 63 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/soc/ti/ti,j784s4-bist.yaml

diff --git a/Documentation/devicetree/bindings/soc/ti/ti,j784s4-bist.yaml b/Documentation/devicetree/bindings/soc/ti/ti,j784s4-bist.yaml
new file mode 100644
index 000000000000..a73691cf5624
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/ti/ti,j784s4-bist.yaml
@@ -0,0 +1,63 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+# Copyright (C) 2025 Texas Instruments Incorporated
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/soc/ti/ti,j784s4-bist.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Texas Instruments K3 BIST
+
+maintainers:
+  - Neha Malcom Francis <n-francis@ti.com>
+
+allOf:
+  - $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml#
+
+description:
+  The BIST (Built-In Self Test) module is an IP block present in K3 devices
+  that support triggering of BIST tests, both PBIST (Memory BIST) and LBIST
+  (Logic BIST) on a core. Both tests are destructive in nature. At boot, BIST
+  is executed by hardware for the MCU domain automatically as part of HW POST.
+
+properties:
+  compatible:
+    const: ti,j784s4-bist
+
+  reg:
+    maxItems: 2
+
+  reg-names:
+    items:
+      - const: cfg
+      - const: ctrl_mmr
+
+  clocks:
+    maxItems: 1
+
+  power-domains:
+    maxItems: 1
+
+required:
+  - compatible
+  - reg
+  - reg-names
+  - ti,sci-dev-id
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/soc/ti,sci_pm_domain.h>
+    bus {
+        #address-cells = <2>;
+        #size-cells = <2>;
+        safety-selftest@33c0000 {
+            compatible = "ti,j784s4-bist";
+            reg = <0x00 0x033c0000 0x00 0x400>,
+                  <0x00 0x0010c1a0 0x00 0x01c>;
+            reg-names = "cfg", "ctrl_mmr";
+            clocks = <&k3_clks 237 7>;
+            power-domains = <&k3_pds 237 TI_SCI_PD_EXCLUSIVE>;
+            ti,sci-dev-id = <234>;
+        };
+    };
-- 
2.34.1

[PATCH v4 2/2] arm64: dts: ti: k3-j784s4-j742s2-main-common: Add PBIST_14 node

[Neha Malcom Francis]

Add DT node for PBIST_14 that is responsible for triggering the PBIST
self-tests for the MAIN_R5_2_x cores.

Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
---
Changes since v3:
- add support for J742S2 as well by moving node to common DTSI

 .../boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi     | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi
index 1944616ab357..50954e9d5779 100644
--- a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi
@@ -2670,4 +2670,15 @@ mcasp4: mcasp@2b40000 {
 		power-domains = <&k3_pds 269 TI_SCI_PD_EXCLUSIVE>;
 		status = "disabled";
 	};
+
+	bist_main14: bist@33c0000 {
+		compatible = "ti,j784s4-bist";
+		reg = <0x00 0x033c0000 0x00 0x400>,
+		      <0x00 0x0010c1a0 0x00 0x01c>;
+		reg-names = "cfg", "ctrl_mmr";
+		clocks = <&k3_clks 237 7>;
+		power-domains = <&k3_pds 237 TI_SCI_PD_EXCLUSIVE>;
+		bootph-pre-ram;
+		ti,sci-dev-id = <234>;
+	};
 };
-- 
2.34.1

Re: [PATCH v4 0/2] Add support for K3 BIST

[Vignesh Raghavendra]

On 05/06/25 12:05, Neha Malcom Francis wrote:
> BIST (Built-In Self Test) is an IP responsible for triggering hardware
> circuitry tests on both logic as well as memory blocks. This driver is
> currently being upstreamed in U-Boot [1] (on hold till the dt-binding
> is approved here) and triggers these tests on cores. This patch series
> adds the dt-binding as well as a node for BIST on J784S4 and J742S2.
> 
> Changes since v3:
> https://lore.kernel.org/all/20250514072056.639346-1-n-francis@ti.com/
> - Udit
> 	- add support for J742S2
> 
> Changes since v2:
> https://lore.kernel.org/all/20250328111439.374748-1-n-francis@ti.com/
> - Krzysztof
> 	- use existing common definition (ti,sci-dev-id) for grabbing
> 	  the device ID instead of redefining properties
> 
> Changes since v1:
> https://lore.kernel.org/all/20241128140825.263216-1-n-francis@ti.com/
> - Krzysztof
> 	- move from misc/ to soc/ti/
> 	- minor property changes
> 	- drop ti,bist-instance and instead opt for ti,bist-under-test
> 	- correct example dt
> 
> [1] https://lore.kernel.org/all/20250204123147.939917-1-n-francis@ti.com/
> 
> Neha Malcom Francis (2):
>   dt-bindings: soc: ti: bist: Add BIST for K3 devices
>   arm64: dts: ti: k3-j784s4-j742s2-main-common: Add PBIST_14 node
> 
>  .../bindings/soc/ti/ti,j784s4-bist.yaml       | 63 +++++++++++++++++++
>  .../dts/ti/k3-j784s4-j742s2-main-common.dtsi  | 11 ++++
>  2 files changed, 74 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/soc/ti/ti,j784s4-bist.yaml
> 


Nishanth,

Ok to take the dt-bindings via ti-k3-dts-next branch? Or would you
prefer to queue bindings and DT changes separately?

-- 
Regards
Vignesh
https://ti.com/opensource

Re: [PATCH v4 0/2] Add support for K3 BIST

[Nishanth Menon]

On 09:40-20250626, Vignesh Raghavendra wrote:
> 
> 
> On 05/06/25 12:05, Neha Malcom Francis wrote:
> > BIST (Built-In Self Test) is an IP responsible for triggering hardware
> > circuitry tests on both logic as well as memory blocks. This driver is
> > currently being upstreamed in U-Boot [1] (on hold till the dt-binding
> > is approved here) and triggers these tests on cores. This patch series
> > adds the dt-binding as well as a node for BIST on J784S4 and J742S2.
> > 
> > Changes since v3:
> > https://lore.kernel.org/all/20250514072056.639346-1-n-francis@ti.com/
> > - Udit
> > 	- add support for J742S2
> > 
> > Changes since v2:
> > https://lore.kernel.org/all/20250328111439.374748-1-n-francis@ti.com/
> > - Krzysztof
> > 	- use existing common definition (ti,sci-dev-id) for grabbing
> > 	  the device ID instead of redefining properties
> > 
> > Changes since v1:
> > https://lore.kernel.org/all/20241128140825.263216-1-n-francis@ti.com/
> > - Krzysztof
> > 	- move from misc/ to soc/ti/
> > 	- minor property changes
> > 	- drop ti,bist-instance and instead opt for ti,bist-under-test
> > 	- correct example dt
> > 
> > [1] https://lore.kernel.org/all/20250204123147.939917-1-n-francis@ti.com/
> > 
> > Neha Malcom Francis (2):
> >   dt-bindings: soc: ti: bist: Add BIST for K3 devices
> >   arm64: dts: ti: k3-j784s4-j742s2-main-common: Add PBIST_14 node
> > 
> >  .../bindings/soc/ti/ti,j784s4-bist.yaml       | 63 +++++++++++++++++++
> >  .../dts/ti/k3-j784s4-j742s2-main-common.dtsi  | 11 ++++
> >  2 files changed, 74 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/soc/ti/ti,j784s4-bist.yaml
> > 
> 
> 
> Nishanth,
> 
> Ok to take the dt-bindings via ti-k3-dts-next branch? Or would you
> prefer to queue bindings and DT changes separately?

The ti-k3-dts-next should be fine here. I dont seem to have anything to
queue on the soc driver this time around..

-- 
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3  1A34 DDB5 849D 1736 249D

Re: [PATCH v4 0/2] Add support for K3 BIST

[Vignesh Raghavendra]

Hi Neha Malcom Francis,

On Thu, 05 Jun 2025 12:05:04 +0530, Neha Malcom Francis wrote:
> BIST (Built-In Self Test) is an IP responsible for triggering hardware
> circuitry tests on both logic as well as memory blocks. This driver is
> currently being upstreamed in U-Boot [1] (on hold till the dt-binding
> is approved here) and triggers these tests on cores. This patch series
> adds the dt-binding as well as a node for BIST on J784S4 and J742S2.
> 
> Changes since v3:
> https://lore.kernel.org/all/20250514072056.639346-1-n-francis@ti.com/
> - Udit
> 	- add support for J742S2
> 
> [...]

I have applied the following to branch ti-k3-dts-next on [1].
Thank you!

[1/2] dt-bindings: soc: ti: bist: Add BIST for K3 devices
      commit: 04ee170b69749851c74666079ac8f64dba52a2f1
[2/2] arm64: dts: ti: k3-j784s4-j742s2-main-common: Add PBIST_14 node
      commit: 387727d7e5d9c2499aafbd04e22c9d39e8eec4c5

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent up the chain during
the next merge window (or sooner if it is a relevant bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

[1] https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux.git
--
Vignesh