* [PATCH v2 2/2] arm64: dts: qcom: sm8550: Add support for Samsung Galaxy Tab S9 Wi-Fi
2026-10-05 19:47 [PATCH v2 0/2] Add Samsung Galaxy Tab S9 Wi-Fi (SM-X710) support Nizat Mikayilli via B4 Relay
2026-10-05 19:47 ` [PATCH v2 1/2] dt-bindings: arm: qcom: Add Samsung Galaxy Tab S9 Wi-Fi Nizat Mikayilli via B4 Relay
@ 2026-10-05 19:47 ` Nizat Mikayilli via B4 Relay
2026-10-12 14:14 ` Konrad Dybcio
1 sibling, 1 reply; 5+ messages in thread
From: Nizat Mikayilli via B4 Relay @ 2026-10-05 19:47 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: Abel Vesa, linux-arm-msm, devicetree, linux-kernel, Nizat Mikayilli
From: Nizat Mikayilli <nacht@dxdmail.cc>
Add support for the Samsung Galaxy Tab S9 Wi-Fi (SM-X710, codename
gts9wifi) tablet, based on the SM8550 SoC. This is the Wi-Fi SKU, so the
modem memory regions are removed and no modem firmware is referenced.
Described hardware: UFS storage, the microSD slot, USB 2.0 peripheral
mode over the eUSB2 PHY with an NXP PTN3222 repeater, the
bootloader-provided framebuffer console, power and volume keys, the
book-cover switch, GPU, video decoder, ADSP with the internal audio path
(four CS35L45 speaker amplifiers and the VA-macro digital microphones).
Tested on hardware: booted via U-Boot on top of linux-next
next-20261002, with the default kernel command line (no
clk_ignore_unused, pd_ignore_unused or regulator_ignore_unused).
Verified: UFS storage enumeration, USB 2.0 gadget, framebuffer console,
power and volume keys, the book-cover switch, CPU frequency scaling, GPU
(firmware loads, render node present), video decoder (device opens),
ADSP booting at startup with the sound card registered and all four
amplifiers and the VA macro probing. The microSD slot is described but
not yet tested; audio playback and capture were not exercised.
The display panel, touch, pen digitizer, cameras, battery/charging and
the wireless module are not described here; the latter needs additional
power sequencing and follows as a separate series.
Assisted-by: LLM
Signed-off-by: Nizat Mikayilli <nacht@dxdmail.cc>
---
arch/arm64/boot/dts/qcom/Makefile | 1 +
.../boot/dts/qcom/sm8550-samsung-gts9wifi.dts | 664 +++++++++++++++++++++
2 files changed, 665 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
index 88230c4e00ea..9372ec7b57b6 100644
--- a/arch/arm64/boot/dts/qcom/Makefile
+++ b/arch/arm64/boot/dts/qcom/Makefile
@@ -438,6 +438,7 @@ dtb-$(CONFIG_ARCH_QCOM) += sm8550-hdk-rear-camera-card.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm8550-hdk.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm8550-mtp.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm8550-qrd.dtb
+dtb-$(CONFIG_ARCH_QCOM) += sm8550-samsung-gts9wifi.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm8550-samsung-q5q.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm8550-sony-xperia-yodo-pdx234.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm8650-ayaneo-pocket-s2.dtb
diff --git a/arch/arm64/boot/dts/qcom/sm8550-samsung-gts9wifi.dts b/arch/arm64/boot/dts/qcom/sm8550-samsung-gts9wifi.dts
new file mode 100644
index 000000000000..369cd921bc04
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/sm8550-samsung-gts9wifi.dts
@@ -0,0 +1,664 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024, Alexandru Marc Serdeliuc <serdeliuk@yahoo.com>
+ * Copyright (c) 2024, David Wronek <david@mainlining.org>
+ * Copyright (c) 2022, Linaro Limited
+ * Copyright (c) 2026, Nizat Mikayilli <nacht@dxdmail.cc>
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
+#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
+#include "sm8550.dtsi"
+#include "pm8550.dtsi"
+#include "pm8550vs.dtsi"
+#include "pmk8550.dtsi"
+
+/* This is the Wi-Fi SKU: no modem firmware is shipped. */
+/delete-node/ &ipa_fw_mem;
+/delete-node/ &ipa_gsi_mem;
+/delete-node/ &mpss_dsm_mem;
+/delete-node/ &mpss_mem;
+/delete-node/ &q6_mpss_dtb_mem;
+/delete-node/ &rmtfs_mem;
+/delete-node/ &spu_modem_shared_mem;
+
+/ {
+ model = "Samsung Galaxy Tab S9 Wi-Fi";
+ compatible = "samsung,gts9wifi", "qcom,sm8550";
+ chassis-type = "tablet";
+
+ aliases {
+ serial0 = &uart7;
+ };
+
+ chosen {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ framebuffer@b8000000 {
+ compatible = "simple-framebuffer";
+ reg = <0x0 0xb8000000 0x0 0xfa0000>;
+ width = <2560>;
+ height = <1600>;
+ stride = <(2560 * 4)>;
+ format = "a8r8g8b8";
+ clocks = <&gcc GCC_DISP_HF_AXI_CLK>;
+ };
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+ pinctrl-0 = <&volume_up_n>, <&hall_cover_n>;
+ pinctrl-names = "default";
+
+ key-volume-up {
+ label = "Volume Up";
+ linux,code = <KEY_VOLUMEUP>;
+ gpios = <&pm8550_gpios 6 GPIO_ACTIVE_LOW>;
+ debounce-interval = <15>;
+ linux,can-disable;
+ wakeup-source;
+ };
+
+ switch-lid {
+ label = "Book Cover";
+ linux,input-type = <EV_SW>;
+ linux,code = <SW_LID>;
+ gpios = <&tlmm 107 GPIO_ACTIVE_LOW>;
+ debounce-interval = <50>;
+ wakeup-source;
+ };
+ };
+
+ speaker_vdd: regulator-speaker-vdd {
+ compatible = "regulator-fixed";
+ regulator-name = "speaker_vdd";
+ gpio = <&tlmm 19 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ regulator-boot-on;
+ };
+
+ reserved-memory {
+ chipinfo_mem: chipinfo@81cf4000 {
+ reg = <0x0 0x81cf4000 0x0 0x1000>;
+ no-map;
+ };
+
+ kaslr_mem: kaslr@b01ff000 {
+ reg = <0x0 0xb01ff000 0x0 0x1000>;
+ no-map;
+ };
+
+ uh_heap_mem: uh-heap@b0200000 {
+ reg = <0x0 0xb0200000 0x0 0x40000>;
+ no-map;
+ };
+
+ uh_guest_mem: uh-guest@b1000000 {
+ reg = <0x0 0xb1000000 0x0 0x3000000>;
+ no-map;
+ };
+
+ splash-region@b8000000 {
+ reg = <0x0 0xb8000000 0x0 0x2b00000>;
+ no-map;
+ };
+
+ llcc_lpi_mem: llcc-lpi@ff800000 {
+ reg = <0x0 0xff800000 0x0 0x600000>;
+ no-map;
+ };
+ };
+
+ sound {
+ compatible = "qcom,sm8550-sndcard", "qcom,sm8450-sndcard";
+ model = "Samsung-Galaxy-Tab-S9";
+
+ pinctrl-0 = <&tdm0_clk_active>, <&tdm0_ws_active>,
+ <&tdm0_din_active>, <&tdm0_dout_active>;
+ pinctrl-names = "default";
+
+ speaker-playback-dai-link {
+ link-name = "CS35L45 Speaker Playback";
+
+ cpu {
+ sound-dai = <&q6apmbedai PRIMARY_MI2S_RX>;
+ };
+
+ codec {
+ sound-dai = <&cs35l45_fl 0>, <&cs35l45_fr 0>,
+ <&cs35l45_rl 0>, <&cs35l45_rr 0>;
+ };
+
+ platform {
+ sound-dai = <&q6apm>;
+ };
+ };
+
+ va-capture-dai-link {
+ link-name = "Internal DMIC Capture";
+
+ cpu {
+ sound-dai = <&q6apmbedai VA_CODEC_DMA_TX_0>;
+ };
+
+ codec {
+ sound-dai = <&lpass_vamacro 0>;
+ };
+
+ platform {
+ sound-dai = <&q6apm>;
+ };
+ };
+ };
+};
+
+/* Samsung's ADSP/SLPI firmware needs a larger carveout than the reference. */
+&adspslpi_mem {
+ reg = <0x0 0x9ea00000 0x0 0x59b4000>;
+};
+
+&apps_rsc {
+ regulators-0 {
+ compatible = "qcom,pm8550-rpmh-regulators";
+ qcom,pmic-id = "b";
+
+ /* Sensor VDD; the ADSP firmware expects it to be on. */
+ vreg_l1b_1p8: ldo1 {
+ regulator-name = "vreg_l1b_1p8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ regulator-always-on;
+ };
+
+ vreg_l5b_3p104: ldo5 {
+ regulator-name = "vreg_l5b_3p104";
+ regulator-min-microvolt = <3104000>;
+ regulator-max-microvolt = <3104000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ regulator-allow-set-load;
+ regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l8b_1p8: ldo8 {
+ regulator-name = "vreg_l8b_1p8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l9b_2p9: ldo9 {
+ regulator-name = "vreg_l9b_2p9";
+ regulator-min-microvolt = <2960000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ /* DMIC bias, not switched by the VA macro driver. */
+ vreg_l10b_1p8: ldo10 {
+ regulator-name = "vreg_l10b_1p8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ regulator-always-on;
+ };
+
+ vreg_l15b_1p8: ldo15 {
+ regulator-name = "vreg_l15b_1p8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ regulator-allow-set-load;
+ regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ /* Sensor VDDIO; the ADSP firmware expects it to be on. */
+ vreg_l16b_3p0: ldo16 {
+ regulator-name = "vreg_l16b_3p0";
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ regulator-always-on;
+ };
+
+ vreg_l17b_2p5: ldo17 {
+ regulator-name = "vreg_l17b_2p5";
+ regulator-min-microvolt = <2504000>;
+ regulator-max-microvolt = <2504000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ regulator-allow-set-load;
+ regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
+ };
+ };
+
+ regulators-1 {
+ compatible = "qcom,pm8550vs-rpmh-regulators";
+ qcom,pmic-id = "e";
+
+ vreg_l1e_0p88: ldo1 {
+ regulator-name = "vreg_l1e_0p88";
+ regulator-min-microvolt = <880000>;
+ regulator-max-microvolt = <880000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l3e_1p2: ldo3 {
+ regulator-name = "vreg_l3e_1p2";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+ };
+
+ regulators-2 {
+ compatible = "qcom,pm8550ve-rpmh-regulators";
+ qcom,pmic-id = "f";
+
+ vreg_l3f_0p88: ldo3 {
+ regulator-name = "vreg_l3f_0p88";
+ regulator-min-microvolt = <880000>;
+ regulator-max-microvolt = <912000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+ };
+
+ regulators-3 {
+ compatible = "qcom,pm8550vs-rpmh-regulators";
+ qcom,pmic-id = "g";
+
+ vreg_l1g_1p2: ldo1 {
+ regulator-name = "vreg_l1g_1p2";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ regulator-allow-set-load;
+ regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l3g_1p2: ldo3 {
+ regulator-name = "vreg_l3g_1p2";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+ };
+};
+
+/* Keep the bootloader-initialised display clocks for simple-framebuffer. */
+&dispcc {
+ status = "disabled";
+};
+
+&gpi_dma1 {
+ status = "okay";
+};
+
+&gpu {
+ status = "okay";
+
+ zap-shader {
+ firmware-name = "qcom/sm8550/Samsung/gts9wifi/a740_zap.mbn";
+ };
+};
+
+&hub_i2c6_data_clk {
+ drive-strength = <8>;
+};
+
+/* The SM-X710 firmware reserves a slightly larger HW-fence window than MTP. */
+&hwfence_shbuf {
+ reg = <0x0 0xe6440000 0x0 0x2dd000>;
+};
+
+&i2c6 {
+ clock-frequency = <400000>;
+ status = "okay";
+
+ eusb2_repeater: redriver@4f {
+ compatible = "nxp,ptn3222";
+ reg = <0x4f>;
+ #phy-cells = <0>;
+
+ vdd3v3-supply = <&vreg_l5b_3p104>;
+ vdd1v8-supply = <&vreg_l15b_1p8>;
+ reset-gpios = <&pm8550vs_d_gpios 4 GPIO_ACTIVE_LOW>;
+
+ pinctrl-0 = <&eusb2_reset_default>;
+ pinctrl-names = "default";
+ };
+};
+
+&i2c_hub_6 {
+ clock-frequency = <400000>;
+ status = "okay";
+
+ cs35l45_rl: amplifier@30 {
+ compatible = "cirrus,cs35l45";
+ reg = <0x30>;
+ #sound-dai-cells = <1>;
+ interrupts-extended = <&tlmm 14 IRQ_TYPE_LEVEL_LOW>;
+ reset-gpios = <&tlmm 42 GPIO_ACTIVE_HIGH>;
+ vdd-a-supply = <&speaker_vdd>;
+ vdd-batt-supply = <&speaker_vdd>;
+ pinctrl-0 = <&cs35l45_gpio_default>;
+ pinctrl-names = "default";
+ sound-name-prefix = "Rear Left";
+ cirrus,asp-sdout-hiz-ctrl = <3>;
+
+ cirrus,gpio-ctrl1 {
+ gpio-ctrl = <2>;
+ };
+
+ cirrus,gpio-ctrl2 {
+ gpio-ctrl = <2>;
+ };
+ };
+
+ cs35l45_fl: amplifier@31 {
+ compatible = "cirrus,cs35l45";
+ reg = <0x31>;
+ #sound-dai-cells = <1>;
+ interrupts-extended = <&tlmm 14 IRQ_TYPE_LEVEL_LOW>;
+ reset-gpios = <&tlmm 42 GPIO_ACTIVE_HIGH>;
+ vdd-a-supply = <&speaker_vdd>;
+ vdd-batt-supply = <&speaker_vdd>;
+ pinctrl-0 = <&cs35l45_gpio_default>;
+ pinctrl-names = "default";
+ sound-name-prefix = "Front Left";
+ cirrus,asp-sdout-hiz-ctrl = <3>;
+
+ cirrus,gpio-ctrl1 {
+ gpio-ctrl = <2>;
+ };
+
+ cirrus,gpio-ctrl2 {
+ gpio-ctrl = <2>;
+ };
+ };
+
+ cs35l45_rr: amplifier@32 {
+ compatible = "cirrus,cs35l45";
+ reg = <0x32>;
+ #sound-dai-cells = <1>;
+ interrupts-extended = <&tlmm 14 IRQ_TYPE_LEVEL_LOW>;
+ reset-gpios = <&tlmm 42 GPIO_ACTIVE_HIGH>;
+ vdd-a-supply = <&speaker_vdd>;
+ vdd-batt-supply = <&speaker_vdd>;
+ pinctrl-0 = <&cs35l45_gpio_default>;
+ pinctrl-names = "default";
+ sound-name-prefix = "Rear Right";
+ cirrus,asp-sdout-hiz-ctrl = <3>;
+
+ cirrus,gpio-ctrl1 {
+ gpio-ctrl = <2>;
+ };
+
+ cirrus,gpio-ctrl2 {
+ gpio-ctrl = <2>;
+ };
+ };
+
+ cs35l45_fr: amplifier@33 {
+ compatible = "cirrus,cs35l45";
+ reg = <0x33>;
+ #sound-dai-cells = <1>;
+ interrupts-extended = <&tlmm 14 IRQ_TYPE_LEVEL_LOW>;
+ reset-gpios = <&tlmm 42 GPIO_ACTIVE_HIGH>;
+ vdd-a-supply = <&speaker_vdd>;
+ vdd-batt-supply = <&speaker_vdd>;
+ pinctrl-0 = <&cs35l45_gpio_default>;
+ pinctrl-names = "default";
+ sound-name-prefix = "Front Right";
+ cirrus,asp-sdout-hiz-ctrl = <3>;
+
+ cirrus,gpio-ctrl1 {
+ gpio-ctrl = <2>;
+ };
+
+ cirrus,gpio-ctrl2 {
+ gpio-ctrl = <2>;
+ };
+ };
+};
+
+&i2c_master_hub_0 {
+ status = "okay";
+};
+
+&ipa {
+ /delete-property/ memory-region;
+};
+
+&iris {
+ firmware-name = "qcom/sm8550/Samsung/gts9wifi/vpu30_4v.mbn";
+ status = "okay";
+};
+
+&lpass_tlmm {
+ dmic45_default: dmic45-default-state {
+ clk-pins {
+ pins = "gpio12";
+ function = "dmic3_clk";
+ drive-strength = <8>;
+ output-high;
+ };
+
+ data-pins {
+ pins = "gpio13";
+ function = "dmic3_data";
+ drive-strength = <8>;
+ input-enable;
+ };
+ };
+
+ dmic67_default: dmic67-default-state {
+ clk-pins {
+ pins = "gpio17";
+ function = "dmic4_clk";
+ drive-strength = <8>;
+ output-high;
+ };
+
+ data-pins {
+ pins = "gpio18";
+ function = "dmic4_data";
+ drive-strength = <8>;
+ input-enable;
+ };
+ };
+};
+
+&lpass_vamacro {
+ pinctrl-0 = <&dmic01_default>, <&dmic23_default>,
+ <&dmic45_default>, <&dmic67_default>;
+ pinctrl-names = "default";
+ qcom,dmic-sample-rate = <4800000>;
+ vdd-micb-supply = <&vreg_l10b_1p8>;
+ status = "okay";
+};
+
+&pm8550_gpios {
+ sdc2_card_det_n: sdc2-card-det-state {
+ pins = "gpio12";
+ function = "normal";
+ input-enable;
+ output-disable;
+ bias-pull-up;
+ power-source = <1>;
+ };
+
+ volume_up_n: volume-up-n-state {
+ pins = "gpio6";
+ function = "normal";
+ power-source = <1>;
+ bias-pull-up;
+ input-enable;
+ };
+};
+
+&pm8550vs_d {
+ status = "okay";
+};
+
+&pm8550vs_d_gpios {
+ eusb2_reset_default: eusb2-reset-state {
+ pins = "gpio4";
+ function = "normal";
+ power-source = <1>;
+ input-enable;
+ output-enable;
+ drive-push-pull;
+ qcom,drive-strength = <PMIC_GPIO_STRENGTH_MED>;
+ bias-disable;
+ };
+};
+
+&pm8550vs_e {
+ status = "okay";
+};
+
+&pm8550vs_g {
+ status = "okay";
+};
+
+&pon_pwrkey {
+ status = "okay";
+};
+
+&pon_resin {
+ linux,code = <KEY_VOLUMEDOWN>;
+ status = "okay";
+};
+
+&qupv3_id_0 {
+ status = "okay";
+};
+
+&remoteproc_adsp {
+ firmware-name = "qcom/sm8550/Samsung/gts9wifi/adsp.mbn",
+ "qcom/sm8550/Samsung/gts9wifi/adsp_dtb.mbn";
+ status = "okay";
+};
+
+&remoteproc_mpss {
+ /delete-property/ memory-region;
+};
+
+&sdhc_2 {
+ cd-gpios = <&pm8550_gpios 12 GPIO_ACTIVE_LOW>;
+ pinctrl-0 = <&sdc2_default>, <&sdc2_card_det_n>;
+ pinctrl-1 = <&sdc2_sleep>, <&sdc2_card_det_n>;
+ pinctrl-names = "default", "sleep";
+ vmmc-supply = <&vreg_l9b_2p9>;
+ vqmmc-supply = <&vreg_l8b_1p8>;
+ bus-width = <4>;
+ no-sdio;
+ no-mmc;
+ status = "okay";
+};
+
+&sleep_clk {
+ clock-frequency = <32764>;
+};
+
+&tlmm {
+ /* GPIO36..39 are owned by TrustZone. */
+ gpio-reserved-ranges = <36 4>;
+
+ cs35l45_gpio_default: cs35l45-gpio-default-state {
+ pins = "gpio14", "gpio42";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-disable;
+ };
+
+ hall_cover_n: hall-cover-n-state {
+ pins = "gpio107";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-disable;
+ };
+
+ tdm0_clk_active: tdm0-clk-active-state {
+ pins = "gpio126";
+ function = "i2s0_sck";
+ drive-strength = <2>;
+ bias-disable;
+ };
+
+ tdm0_din_active: tdm0-din-active-state {
+ pins = "gpio127";
+ function = "i2s0_data0";
+ drive-strength = <2>;
+ bias-disable;
+ };
+
+ tdm0_dout_active: tdm0-dout-active-state {
+ pins = "gpio128";
+ function = "i2s0_data1";
+ drive-strength = <2>;
+ bias-disable;
+ };
+
+ tdm0_ws_active: tdm0-ws-active-state {
+ pins = "gpio129";
+ function = "i2s0_ws";
+ drive-strength = <2>;
+ bias-disable;
+ };
+};
+
+&uart7 {
+ status = "okay";
+};
+
+&ufs_mem_hc {
+ reset-gpios = <&tlmm 210 GPIO_ACTIVE_LOW>;
+ vcc-supply = <&vreg_l17b_2p5>;
+ vcc-max-microamp = <1300000>;
+ vccq-supply = <&vreg_l1g_1p2>;
+ vccq-max-microamp = <1200000>;
+ vdd-hba-supply = <&vreg_l3g_1p2>;
+ status = "okay";
+};
+
+&ufs_mem_phy {
+ vdda-phy-supply = <&vreg_l1e_0p88>;
+ vdda-pll-supply = <&vreg_l3e_1p2>;
+ status = "okay";
+};
+
+/* Without a Type-C controller driver, keep the DWC3 in peripheral mode. */
+&usb_1 {
+ dr_mode = "peripheral";
+ status = "okay";
+};
+
+&usb_1_hsphy {
+ vdd-supply = <&vreg_l1e_0p88>;
+ vdda12-supply = <&vreg_l3e_1p2>;
+ phys = <&eusb2_repeater>;
+ status = "okay";
+};
+
+/* Referenced by usb_1 as its USB3 PHY. */
+&usb_dp_qmpphy {
+ vdda-phy-supply = <&vreg_l3f_0p88>;
+ vdda-pll-supply = <&vreg_l3e_1p2>;
+ status = "okay";
+};
+
+&xo_board {
+ clock-frequency = <76800000>;
+};
--
2.55.0
^ permalink raw reply [flat|nested] 5+ messages in thread