From: Kyle Switch <kyle.switch@motor-comm.com>
To: Andrew Lunn <andrew@lunn.ch>
Cc: Frank.Sae@motor-comm.com, hkallweit1@gmail.com,
linux@armlinux.org.uk, davem@davemloft.net, edumazet@google.com,
kuba@kernel.org, pabeni@redhat.com, netdev@vger.kernel.org,
linux-kernel@vger.kernel.org, ming.xu@motor-comm.com,
xiaolin.xu@motor-comm.com, jianmin.wang@motor-comm.com,
jie.han@motor-comm.com
Subject: Re: [PATCH net-next v5] net: phy: Add driver for Motorcomm Quad 2.5GbE phy
Date: Sun, 26 Jul 2026 12:24:52 +0800 [thread overview]
Message-ID: <2f1f6891-8ae8-4e39-a5be-a2c8a59b562b@motor-comm.com> (raw)
In-Reply-To: <0d789c95-5ca1-42d0-9ff5-27392cc65057@lunn.ch>
On 7/25/26 06:18, Andrew Lunn wrote:
> On Fri, Jul 24, 2026 at 03:18:47PM +0200, Andrew Lunn wrote:
> 1;4000;47c> > Ans: It is different from the m88e1111 PHY, which may support UTP, fiber,
>>> or combo mode. However, the PHY8824 is only used with UTPs, and
>>> its structure is as follows, which includes UTP0, UTP1,UTP2,UTP3 and USXGMII.
>>>
>>> RJ45 <----> UTP0 <------>
>>> RJ45 <----> UTP1 <------> USXGMII <-----> USXGMII(the side of MAC)
>>> RJ45 <----> UTP2 <------>
>>> RJ45 <----> UTP3 <------>
>>>
>>> It is similar to phy8821 driver in motorcomm.c, with the difference
>>> being that one has one UTP port and phy8824 has four UTP ports.
>>> YT8824_RSSR_FIBER_SPACE is used to access USXGMII reg space, Perhaps it
>>> would be more accurate to call it YT8824_RSSR_USXGMII_SPACE or
>>> YT8824_RSSR_SERDES_SPACE.
>>
>> O.K, that completely changes my understanding of this device. Yes,
>> YT8824_RSSR_FIBER_SPACE should change name. And i would include this
>> diagram in the driver, and indicate how YT8824_RSSR_*_SPACE map to
>> this.
>>
>> For the locking, look thought all the code which is touching the
>> USXGMII side and see if it can be moved into probe().
>
> So thinking about locking:
>
> +static int yt8824_config_aneg(struct phy_device *phydev)
> +{
> + int phy_ctrl = 0;
> + int ret = 0;
> +
> + ret = phy8824_page_write_lock(phydev, YT8824_RSSR_UTP_SPACE);
> + if (ret < 0)
> + return ret;
> +
> + if (linkmode_test_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT,
> + phydev->advertising))
> + phy_ctrl = MDIO_AN_10GBT_CTRL_ADV2_5G;
> +
> + ret = phy_modify_mmd_changed(phydev, MDIO_MMD_AN,
> + MDIO_AN_10GBT_CTRL,
> + MDIO_AN_10GBT_CTRL_ADV2_5G,
> + phy_ctrl);
> + if (ret)
> + return ret;
> +
> + return genphy_config_aneg(phydev);
> +
>
> This is only touching the UTP side of things. What a PHY advertises
> should not affect the USXGMII side. Why does it need
> YT8824_RSSR_UTP_SPACE? What would happen if YT8824_RSSR_USXGMII_SPACE
> has selected?
>
Ans: i have updated PATCH v6 in
https://patchwork.kernel.org/project/netdevbpf/patch/20260723102112.1155723-1-kyle.switch@motor-comm.com/.
The log of this patch failure is as "Patch does not apply to net-next-0".
The patch v7 will be rebased and updated. Could you provide some comments based on patch v6 included
refactor the usage of USXGMII, add helper in phy-c45? The definition of YT8824_RSSR_FIBER_SPACE was
modified in patch v7.
> Andrew
next prev parent reply other threads:[~2026-07-26 4:24 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-21 11:48 Kyle Switch
2026-07-21 13:27 ` Andrew Lunn
2026-07-22 7:44 ` Kyle Switch
2026-07-21 14:18 ` Andrew Lunn
2026-07-22 8:06 ` Kyle Switch
2026-07-22 13:18 ` Andrew Lunn
2026-07-23 9:28 ` Kyle Switch
2026-07-23 14:27 ` Andrew Lunn
2026-07-24 11:46 ` Kyle Switch
2026-07-24 13:18 ` Andrew Lunn
2026-07-24 22:18 ` Andrew Lunn
2026-07-26 3:38 ` Kyle Switch
2026-07-26 4:24 ` Kyle Switch [this message]
2026-07-26 3:24 ` Kyle Switch
2026-07-26 14:51 ` Andrew Lunn
2026-07-27 8:47 ` Kyle Switch
2026-07-27 21:36 ` Andrew Lunn
2026-07-28 11:25 ` Kyle Switch
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