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From: Andy Lutomirski <luto@kernel.org>
To: X86 ML <x86@kernel.org>
Cc: Borislav Petkov <bpetkov@suse.de>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	Andy Lutomirski <luto@kernel.org>, Borislav Petkov <bp@alien8.de>
Subject: [PATCH 4/4] x86/mm/32: Load a sane CR3 before cpu_init() on secondary CPUs
Date: Sun, 17 Sep 2017 09:03:51 -0700	[thread overview]
Message-ID: <30cdfea504682ba3b9012e77717800a91c22097f.1505663533.git.luto@kernel.org> (raw)
In-Reply-To: <cover.1505663533.git.luto@kernel.org>
In-Reply-To: <cover.1505663533.git.luto@kernel.org>

For unknown historical reasons (i.e. Borislav doesn't recall),
32-bit kernels invoke cpu_init() on secondary CPUs with
intiial_page_table loaded into CR3.  Then they set
current->active_mm to &init_mm and call enter_lazy_tlb() before
fixing CR3.  This means that the x86 TLB code gets invoked while CR3
is inconsistent, and, with the improved PCID sanity checks I added,
we warn.

Fix it by loading swapper_pg_dir (i.e. init_mm.pgd) earlier.

Cc: Borislav Petkov <bp@alien8.de>
Reported-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reported-by: Pavel Machek <pavel@ucw.cz>
Fixes: 72c0098d92ce ("x86/mm: Reinitialize TLB state on hotplug and resume")
Signed-off-by: Andy Lutomirski <luto@kernel.org>
---
 arch/x86/kernel/smpboot.c | 13 +++++++------
 1 file changed, 7 insertions(+), 6 deletions(-)

diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index 0854ff169274..ad59edd84de7 100644
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -232,12 +232,6 @@ static void notrace start_secondary(void *unused)
 	 */
 	if (boot_cpu_has(X86_FEATURE_PCID))
 		__write_cr4(__read_cr4() | X86_CR4_PCIDE);
-	cpu_init();
-	x86_cpuinit.early_percpu_clock_init();
-	preempt_disable();
-	smp_callin();
-
-	enable_start_cpu0 = 0;
 
 #ifdef CONFIG_X86_32
 	/* switch away from the initial page table */
@@ -245,6 +239,13 @@ static void notrace start_secondary(void *unused)
 	__flush_tlb_all();
 #endif
 
+	cpu_init();
+	x86_cpuinit.early_percpu_clock_init();
+	preempt_disable();
+	smp_callin();
+
+	enable_start_cpu0 = 0;
+
 	/* otherwise gcc will move up smp_processor_id before the cpu_init */
 	barrier();
 	/*
-- 
2.13.5

  parent reply	other threads:[~2017-09-17 16:04 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-09-17 16:03 [PATCH 0/4] More PCID fixes Andy Lutomirski
2017-09-17 16:03 ` [PATCH 1/4] x86/mm: Factor out CR3-building code Andy Lutomirski
2017-09-17 18:18   ` [tip:x86/urgent] " tip-bot for Andy Lutomirski
2017-09-17 16:03 ` [PATCH 2/4] x86/mm/64: Stop using CR3.PCID == 0 in ASID-aware code Andy Lutomirski
2017-09-17 18:19   ` [tip:x86/urgent] " tip-bot for Andy Lutomirski
2017-09-17 16:03 ` [PATCH 3/4] x86/mm/32: Move setup_clear_cpu_cap(X86_FEATURE_PCID) earlier Andy Lutomirski
2017-09-17 18:19   ` [tip:x86/urgent] " tip-bot for Andy Lutomirski
2017-09-17 16:03 ` Andy Lutomirski [this message]
2017-09-17 18:19   ` [tip:x86/urgent] x86/mm/32: Load a sane CR3 before cpu_init() on secondary CPUs tip-bot for Andy Lutomirski
2017-09-18  8:17     ` Paul Menzel
2017-09-20 12:52     ` Pavel Machek

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