Re: [PATCH] arm64: dts: broadcom: Fix L2 linesize for Raspberry Pi 5

[Florian Fainelli <florian.fainelli@broadcom.com>]

On 10/10/24 09:30, Conor Dooley wrote:
> On Thu, Oct 10, 2024 at 11:04:07AM -0400, Willow Cunningham wrote:
>> From: Willow Cunningham <willow.e.cunningham@gmail.com>
>>
>> Fixes: faa3381267d0 ("arm64: dts: broadcom: Add minimal support for
>> Raspberry Pi 5")
> 
> This btw Willow, is meant to be...
> 
>>
>> Set the cache-line-size parameter of the L2 cache for each core to the
>> correct value of 64 bytes.
>>
>> Previously, the L2 cache line size was incorrectly set to 128 bytes
>> for the Broadcom BCM2712. This causes validation tests for the
>> Performance Application Programming Interface (PAPI) tool to fail as
>> they depend on sysfs accurately reporting cache line sizes.
>>
>> The correct value of 64 bytes is stated in the official documentation of
>> the ARM Cortex A-72, which is linked in the comments of
>> arm64/boot/dts/broadcom/bcm2712.dtsi as the source for cache-line-size.
>>
> 
>> Signed-off-by: Willow Cunningham <willow.e.cunningham@maine.edu>
> 
> Down here, on the line before your signoff. Perhaps Florian is willing
> to fix that for you though.

Yeah, I will fix it up while applying.
-- 
Florian