From: Jie Gan <quic_jiegan@quicinc.com>
To: James Clark <james.clark@linaro.org>
Cc: <quic_tingweiz@quicinc.com>, <quic_jinlmao@quicinc.com>,
<coresight@lists.linaro.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-arm-msm@vger.kernel.org>,
<linux-stm32@st-md-mailman.stormreply.com>,
<suzuki.poulose@arm.com>, <mike.leach@linaro.org>,
<alexander.shishkin@linux.intel.com>, <mcoquelin.stm32@gmail.com>,
<alexandre.torgue@foss.st.com>, <robh@kernel.org>,
<krzk+dt@kernel.org>, <conor+dt@kernel.org>,
<andersson@kernel.org>, <konradybcio@kernel.org>
Subject: Re: [PATCH 0/3] coresight: Alloc trace ID after building the path
Date: Wed, 5 Feb 2025 12:13:32 +0800 [thread overview]
Message-ID: <33302e34-2e13-4bda-ae44-4c111167dde5@quicinc.com> (raw)
In-Reply-To: <20250131163617.1730505-1-james.clark@linaro.org>
On 2/1/2025 12:36 AM, James Clark wrote:
> Proof of concept to support CTCU device. Applies to Jie's patchset in
> the parent email. I think this would be a good simplification, it
> removes some code and makes things a bit clearer, and works for both the
> old and new CTCU requirements. It will require merging into the parent
> patchset somehow as it undoes some of those changes.
Hi, James
I tested the patch series and it works well.
Can I combine these patchsets with mine with co-developed tag?
Or are you prefer to submit them independently?
I believe it would be easier to read if we combined the codes together.
Thanks,
Jie
>
> James Clark (3):
> coresight: Don't save handle in path
> coresight: Export coresight_get_sink()
> coresight: Alloc trace ID after building the path
>
> drivers/hwtracing/coresight/coresight-core.c | 107 +++++++++++++-----
> drivers/hwtracing/coresight/coresight-dummy.c | 9 +-
> drivers/hwtracing/coresight/coresight-etb10.c | 8 +-
> .../hwtracing/coresight/coresight-etm-perf.c | 20 ++--
> drivers/hwtracing/coresight/coresight-etm.h | 1 -
> .../coresight/coresight-etm3x-core.c | 84 ++------------
> .../coresight/coresight-etm3x-sysfs.c | 3 +-
> .../coresight/coresight-etm4x-core.c | 83 ++------------
> .../coresight/coresight-etm4x-sysfs.c | 4 +-
> drivers/hwtracing/coresight/coresight-etm4x.h | 1 -
> drivers/hwtracing/coresight/coresight-priv.h | 17 +--
> drivers/hwtracing/coresight/coresight-stm.c | 5 +-
> drivers/hwtracing/coresight/coresight-sysfs.c | 6 +-
> .../hwtracing/coresight/coresight-tmc-etf.c | 9 +-
> .../hwtracing/coresight/coresight-tmc-etr.c | 13 +--
> drivers/hwtracing/coresight/coresight-tmc.h | 2 +-
> drivers/hwtracing/coresight/coresight-tpda.c | 3 +-
> drivers/hwtracing/coresight/coresight-tpdm.c | 3 +-
> drivers/hwtracing/coresight/coresight-tpiu.c | 2 +-
> drivers/hwtracing/coresight/coresight-trbe.c | 4 +-
> drivers/hwtracing/coresight/ultrasoc-smb.c | 8 +-
> include/linux/coresight.h | 25 +++-
> 22 files changed, 159 insertions(+), 258 deletions(-)
>
next prev parent reply other threads:[~2025-02-05 4:14 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-24 7:25 [PATCH v9 0/6] Coresight: Add Coresight TMC Control Unit driver Jie Gan
2025-01-24 7:25 ` [PATCH v9 1/6] Coresight: Add support for new APB clock name Jie Gan
2025-01-24 7:25 ` [PATCH v9 2/6] Coresight: Add trace_id function to retrieving the trace ID Jie Gan
2025-01-24 7:25 ` [PATCH v9 3/6] Coresight: Introduce a new struct coresight_path Jie Gan
2025-01-28 11:54 ` James Clark
2025-01-29 0:57 ` Jie Gan
2025-01-31 16:36 ` [PATCH 0/3] coresight: Alloc trace ID after building the path James Clark
2025-01-31 16:36 ` [PATCH 1/3] coresight: Don't save handle in path James Clark
2025-02-06 3:02 ` Jie Gan
2025-02-06 14:34 ` James Clark
2025-01-31 16:36 ` [PATCH 2/3] coresight: Export coresight_get_sink() James Clark
2025-01-31 16:36 ` [PATCH 3/3] coresight: Alloc trace ID after building the path James Clark
2025-02-05 4:13 ` Jie Gan [this message]
2025-02-05 7:44 ` [PATCH 0/3] " Jie Gan
2025-01-31 16:43 ` [PATCH v9 3/6] Coresight: Introduce a new struct coresight_path James Clark
2025-02-05 4:09 ` Jie Gan
2025-01-24 7:25 ` [PATCH v9 4/6] dt-bindings: arm: Add Coresight TMC Control Unit hardware Jie Gan
2025-01-24 7:25 ` [PATCH v9 5/6] Coresight: Add Coresight TMC Control Unit driver Jie Gan
2025-01-28 11:55 ` James Clark
2025-01-29 0:46 ` Jie Gan
2025-01-29 10:35 ` James Clark
2025-01-29 13:02 ` Jie Gan
2025-01-29 14:07 ` James Clark
2025-01-24 7:25 ` [PATCH v9 6/6] arm64: dts: qcom: sa8775p: Add CTCU and ETR nodes Jie Gan
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=33302e34-2e13-4bda-ae44-4c111167dde5@quicinc.com \
--to=quic_jiegan@quicinc.com \
--cc=alexander.shishkin@linux.intel.com \
--cc=alexandre.torgue@foss.st.com \
--cc=andersson@kernel.org \
--cc=conor+dt@kernel.org \
--cc=coresight@lists.linaro.org \
--cc=devicetree@vger.kernel.org \
--cc=james.clark@linaro.org \
--cc=konradybcio@kernel.org \
--cc=krzk+dt@kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-stm32@st-md-mailman.stormreply.com \
--cc=mcoquelin.stm32@gmail.com \
--cc=mike.leach@linaro.org \
--cc=quic_jinlmao@quicinc.com \
--cc=quic_tingweiz@quicinc.com \
--cc=robh@kernel.org \
--cc=suzuki.poulose@arm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®