* [PATCH v2 1/2] dt-bindings: arm: qcom: Add Acer Aspire 1 @ 2023-03-15 5:12 Nikita Travkin 2023-03-15 5:12 ` [PATCH v2 2/2] arm64: dts: " Nikita Travkin 2023-03-15 6:33 ` [PATCH v2 1/2] dt-bindings: arm: " Krzysztof Kozlowski 0 siblings, 2 replies; 5+ messages in thread From: Nikita Travkin @ 2023-03-15 5:12 UTC (permalink / raw) To: agross, andersson Cc: robh+dt, krzysztof.kozlowski+dt, konrad.dybcio, linux-arm-msm, devicetree, linux-kernel, ~postmarketos/upstreaming, Nikita Travkin Acer Aspire 1 is a laptop based on sc7180. Document it's compatible. Signed-off-by: Nikita Travkin <nikita@trvn.ru> --- Changes in v2: - Merge with IDP (Krzysztof) --- Documentation/devicetree/bindings/arm/qcom.yaml | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index 23c9c9ba5d52..10e92bdec11e 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -352,9 +352,9 @@ properties: - qcom,qru1000-idp - const: qcom,qru1000 - - description: Qualcomm Technologies, Inc. SC7180 IDP - items: + - items: - enum: + - acer,aspire1 - qcom,sc7180-idp - const: qcom,sc7180 -- 2.39.2 ^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH v2 2/2] arm64: dts: qcom: Add Acer Aspire 1 2023-03-15 5:12 [PATCH v2 1/2] dt-bindings: arm: qcom: Add Acer Aspire 1 Nikita Travkin @ 2023-03-15 5:12 ` Nikita Travkin 2023-03-15 10:33 ` Konrad Dybcio 2023-03-15 6:33 ` [PATCH v2 1/2] dt-bindings: arm: " Krzysztof Kozlowski 1 sibling, 1 reply; 5+ messages in thread From: Nikita Travkin @ 2023-03-15 5:12 UTC (permalink / raw) To: agross, andersson Cc: robh+dt, krzysztof.kozlowski+dt, konrad.dybcio, linux-arm-msm, devicetree, linux-kernel, ~postmarketos/upstreaming, Nikita Travkin Acer Aspire 1 is a WoA laptop based on Snapdragon 7c gen1 platform. The laptop design is similar to trogdor in the choice of primary components but the specifics on usage of those differ slightly. Add the devicetree for the laptop with support for most of the hardware present. Signed-off-by: Nikita Travkin <nikita@trvn.ru> --- Notable features absent from this patch: - Sound While the dedicated sound components are defined, since the ADSP must be used, sound requires additions of that remoteproc as well some extra "glue" to connect the i2s outputs to it. I was able to hack together some sound based on sm8250 stuff but it needs more work. - Embedded Controller The laptop has a dedicated EC that controls, notably, battery/charger and notifies the device about the USB-C DisplayPort HPD events. As per this patch, there is no battery status indication and external display support. Also, due to the EC defaults, the fn key is disabled. I have an experimental driver that implements all of that, which needs more work and will be submitted at a later date. Changed in v2: - Various styling, ordering and node naming issues fixed. (Krzysztof) --- arch/arm64/boot/dts/qcom/Makefile | 1 + .../boot/dts/qcom/sc7180-acer-aspire1.dts | 871 ++++++++++++++++++ 2 files changed, 872 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/sc7180-acer-aspire1.dts diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index 89e23a74bc7f..4bd4b4079b17 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -76,6 +76,7 @@ dtb-$(CONFIG_ARCH_QCOM) += sa8155p-adp.dtb dtb-$(CONFIG_ARCH_QCOM) += sa8295p-adp.dtb dtb-$(CONFIG_ARCH_QCOM) += sa8540p-ride.dtb dtb-$(CONFIG_ARCH_QCOM) += sa8775p-ride.dtb +dtb-$(CONFIG_ARCH_QCOM) += sc7180-acer-aspire1.dtb dtb-$(CONFIG_ARCH_QCOM) += sc7180-idp.dtb dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-coachz-r1.dtb dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-coachz-r1-lte.dtb diff --git a/arch/arm64/boot/dts/qcom/sc7180-acer-aspire1.dts b/arch/arm64/boot/dts/qcom/sc7180-acer-aspire1.dts new file mode 100644 index 000000000000..669b44494e6e --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sc7180-acer-aspire1.dts @@ -0,0 +1,871 @@ +// SPDX-License-Identifier: BSD-3-Clause + +/dts-v1/; + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/regulator/qcom,rpmh-regulator.h> + +#include "sc7180.dtsi" + +#include "pm6150.dtsi" +#include "pm6150l.dtsi" + +/delete-node/ &tz_mem; +/delete-node/ &ipa_fw_mem; + +/ { + model = "Acer Aspire 1"; + compatible = "acer,aspire1", "qcom,sc7180"; + chassis-type = "laptop"; + + aliases { + bluetooth0 = &bluetooth; + hsuart0 = &uart3; + serial0 = &uart8; + wifi0 = &wifi; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + reserved-memory { + zap_mem: zap-shader@80840000 { + reg = <0 0x80840000 0 0x2000>; + no-map; + }; + + venus_mem: venus@85b00000 { + reg = <0 0x85b00000 0 0x500000>; + no-map; + }; + + mpss_mem: mpss@86000000 { + reg = <0x0 0x86000000 0x0 0x2000000>; + no-map; + }; + + adsp_mem: adsp@8e400000 { + reg = <0x0 0x8e400000 0x0 0x2800000>; + no-map; + }; + + wlan_mem: wlan@93900000 { + reg = <0x0 0x93900000 0x0 0x200000>; + no-map; + }; + }; + + max98357a: audio-codec { + compatible = "maxim,max98357a"; + sdmode-gpios = <&tlmm 23 GPIO_ACTIVE_HIGH>; + + pinctrl-0 = <&_sd_mode_default>; + pinctrl-names = "default"; + + #sound-dai-cells = <0>; + }; + + backlight: backlight { + compatible = "pwm-backlight"; + pwms = <&sn65dsi86_bridge 1000000>; + enable-gpios = <&tlmm 10 GPIO_ACTIVE_HIGH>; + + pinctrl-0 = <&soc_bkoff_default>; + pinctrl-names = "default"; + }; + + reg_brij_1p2: bridge-1p2-regulator { + compatible = "regulator-fixed"; + regulator-name = "brij_1p2"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + + gpio = <&tlmm 19 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 = <®_edp_1p2_en_default>; + pinctrl-names = "default"; + }; + + reg_brij_1p8: bridge-regulator { + compatible = "regulator-fixed"; + regulator-name = "brij_1p8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + vin-supply = <&vreg_l8c_1p8>; + + gpio = <&tlmm 20 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 = <®_edp_1p8_en_default>; + pinctrl-names = "default"; + }; + + reg_codec_3p3: codec-regulator { + compatible = "regulator-fixed"; + regulator-name = "codec_3p3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&tlmm 83 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 = <®_audio_en_default>; + pinctrl-names = "default"; + }; + + reg_lcm_3p3: panel-regulator { + compatible = "regulator-fixed"; + regulator-name = "lcm_3p3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + /* + * HACK: Display fails with + * + * *ERROR* Unexpected max rate (0x0); assuming 5.4 GHz + * *ERROR* Link training failed, link is off (-5) + * + * if the power to the panel was ever cut + */ + regulator-always-on; + + gpio = <&tlmm 26 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 = <®_lcm_en_default>; + pinctrl-names = "default"; + }; + + reg_tp_3p3: touchpad-regulator { + compatible = "regulator-fixed"; + regulator-name = "tp_3p3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&tlmm 25 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 = <®_tp_en_default>; + pinctrl-names = "default"; + }; +}; + +&camcc { + status = "disabled"; +}; + +&dsi0 { + vdda-supply = <&vreg_l3c_1p2>; + status = "okay"; +}; + +&dsi0_out { + remote-endpoint = <&sn65dsi86_in>; + data-lanes = <0 1 2 3>; +}; + +&dsi_phy { + vdds-supply = <&vreg_l4a_0p8>; + status = "okay"; +}; + +&i2c2 { + clock-frequency = <400000>; + status = "okay"; + + /* embedded-controller@76 */ +}; + +&i2c4 { + clock-frequency = <400000>; + status = "okay"; + + /* + * NOTE: DSDT defines two possible touchpads, other one is + * + * reg = <0x15>; + * hid-descr-addr = <0x1>; + */ + + touchpad@2c { + compatible = "hid-over-i2c"; + reg = <0x2c>; + hid-descr-addr = <0x20>; + + vdd-supply = <®_tp_3p3>; + + interrupts-extended = <&tlmm 94 IRQ_TYPE_LEVEL_LOW>; + + pinctrl-0 = <&hid_touchpad_default>; + pinctrl-names = "default"; + }; + + keyboard@3a { + compatible = "hid-over-i2c"; + reg = <0x3a>; + hid-descr-addr = <0x1>; + + interrupts-extended = <&tlmm 33 IRQ_TYPE_LEVEL_LOW>; + + pinctrl-0 = <&hid_keyboard_default>; + pinctrl-names = "default"; + + wakeup-source; + }; +}; + +&i2c9 { + clock-frequency = <400000>; + status = "okay"; + + alc5682: codec@1a { + compatible = "realtek,rt5682i"; + reg = <0x1a>; + + #sound-dai-cells = <1>; + + interrupt-parent = <&tlmm>; + interrupts = <28 IRQ_TYPE_EDGE_BOTH>; + + pinctrl-0 = <&codec_irq_default>; + pinctrl-names = "default"; + + AVDD-supply = <&vreg_l15a_1p8>; + MICVDD-supply = <®_codec_3p3>; + VBAT-supply = <®_codec_3p3>; + + realtek,dmic1-data-pin = <1>; + realtek,dmic1-clk-pin = <1>; + realtek,jd-src = <1>; + }; +}; + +&i2c10 { + clock-frequency = <400000>; + status = "okay"; + + sn65dsi86_bridge: bridge@2c { + compatible = "ti,sn65dsi86"; + reg = <0x2c>; + gpio-controller; + #gpio-cells = <2>; + #pwm-cells = <1>; + + interrupt-parent = <&tlmm>; + interrupts = <11 IRQ_TYPE_LEVEL_HIGH>; + + enable-gpios = <&tlmm 51 GPIO_ACTIVE_HIGH>; + suspend-gpios = <&tlmm 22 GPIO_ACTIVE_LOW>; + + pinctrl-0 = <&bridge_en_default>, + <&edp_bridge_irq_default>, + <&bridge_suspend_default>; + pinctrl-names = "default"; + + vpll-supply = <®_brij_1p8>; + vccio-supply = <®_brij_1p8>; + vcca-supply = <®_brij_1p2>; + vcc-supply = <®_brij_1p2>; + + clocks = <&rpmhcc RPMH_LN_BB_CLK3>; + clock-names = "refclk"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + sn65dsi86_in: endpoint { + remote-endpoint = <&dsi0_out>; + }; + }; + + port@1 { + reg = <1>; + + sn65dsi86_out: endpoint { + data-lanes = <0 1>; + remote-endpoint = <&panel_in_edp>; + }; + }; + }; + + aux-bus { + panel: panel { + compatible = "edp-panel"; + power-supply = <®_lcm_3p3>; + backlight = <&backlight>; + + port { + panel_in_edp: endpoint { + remote-endpoint = <&sn65dsi86_out>; + }; + }; + }; + }; + }; +}; + +&gpu { + status = "okay"; + + zap-shader { + memory-region = <&zap_mem>; + firmware-name = "qcom/sc7180-acer-aspire1/qcdxkmsuc7180.mbn"; + }; +}; + +/* Seems like ADSP really insists on managing those lpass bits itself */ +&lpasscc { + status = "disabled"; +}; + +&lpass_hm { + status = "disabled"; +}; + +&mdp { + status = "okay"; +}; + +&mdss { + status = "okay"; +}; + +&pm6150_adc { + thermistor@4e { + reg = <ADC5_AMUX_THM2_100K_PU>; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; + + charger-thermistor@4f { + reg = <ADC5_AMUX_THM3_100K_PU>; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; +}; + +&pm6150_adc_tm { + status = "okay"; + + charger-thermistor@0 { + reg = <0>; + io-channels = <&pm6150_adc ADC5_AMUX_THM3_100K_PU>; + qcom,ratiometric; + qcom,hw-settle-time-us = <200>; + }; + + thermistor@1 { + reg = <1>; + io-channels = <&pm6150_adc ADC5_AMUX_THM2_100K_PU>; + qcom,ratiometric; + qcom,hw-settle-time-us = <200>; + }; +}; + +&pm6150_pon { status = "disabled"; }; + +&qupv3_id_0 { + status = "okay"; +}; + +&qupv3_id_1 { + status = "okay"; +}; + +&remoteproc_mpss { + firmware-name = "qcom/sc7180-acer-aspire1/qcmpss7180_nm.mbn"; + status = "okay"; +}; + +&sdhc_1 { + pinctrl-0 = <&sdc1_default>; + pinctrl-1 = <&sdc1_sleep>; + pinctrl-names = "default", "sleep"; + vmmc-supply = <&vreg_l19a_2p9>; + vqmmc-supply = <&vreg_l12a_1p8>; + + status = "okay"; +}; + +&uart3 { + /delete-property/interrupts; + interrupts-extended = <&intc GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>, + <&tlmm 41 IRQ_TYPE_EDGE_FALLING>; + + pinctrl-1 = <&qup_uart3_sleep>; + pinctrl-names = "default", "sleep"; + + status = "okay"; + + bluetooth: bluetooth { + compatible = "qcom,wcn3991-bt"; + vddio-supply = <&vreg_l10a_1p8>; + vddxo-supply = <&vreg_l1c_1p8>; + vddrf-supply = <&vreg_l2c_1p3>; + vddch0-supply = <&vreg_l10c_3p3>; + max-speed = <3200000>; + }; +}; + +&uart8 { + status = "okay"; +}; + +&usb_1 { + status = "okay"; +}; + +&usb_1_dwc3 { + dr_mode = "host"; + #address-cells = <1>; + #size-cells = <0>; + + usb_hub_2_x: hub@1 { + compatible = "usbbda,5411"; + reg = <1>; + peer-hub = <&usb_hub_3_x>; + }; + + usb_hub_3_x: hub@2 { + compatible = "usbbda,411"; + reg = <2>; + peer-hub = <&usb_hub_2_x>; + }; +}; + +&usb_1_hsphy { + vdd-supply = <&vreg_l4a_0p8>; + vdda-pll-supply = <&vreg_l11a_1p8>; + vdda-phy-dpdm-supply = <&vreg_l17a_3p0>; + qcom,imp-res-offset-value = <8>; + qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_15_PERCENT>; + qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>; + qcom,bias-ctrl-value = <0x22>; + qcom,charge-ctrl-value = <3>; + qcom,hsdisc-trim-value = <0>; + + status = "okay"; +}; + +&usb_1_qmpphy { + vdda-phy-supply = <&vreg_l3c_1p2>; + vdda-pll-supply = <&vreg_l4a_0p8>; + status = "okay"; +}; + +&venus { + firmware-name = "qcom/sc7180-acer-aspire1/qcvss7180.mbn"; +}; + +&wifi { + vdd-0.8-cx-mx-supply = <&vreg_l9a_0p6>; + vdd-1.8-xo-supply = <&vreg_l1c_1p8>; + vdd-1.3-rfa-supply = <&vreg_l2c_1p3>; + vdd-3.3-ch0-supply = <&vreg_l10c_3p3>; + vdd-3.3-ch1-supply = <&vreg_l11c_3p3>; + status = "okay"; +}; + +&apps_rsc { + regulators-0 { + compatible = "qcom,pm6150-rpmh-regulators"; + qcom,pmic-id = "a"; + + vreg_s1a_1p1: smps1 { + regulator-min-microvolt = <1128000>; + regulator-max-microvolt = <1128000>; + }; + + vreg_l4a_0p8: ldo4 { + regulator-min-microvolt = <824000>; + regulator-max-microvolt = <928000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l9a_0p6: ldo9 { + regulator-min-microvolt = <488000>; + regulator-max-microvolt = <800000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l10a_1p8: ldo10 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + + regulator-always-on; + regulator-boot-on; + }; + + vreg_l11a_1p8: ldo11 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l12a_1p8: ldo12 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l13a_1p8: ldo13 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l14a_1p8: ldo14 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l15a_1p8: ldo15 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l16a_2p7: ldo16 { + regulator-min-microvolt = <2496000>; + regulator-max-microvolt = <3304000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l17a_3p0: ldo17 { + regulator-min-microvolt = <2920000>; + regulator-max-microvolt = <3232000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l18a_2p8: ldo18 { + regulator-min-microvolt = <2496000>; + regulator-max-microvolt = <3304000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l19a_2p9: ldo19 { + regulator-min-microvolt = <2960000>; + regulator-max-microvolt = <2960000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + }; + + regulators-1 { + compatible = "qcom,pm6150l-rpmh-regulators"; + qcom,pmic-id = "c"; + + vreg_s8c_1p3: smps8 { + regulator-min-microvolt = <1120000>; + regulator-max-microvolt = <1408000>; + }; + + vreg_l1c_1p8: ldo1 { + regulator-min-microvolt = <1616000>; + regulator-max-microvolt = <1984000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l2c_1p3: ldo2 { + regulator-min-microvolt = <1168000>; + regulator-max-microvolt = <1304000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l3c_1p2: ldo3 { + regulator-min-microvolt = <1144000>; + regulator-max-microvolt = <1304000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l4c_1p8: ldo4 { + regulator-min-microvolt = <1648000>; + regulator-max-microvolt = <3304000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>; + }; + + vreg_l5c_1p8: ldo5 { + regulator-min-microvolt = <1648000>; + regulator-max-microvolt = <3304000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>; + }; + + vreg_l6c_2p9: ldo6 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2950000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l7c_3p0: ldo7 { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3312000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>; + }; + + vreg_l8c_1p8: ldo8 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l9c_2p9: ldo9 { + regulator-min-microvolt = <2952000>; + regulator-max-microvolt = <2952000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l10c_3p3: ldo10 { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3400000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l11c_3p3: ldo11 { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3400000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_bob: bob { + regulator-min-microvolt = <3008000>; + regulator-max-microvolt = <3960000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>; + }; + }; +}; + +&qup_i2c2_default { + drive-strength = <2>; + + /* Has external pullup */ + bias-disable; +}; + +&qup_i2c4_default { + drive-strength = <2>; + + /* Has external pullup */ + bias-disable; +}; + +&qup_i2c9_default { + drive-strength = <2>; + + /* Has external pullup */ + bias-disable; +}; + +&qup_i2c10_default { + drive-strength = <2>; + + /* Has external pullup */ + bias-disable; +}; + +&tlmm { + /* + * The TZ seem to protect those because some boards can have + * fingerprint sensor connected to this range. Not connected + * on this board + */ + gpio-reserved-ranges = <58 5>; + + amp_sd_mode_default: amp-sd-mode-deault-state { + pins = "gpio23"; + function = "gpio"; + drive-strength = <16>; + bias-disable; + }; + + bridge_en_default: bridge-en-default-state { + pins = "gpio51"; + function = "gpio"; + drive-strength = <16>; + bias-disable; + }; + + bridge_suspend_default: bridge-suspend-default-state { + pins = "gpio22"; + function = "gpio"; + drive-strength = <16>; + bias-pull-up; + }; + + codec_irq_default: codec-irq-deault-state { + pins = "gpio28"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + edp_bridge_irq_default: edp-bridge-irq-default-state { + pins = "gpio11"; + function = "gpio"; + drive-strength = <2>; + bias-pull-down; + }; + + hid_keyboard_default: hid-keyboard-default-state { + pins = "gpio33"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + hid_touchpad_default: hid-touchpad-default-state { + pins = "gpio94"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + qup_uart3_sleep: qup-uart3-sleep-state { + cts-pins { + /* + * Configure a pull-down on CTS to match the pull of + * the Bluetooth module. + */ + pins = "gpio38"; + function = "gpio"; + bias-pull-down; + }; + + rts-pins { + /* + * Configure pull-down on RTS. As RTS is active low + * signal, pull it low to indicate the BT SoC that it + * can wakeup the system anytime from suspend state by + * pulling RX low (by sending wakeup bytes). + */ + pins = "gpio39"; + function = "gpio"; + bias-pull-down; + }; + + tx-pins { + /* + * Configure pull-up on TX when it isn't actively driven + * to prevent BT SoC from receiving garbage during sleep. + */ + pins = "gpio40"; + function = "gpio"; + bias-pull-up; + }; + + rx-pins { + /* + * Configure a pull-up on RX. This is needed to avoid + * garbage data when the TX pin of the Bluetooth module + * is floating which may cause spurious wakeups. + */ + pins = "gpio41"; + function = "gpio"; + bias-pull-up; + }; + }; + + reg_edp_1p2_en_default: reg-edp-1p2-en-deault-state { + pins = "gpio19"; + function = "gpio"; + drive-strength = <16>; + bias-disable; + }; + + reg_edp_1p8_en_default: reg-edp-1p8-en-deault-state { + pins = "gpio20"; + function = "gpio"; + drive-strength = <16>; + bias-disable; + }; + + reg_lcm_en_default: reg-lcm-en-deault-state { + pins = "gpio26"; + function = "gpio"; + drive-strength = <16>; + bias-disable; + }; + + reg_audio_en_default: reg-audio-en-deault-state { + pins = "gpio83"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + reg_tp_en_default: reg-tp-en-deault-state { + pins = "gpio25"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + soc_bkoff_default: soc-bkoff-deault-state { + pins = "gpio10"; + function = "gpio"; + drive-strength = <16>; + bias-disable; + }; + + sdc1_default: sdc1-default-state { + clk-pins { + pins = "sdc1_clk"; + bias-disable; + drive-strength = <16>; + }; + + cmd-pins { + pins = "sdc1_cmd"; + bias-pull-up; + drive-strength = <16>; + }; + + data-pins { + pins = "sdc1_data"; + bias-pull-up; + drive-strength = <16>; + }; + + rclk-pins { + pins = "sdc1_rclk"; + bias-pull-down; + }; + }; + + sdc1_sleep: sdc1-sleep-state { + clk-pins { + pins = "sdc1_clk"; + bias-disable; + drive-strength = <2>; + }; + + cmd-pins { + pins = "sdc1_cmd"; + bias-pull-up; + drive-strength = <2>; + }; + + data-pins { + pins = "sdc1_data"; + bias-pull-up; + drive-strength = <2>; + }; + + rclk-pins { + pins = "sdc1_rclk"; + bias-pull-down; + }; + }; + + ter_mi2s_active: ter-mi2s-active-state { + pins = "gpio63", "gpio64", "gpio65"; + function = "mi2s_2"; + }; +}; -- 2.39.2 ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v2 2/2] arm64: dts: qcom: Add Acer Aspire 1 2023-03-15 5:12 ` [PATCH v2 2/2] arm64: dts: " Nikita Travkin @ 2023-03-15 10:33 ` Konrad Dybcio 2023-03-15 13:22 ` Nikita Travkin 0 siblings, 1 reply; 5+ messages in thread From: Konrad Dybcio @ 2023-03-15 10:33 UTC (permalink / raw) To: Nikita Travkin, agross, andersson Cc: robh+dt, krzysztof.kozlowski+dt, linux-arm-msm, devicetree, linux-kernel, ~postmarketos/upstreaming On 15.03.2023 06:12, Nikita Travkin wrote: > Acer Aspire 1 is a WoA laptop based on Snapdragon 7c gen1 platform. > > The laptop design is similar to trogdor in the choice of primary > components but the specifics on usage of those differ slightly. > > Add the devicetree for the laptop with support for most of the > hardware present. > > Signed-off-by: Nikita Travkin <nikita@trvn.ru> > --- [...] > + > +&camcc { > + status = "disabled"; > +}; Any particular reason? The clocks should park themselves and not even waste power > + > +&dsi0 { > + vdda-supply = <&vreg_l3c_1p2>; > + status = "okay"; > +}; [...] > + > + touchpad@2c { > + compatible = "hid-over-i2c"; > + reg = <0x2c>; > + hid-descr-addr = <0x20>; > + > + vdd-supply = <®_tp_3p3>; > + > + interrupts-extended = <&tlmm 94 IRQ_TYPE_LEVEL_LOW>; > + > + pinctrl-0 = <&hid_touchpad_default>; > + pinctrl-names = "default"; > + }; No wakeup-source on the touchpad? My (different) laptop wakes up when I press on it > + > + keyboard@3a { > + compatible = "hid-over-i2c"; > + reg = <0x3a>; [...] > +&gpu { > + status = "okay"; > + > + zap-shader { > + memory-region = <&zap_mem>; > + firmware-name = "qcom/sc7180-acer-aspire1/qcdxkmsuc7180.mbn"; qcom/sc7180/acer/(aspire1|alice)/qc.. ? > + }; > +}; > + > +/* Seems like ADSP really insists on managing those lpass bits itself */ > +&lpasscc { > + status = "disabled"; > +}; > + > +&lpass_hm { > + status = "disabled"; > +}; These clocks are only accessible from HLOS on Chrome devices. I'd say disabling them by default in sc7180.dtsi would be sensible. > + > +&mdp { > + status = "okay"; > +}; Remove the status=disabled from SoC DT, MDSS is useless without MDP and one toggle is enough. > + > +&mdss { > + status = "okay"; > +}; > + > +&pm6150_adc { > + thermistor@4e { > + reg = <ADC5_AMUX_THM2_100K_PU>; > + qcom,ratiometric; > + qcom,hw-settle-time = <200>; > + }; > + > + charger-thermistor@4f { > + reg = <ADC5_AMUX_THM3_100K_PU>; > + qcom,ratiometric; > + qcom,hw-settle-time = <200>; > + }; > +}; > + > +&pm6150_adc_tm { > + status = "okay"; > + > + charger-thermistor@0 { > + reg = <0>; > + io-channels = <&pm6150_adc ADC5_AMUX_THM3_100K_PU>; > + qcom,ratiometric; > + qcom,hw-settle-time-us = <200>; > + }; > + > + thermistor@1 { > + reg = <1>; > + io-channels = <&pm6150_adc ADC5_AMUX_THM2_100K_PU>; > + qcom,ratiometric; > + qcom,hw-settle-time-us = <200>; > + }; > +}; > + > +&pm6150_pon { status = "disabled"; }; Not even for reboot control? > + > +&qupv3_id_0 { > + status = "okay"; > +}; [...] > + > +&usb_1_hsphy { > + vdd-supply = <&vreg_l4a_0p8>; > + vdda-pll-supply = <&vreg_l11a_1p8>; > + vdda-phy-dpdm-supply = <&vreg_l17a_3p0>; > + qcom,imp-res-offset-value = <8>; > + qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_15_PERCENT>; > + qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>; > + qcom,bias-ctrl-value = <0x22>; > + qcom,charge-ctrl-value = <3>; > + qcom,hsdisc-trim-value = <0>; > + > + status = "okay"; > +}; > + > +&usb_1_qmpphy { > + vdda-phy-supply = <&vreg_l3c_1p2>; > + vdda-pll-supply = <&vreg_l4a_0p8>; > + status = "okay"; Please be consistent with newlines before status. > +}; > + > +&venus { > + firmware-name = "qcom/sc7180-acer-aspire1/qcvss7180.mbn"; See previous note about the firmware path > +}; > + > +&wifi { > + vdd-0.8-cx-mx-supply = <&vreg_l9a_0p6>; > + vdd-1.8-xo-supply = <&vreg_l1c_1p8>; > + vdd-1.3-rfa-supply = <&vreg_l2c_1p3>; > + vdd-3.3-ch0-supply = <&vreg_l10c_3p3>; > + vdd-3.3-ch1-supply = <&vreg_l11c_3p3>; > + status = "okay"; > +}; [...] > + > + vreg_l10a_1p8: ldo10 { > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + Unexpected newline Konrad > + regulator-always-on; > + regulator-boot-on; > + }; > + > + vreg_l11a_1p8: ldo11 { > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l12a_1p8: ldo12 { > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l13a_1p8: ldo13 { > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l14a_1p8: ldo14 { > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l15a_1p8: ldo15 { > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l16a_2p7: ldo16 { > + regulator-min-microvolt = <2496000>; > + regulator-max-microvolt = <3304000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l17a_3p0: ldo17 { > + regulator-min-microvolt = <2920000>; > + regulator-max-microvolt = <3232000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l18a_2p8: ldo18 { > + regulator-min-microvolt = <2496000>; > + regulator-max-microvolt = <3304000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l19a_2p9: ldo19 { > + regulator-min-microvolt = <2960000>; > + regulator-max-microvolt = <2960000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + }; > + > + regulators-1 { > + compatible = "qcom,pm6150l-rpmh-regulators"; > + qcom,pmic-id = "c"; > + > + vreg_s8c_1p3: smps8 { > + regulator-min-microvolt = <1120000>; > + regulator-max-microvolt = <1408000>; > + }; > + > + vreg_l1c_1p8: ldo1 { > + regulator-min-microvolt = <1616000>; > + regulator-max-microvolt = <1984000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l2c_1p3: ldo2 { > + regulator-min-microvolt = <1168000>; > + regulator-max-microvolt = <1304000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l3c_1p2: ldo3 { > + regulator-min-microvolt = <1144000>; > + regulator-max-microvolt = <1304000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l4c_1p8: ldo4 { > + regulator-min-microvolt = <1648000>; > + regulator-max-microvolt = <3304000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>; > + }; > + > + vreg_l5c_1p8: ldo5 { > + regulator-min-microvolt = <1648000>; > + regulator-max-microvolt = <3304000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>; > + }; > + > + vreg_l6c_2p9: ldo6 { > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <2950000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l7c_3p0: ldo7 { > + regulator-min-microvolt = <3000000>; > + regulator-max-microvolt = <3312000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>; > + }; > + > + vreg_l8c_1p8: ldo8 { > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l9c_2p9: ldo9 { > + regulator-min-microvolt = <2952000>; > + regulator-max-microvolt = <2952000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l10c_3p3: ldo10 { > + regulator-min-microvolt = <3000000>; > + regulator-max-microvolt = <3400000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l11c_3p3: ldo11 { > + regulator-min-microvolt = <3000000>; > + regulator-max-microvolt = <3400000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_bob: bob { > + regulator-min-microvolt = <3008000>; > + regulator-max-microvolt = <3960000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>; > + }; > + }; > +}; > + > +&qup_i2c2_default { > + drive-strength = <2>; > + > + /* Has external pullup */ > + bias-disable; > +}; > + > +&qup_i2c4_default { > + drive-strength = <2>; > + > + /* Has external pullup */ > + bias-disable; > +}; > + > +&qup_i2c9_default { > + drive-strength = <2>; > + > + /* Has external pullup */ > + bias-disable; > +}; > + > +&qup_i2c10_default { > + drive-strength = <2>; > + > + /* Has external pullup */ > + bias-disable; > +}; > + > +&tlmm { > + /* > + * The TZ seem to protect those because some boards can have > + * fingerprint sensor connected to this range. Not connected > + * on this board > + */ > + gpio-reserved-ranges = <58 5>; > + > + amp_sd_mode_default: amp-sd-mode-deault-state { > + pins = "gpio23"; > + function = "gpio"; > + drive-strength = <16>; > + bias-disable; > + }; > + > + bridge_en_default: bridge-en-default-state { > + pins = "gpio51"; > + function = "gpio"; > + drive-strength = <16>; > + bias-disable; > + }; > + > + bridge_suspend_default: bridge-suspend-default-state { > + pins = "gpio22"; > + function = "gpio"; > + drive-strength = <16>; > + bias-pull-up; > + }; > + > + codec_irq_default: codec-irq-deault-state { > + pins = "gpio28"; > + function = "gpio"; > + drive-strength = <2>; > + bias-disable; > + }; > + > + edp_bridge_irq_default: edp-bridge-irq-default-state { > + pins = "gpio11"; > + function = "gpio"; > + drive-strength = <2>; > + bias-pull-down; > + }; > + > + hid_keyboard_default: hid-keyboard-default-state { > + pins = "gpio33"; > + function = "gpio"; > + drive-strength = <2>; > + bias-disable; > + }; > + > + hid_touchpad_default: hid-touchpad-default-state { > + pins = "gpio94"; > + function = "gpio"; > + drive-strength = <2>; > + bias-disable; > + }; > + > + qup_uart3_sleep: qup-uart3-sleep-state { > + cts-pins { > + /* > + * Configure a pull-down on CTS to match the pull of > + * the Bluetooth module. > + */ > + pins = "gpio38"; > + function = "gpio"; > + bias-pull-down; > + }; > + > + rts-pins { > + /* > + * Configure pull-down on RTS. As RTS is active low > + * signal, pull it low to indicate the BT SoC that it > + * can wakeup the system anytime from suspend state by > + * pulling RX low (by sending wakeup bytes). > + */ > + pins = "gpio39"; > + function = "gpio"; > + bias-pull-down; > + }; > + > + tx-pins { > + /* > + * Configure pull-up on TX when it isn't actively driven > + * to prevent BT SoC from receiving garbage during sleep. > + */ > + pins = "gpio40"; > + function = "gpio"; > + bias-pull-up; > + }; > + > + rx-pins { > + /* > + * Configure a pull-up on RX. This is needed to avoid > + * garbage data when the TX pin of the Bluetooth module > + * is floating which may cause spurious wakeups. > + */ > + pins = "gpio41"; > + function = "gpio"; > + bias-pull-up; > + }; > + }; > + > + reg_edp_1p2_en_default: reg-edp-1p2-en-deault-state { > + pins = "gpio19"; > + function = "gpio"; > + drive-strength = <16>; > + bias-disable; > + }; > + > + reg_edp_1p8_en_default: reg-edp-1p8-en-deault-state { > + pins = "gpio20"; > + function = "gpio"; > + drive-strength = <16>; > + bias-disable; > + }; > + > + reg_lcm_en_default: reg-lcm-en-deault-state { > + pins = "gpio26"; > + function = "gpio"; > + drive-strength = <16>; > + bias-disable; > + }; > + > + reg_audio_en_default: reg-audio-en-deault-state { > + pins = "gpio83"; > + function = "gpio"; > + drive-strength = <2>; > + bias-disable; > + }; > + > + reg_tp_en_default: reg-tp-en-deault-state { > + pins = "gpio25"; > + function = "gpio"; > + drive-strength = <2>; > + bias-disable; > + }; > + > + soc_bkoff_default: soc-bkoff-deault-state { > + pins = "gpio10"; > + function = "gpio"; > + drive-strength = <16>; > + bias-disable; > + }; > + > + sdc1_default: sdc1-default-state { > + clk-pins { > + pins = "sdc1_clk"; > + bias-disable; > + drive-strength = <16>; > + }; > + > + cmd-pins { > + pins = "sdc1_cmd"; > + bias-pull-up; > + drive-strength = <16>; > + }; > + > + data-pins { > + pins = "sdc1_data"; > + bias-pull-up; > + drive-strength = <16>; > + }; > + > + rclk-pins { > + pins = "sdc1_rclk"; > + bias-pull-down; > + }; > + }; > + > + sdc1_sleep: sdc1-sleep-state { > + clk-pins { > + pins = "sdc1_clk"; > + bias-disable; > + drive-strength = <2>; > + }; > + > + cmd-pins { > + pins = "sdc1_cmd"; > + bias-pull-up; > + drive-strength = <2>; > + }; > + > + data-pins { > + pins = "sdc1_data"; > + bias-pull-up; > + drive-strength = <2>; > + }; > + > + rclk-pins { > + pins = "sdc1_rclk"; > + bias-pull-down; > + }; > + }; > + > + ter_mi2s_active: ter-mi2s-active-state { > + pins = "gpio63", "gpio64", "gpio65"; > + function = "mi2s_2"; > + }; > +}; ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v2 2/2] arm64: dts: qcom: Add Acer Aspire 1 2023-03-15 10:33 ` Konrad Dybcio @ 2023-03-15 13:22 ` Nikita Travkin 0 siblings, 0 replies; 5+ messages in thread From: Nikita Travkin @ 2023-03-15 13:22 UTC (permalink / raw) To: Konrad Dybcio Cc: agross, andersson, robh+dt, krzysztof.kozlowski+dt, linux-arm-msm, devicetree, linux-kernel, ~postmarketos/upstreaming Konrad Dybcio писал(а) 15.03.2023 15:33: > On 15.03.2023 06:12, Nikita Travkin wrote: >> Acer Aspire 1 is a WoA laptop based on Snapdragon 7c gen1 platform. >> >> The laptop design is similar to trogdor in the choice of primary >> components but the specifics on usage of those differ slightly. >> >> Add the devicetree for the laptop with support for most of the >> hardware present. >> >> Signed-off-by: Nikita Travkin <nikita@trvn.ru> >> --- > [...] > >> + >> +&camcc { >> + status = "disabled"; >> +}; > Any particular reason? The clocks should park themselves and > not even waste power Just on the basis of it not being used. Will drop the disable if you say it stops the block properly. > >> + >> +&dsi0 { >> + vdda-supply = <&vreg_l3c_1p2>; >> + status = "okay"; >> +}; > > [...] > >> + >> + touchpad@2c { >> + compatible = "hid-over-i2c"; >> + reg = <0x2c>; >> + hid-descr-addr = <0x20>; >> + >> + vdd-supply = <®_tp_3p3>; >> + >> + interrupts-extended = <&tlmm 94 IRQ_TYPE_LEVEL_LOW>; >> + >> + pinctrl-0 = <&hid_touchpad_default>; >> + pinctrl-names = "default"; >> + }; > No wakeup-source on the touchpad? My (different) laptop wakes > up when I press on it Deliberately omitted it but I guess it was based on a personal preference than on something objective. Will add. > >> + >> + keyboard@3a { >> + compatible = "hid-over-i2c"; >> + reg = <0x3a>; > [...] > >> +&gpu { >> + status = "okay"; >> + >> + zap-shader { >> + memory-region = <&zap_mem>; >> + firmware-name = "qcom/sc7180-acer-aspire1/qcdxkmsuc7180.mbn"; > qcom/sc7180/acer/(aspire1|alice)/qc.. > > ? Will change. > >> + }; >> +}; >> + >> +/* Seems like ADSP really insists on managing those lpass bits itself */ >> +&lpasscc { >> + status = "disabled"; >> +}; >> + >> +&lpass_hm { >> + status = "disabled"; >> +}; > These clocks are only accessible from HLOS on Chrome devices. I'd say > disabling them by default in sc7180.dtsi would be sensible. > I can add a patch to v3 doing that over all 7c1 boards. > >> + >> +&mdp { >> + status = "okay"; >> +}; > Remove the status=disabled from SoC DT, MDSS is useless without MDP and > one toggle is enough. ... and for that too. > >> + >> +&mdss { >> + status = "okay"; >> +}; >> + >> +&pm6150_adc { >> + thermistor@4e { >> + reg = <ADC5_AMUX_THM2_100K_PU>; >> + qcom,ratiometric; >> + qcom,hw-settle-time = <200>; >> + }; >> + >> + charger-thermistor@4f { >> + reg = <ADC5_AMUX_THM3_100K_PU>; >> + qcom,ratiometric; >> + qcom,hw-settle-time = <200>; >> + }; >> +}; >> + >> +&pm6150_adc_tm { >> + status = "okay"; >> + >> + charger-thermistor@0 { >> + reg = <0>; >> + io-channels = <&pm6150_adc ADC5_AMUX_THM3_100K_PU>; >> + qcom,ratiometric; >> + qcom,hw-settle-time-us = <200>; >> + }; >> + >> + thermistor@1 { >> + reg = <1>; >> + io-channels = <&pm6150_adc ADC5_AMUX_THM2_100K_PU>; >> + qcom,ratiometric; >> + qcom,hw-settle-time-us = <200>; >> + }; >> +}; >> + >> +&pm6150_pon { status = "disabled"; }; > Not even for reboot control? The power key never arrives (even on Windows...) so I disabled it, mimicking trogdor. I suppose I could drop the pwrkey instead but not sure how much useful the pon registers are with the EFI on this board... > >> + >> +&qupv3_id_0 { >> + status = "okay"; >> +}; > > [...] > >> + >> +&usb_1_hsphy { >> + vdd-supply = <&vreg_l4a_0p8>; >> + vdda-pll-supply = <&vreg_l11a_1p8>; >> + vdda-phy-dpdm-supply = <&vreg_l17a_3p0>; >> + qcom,imp-res-offset-value = <8>; >> + qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_15_PERCENT>; >> + qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>; >> + qcom,bias-ctrl-value = <0x22>; >> + qcom,charge-ctrl-value = <3>; >> + qcom,hsdisc-trim-value = <0>; >> + >> + status = "okay"; >> +}; >> + >> +&usb_1_qmpphy { >> + vdda-phy-supply = <&vreg_l3c_1p2>; >> + vdda-pll-supply = <&vreg_l4a_0p8>; >> + status = "okay"; > Please be consistent with newlines before status. Will fix. > >> +}; >> + >> +&venus { >> + firmware-name = "qcom/sc7180-acer-aspire1/qcvss7180.mbn"; > See previous note about the firmware path Ack. > >> +}; >> + >> +&wifi { >> + vdd-0.8-cx-mx-supply = <&vreg_l9a_0p6>; >> + vdd-1.8-xo-supply = <&vreg_l1c_1p8>; >> + vdd-1.3-rfa-supply = <&vreg_l2c_1p3>; >> + vdd-3.3-ch0-supply = <&vreg_l10c_3p3>; >> + vdd-3.3-ch1-supply = <&vreg_l11c_3p3>; >> + status = "okay"; >> +}; > > [...] > >> + >> + vreg_l10a_1p8: ldo10 { >> + regulator-min-microvolt = <1800000>; >> + regulator-max-microvolt = <1800000>; >> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; >> + > Unexpected newline > Will drop. Thanks! Nikita > > Konrad >> + regulator-always-on; >> + regulator-boot-on; >> + }; >> + >> + vreg_l11a_1p8: ldo11 { >> + regulator-min-microvolt = <1800000>; >> + regulator-max-microvolt = <1800000>; >> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; >> + }; >> + >> + vreg_l12a_1p8: ldo12 { >> + regulator-min-microvolt = <1800000>; >> + regulator-max-microvolt = <1800000>; >> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; >> + }; >> + >> + vreg_l13a_1p8: ldo13 { >> + regulator-min-microvolt = <1800000>; >> + regulator-max-microvolt = <1800000>; >> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; >> + }; >> + >> + vreg_l14a_1p8: ldo14 { >> + regulator-min-microvolt = <1800000>; >> + regulator-max-microvolt = <1800000>; >> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; >> + }; >> + >> + vreg_l15a_1p8: ldo15 { >> + regulator-min-microvolt = <1800000>; >> + regulator-max-microvolt = <1800000>; >> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; >> + }; >> + >> + vreg_l16a_2p7: ldo16 { >> + regulator-min-microvolt = <2496000>; >> + regulator-max-microvolt = <3304000>; >> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; >> + }; >> + >> + vreg_l17a_3p0: ldo17 { >> + regulator-min-microvolt = <2920000>; >> + regulator-max-microvolt = <3232000>; >> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; >> + }; >> + >> + vreg_l18a_2p8: ldo18 { >> + regulator-min-microvolt = <2496000>; >> + regulator-max-microvolt = <3304000>; >> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; >> + }; >> + >> + vreg_l19a_2p9: ldo19 { >> + regulator-min-microvolt = <2960000>; >> + regulator-max-microvolt = <2960000>; >> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; >> + }; >> + }; >> + >> + regulators-1 { >> + compatible = "qcom,pm6150l-rpmh-regulators"; >> + qcom,pmic-id = "c"; >> + >> + vreg_s8c_1p3: smps8 { >> + regulator-min-microvolt = <1120000>; >> + regulator-max-microvolt = <1408000>; >> + }; >> + >> + vreg_l1c_1p8: ldo1 { >> + regulator-min-microvolt = <1616000>; >> + regulator-max-microvolt = <1984000>; >> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; >> + }; >> + >> + vreg_l2c_1p3: ldo2 { >> + regulator-min-microvolt = <1168000>; >> + regulator-max-microvolt = <1304000>; >> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; >> + }; >> + >> + vreg_l3c_1p2: ldo3 { >> + regulator-min-microvolt = <1144000>; >> + regulator-max-microvolt = <1304000>; >> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; >> + }; >> + >> + vreg_l4c_1p8: ldo4 { >> + regulator-min-microvolt = <1648000>; >> + regulator-max-microvolt = <3304000>; >> + regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>; >> + }; >> + >> + vreg_l5c_1p8: ldo5 { >> + regulator-min-microvolt = <1648000>; >> + regulator-max-microvolt = <3304000>; >> + regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>; >> + }; >> + >> + vreg_l6c_2p9: ldo6 { >> + regulator-min-microvolt = <1800000>; >> + regulator-max-microvolt = <2950000>; >> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; >> + }; >> + >> + vreg_l7c_3p0: ldo7 { >> + regulator-min-microvolt = <3000000>; >> + regulator-max-microvolt = <3312000>; >> + regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>; >> + }; >> + >> + vreg_l8c_1p8: ldo8 { >> + regulator-min-microvolt = <1800000>; >> + regulator-max-microvolt = <1800000>; >> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; >> + }; >> + >> + vreg_l9c_2p9: ldo9 { >> + regulator-min-microvolt = <2952000>; >> + regulator-max-microvolt = <2952000>; >> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; >> + }; >> + >> + vreg_l10c_3p3: ldo10 { >> + regulator-min-microvolt = <3000000>; >> + regulator-max-microvolt = <3400000>; >> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; >> + }; >> + >> + vreg_l11c_3p3: ldo11 { >> + regulator-min-microvolt = <3000000>; >> + regulator-max-microvolt = <3400000>; >> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; >> + }; >> + >> + vreg_bob: bob { >> + regulator-min-microvolt = <3008000>; >> + regulator-max-microvolt = <3960000>; >> + regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>; >> + }; >> + }; >> +}; >> + >> +&qup_i2c2_default { >> + drive-strength = <2>; >> + >> + /* Has external pullup */ >> + bias-disable; >> +}; >> + >> +&qup_i2c4_default { >> + drive-strength = <2>; >> + >> + /* Has external pullup */ >> + bias-disable; >> +}; >> + >> +&qup_i2c9_default { >> + drive-strength = <2>; >> + >> + /* Has external pullup */ >> + bias-disable; >> +}; >> + >> +&qup_i2c10_default { >> + drive-strength = <2>; >> + >> + /* Has external pullup */ >> + bias-disable; >> +}; >> + >> +&tlmm { >> + /* >> + * The TZ seem to protect those because some boards can have >> + * fingerprint sensor connected to this range. Not connected >> + * on this board >> + */ >> + gpio-reserved-ranges = <58 5>; >> + >> + amp_sd_mode_default: amp-sd-mode-deault-state { >> + pins = "gpio23"; >> + function = "gpio"; >> + drive-strength = <16>; >> + bias-disable; >> + }; >> + >> + bridge_en_default: bridge-en-default-state { >> + pins = "gpio51"; >> + function = "gpio"; >> + drive-strength = <16>; >> + bias-disable; >> + }; >> + >> + bridge_suspend_default: bridge-suspend-default-state { >> + pins = "gpio22"; >> + function = "gpio"; >> + drive-strength = <16>; >> + bias-pull-up; >> + }; >> + >> + codec_irq_default: codec-irq-deault-state { >> + pins = "gpio28"; >> + function = "gpio"; >> + drive-strength = <2>; >> + bias-disable; >> + }; >> + >> + edp_bridge_irq_default: edp-bridge-irq-default-state { >> + pins = "gpio11"; >> + function = "gpio"; >> + drive-strength = <2>; >> + bias-pull-down; >> + }; >> + >> + hid_keyboard_default: hid-keyboard-default-state { >> + pins = "gpio33"; >> + function = "gpio"; >> + drive-strength = <2>; >> + bias-disable; >> + }; >> + >> + hid_touchpad_default: hid-touchpad-default-state { >> + pins = "gpio94"; >> + function = "gpio"; >> + drive-strength = <2>; >> + bias-disable; >> + }; >> + >> + qup_uart3_sleep: qup-uart3-sleep-state { >> + cts-pins { >> + /* >> + * Configure a pull-down on CTS to match the pull of >> + * the Bluetooth module. >> + */ >> + pins = "gpio38"; >> + function = "gpio"; >> + bias-pull-down; >> + }; >> + >> + rts-pins { >> + /* >> + * Configure pull-down on RTS. As RTS is active low >> + * signal, pull it low to indicate the BT SoC that it >> + * can wakeup the system anytime from suspend state by >> + * pulling RX low (by sending wakeup bytes). >> + */ >> + pins = "gpio39"; >> + function = "gpio"; >> + bias-pull-down; >> + }; >> + >> + tx-pins { >> + /* >> + * Configure pull-up on TX when it isn't actively driven >> + * to prevent BT SoC from receiving garbage during sleep. >> + */ >> + pins = "gpio40"; >> + function = "gpio"; >> + bias-pull-up; >> + }; >> + >> + rx-pins { >> + /* >> + * Configure a pull-up on RX. This is needed to avoid >> + * garbage data when the TX pin of the Bluetooth module >> + * is floating which may cause spurious wakeups. >> + */ >> + pins = "gpio41"; >> + function = "gpio"; >> + bias-pull-up; >> + }; >> + }; >> + >> + reg_edp_1p2_en_default: reg-edp-1p2-en-deault-state { >> + pins = "gpio19"; >> + function = "gpio"; >> + drive-strength = <16>; >> + bias-disable; >> + }; >> + >> + reg_edp_1p8_en_default: reg-edp-1p8-en-deault-state { >> + pins = "gpio20"; >> + function = "gpio"; >> + drive-strength = <16>; >> + bias-disable; >> + }; >> + >> + reg_lcm_en_default: reg-lcm-en-deault-state { >> + pins = "gpio26"; >> + function = "gpio"; >> + drive-strength = <16>; >> + bias-disable; >> + }; >> + >> + reg_audio_en_default: reg-audio-en-deault-state { >> + pins = "gpio83"; >> + function = "gpio"; >> + drive-strength = <2>; >> + bias-disable; >> + }; >> + >> + reg_tp_en_default: reg-tp-en-deault-state { >> + pins = "gpio25"; >> + function = "gpio"; >> + drive-strength = <2>; >> + bias-disable; >> + }; >> + >> + soc_bkoff_default: soc-bkoff-deault-state { >> + pins = "gpio10"; >> + function = "gpio"; >> + drive-strength = <16>; >> + bias-disable; >> + }; >> + >> + sdc1_default: sdc1-default-state { >> + clk-pins { >> + pins = "sdc1_clk"; >> + bias-disable; >> + drive-strength = <16>; >> + }; >> + >> + cmd-pins { >> + pins = "sdc1_cmd"; >> + bias-pull-up; >> + drive-strength = <16>; >> + }; >> + >> + data-pins { >> + pins = "sdc1_data"; >> + bias-pull-up; >> + drive-strength = <16>; >> + }; >> + >> + rclk-pins { >> + pins = "sdc1_rclk"; >> + bias-pull-down; >> + }; >> + }; >> + >> + sdc1_sleep: sdc1-sleep-state { >> + clk-pins { >> + pins = "sdc1_clk"; >> + bias-disable; >> + drive-strength = <2>; >> + }; >> + >> + cmd-pins { >> + pins = "sdc1_cmd"; >> + bias-pull-up; >> + drive-strength = <2>; >> + }; >> + >> + data-pins { >> + pins = "sdc1_data"; >> + bias-pull-up; >> + drive-strength = <2>; >> + }; >> + >> + rclk-pins { >> + pins = "sdc1_rclk"; >> + bias-pull-down; >> + }; >> + }; >> + >> + ter_mi2s_active: ter-mi2s-active-state { >> + pins = "gpio63", "gpio64", "gpio65"; >> + function = "mi2s_2"; >> + }; >> +}; ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v2 1/2] dt-bindings: arm: qcom: Add Acer Aspire 1 2023-03-15 5:12 [PATCH v2 1/2] dt-bindings: arm: qcom: Add Acer Aspire 1 Nikita Travkin 2023-03-15 5:12 ` [PATCH v2 2/2] arm64: dts: " Nikita Travkin @ 2023-03-15 6:33 ` Krzysztof Kozlowski 1 sibling, 0 replies; 5+ messages in thread From: Krzysztof Kozlowski @ 2023-03-15 6:33 UTC (permalink / raw) To: Nikita Travkin, agross, andersson Cc: robh+dt, krzysztof.kozlowski+dt, konrad.dybcio, linux-arm-msm, devicetree, linux-kernel, ~postmarketos/upstreaming On 15/03/2023 06:12, Nikita Travkin wrote: > Acer Aspire 1 is a laptop based on sc7180. Document it's compatible. > > Signed-off-by: Nikita Travkin <nikita@trvn.ru> > --- > Changes in v2: > - Merge with IDP (Krzysztof) Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof ^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2023-03-15 13:22 UTC | newest] Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2023-03-15 5:12 [PATCH v2 1/2] dt-bindings: arm: qcom: Add Acer Aspire 1 Nikita Travkin 2023-03-15 5:12 ` [PATCH v2 2/2] arm64: dts: " Nikita Travkin 2023-03-15 10:33 ` Konrad Dybcio 2023-03-15 13:22 ` Nikita Travkin 2023-03-15 6:33 ` [PATCH v2 1/2] dt-bindings: arm: " Krzysztof Kozlowski
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