Re: [PATCH] drm/amd/display: Remove check for 0 kHz clock values

["Kazlauskas, Nicholas" <Nicholas.Kazlauskas@amd.com>]

On 7/15/19 6:34 AM, Paul Menzel wrote:
>  From 09c1952466752033722b02d9c7e5532e1982f6d9 Mon Sep 17 00:00:00 2001
> From: Paul Menzel <pmenzel@molgen.mpg.de>
> Date: Sat, 13 Jul 2019 20:33:49 +0200
> 
> This basically reverts commit 00893681a0ff4 (drm/amd/display: Reject
> PPLib clock values if they are invalid).
> 
> 0 kHz values are a thing on at least the boards below.
> 
> 1.  MSI MS-7A37/B350M MORTAR (MS-7A37), BIOS 1.G1 05/17/2018
> 2.  MSI B450M Mortar, 2400G on 4.19.8
> 3.  Gigabyte Technology Co., Ltd. X470 AORUS ULTRA GAMING/X470 AORUS
>      ULTRA GAMING-CF, BIOS F30 04/16/2019
> 
> Asserting instead of giving a useful error message to the user, so they
> can understand what is going on and how to possible fix things, might be
> good for development, but is a bad user experience, so should not be on
> production systems. So, remove the check for now.
> 
> Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=107296
> Tested: MSI MS-7A37/B350M MORTAR (MS-7A37)
> Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>

The two assertions should probably just be replaced with 
DC_LOG_DEBUG(...) instead - this will drop the callstack on boot for 
production systems.

Dropping the whole validation also means that we're going to be taking 
the table as-is and overriding the defaults - which isn't something we'd 
actually want to do.

I do think it's fine to just reduce this to a debug message since you'd 
see this on any 2400G/AM4 (as far as I'm aware), and only for the fCLK 
table (the tables always come from PPLIB/SMU).

Nicholas Kazlauskas

> ---
>   drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c | 5 -----
>   1 file changed, 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c b/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c
> index 1b4b51657f5e..edaaae5754fe 100644
> --- a/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c
> +++ b/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c
> @@ -1362,11 +1362,6 @@ static bool verify_clock_values(struct dm_pp_clock_levels_with_voltage *clks)
>   	if (clks->num_levels == 0)
>   		return false;
>   
> -	for (i = 0; i < clks->num_levels; i++)
> -		/* Ensure that the result is sane */
> -		if (clks->data[i].clocks_in_khz == 0)
> -			return false;
> -
>   	return true;
>   }
>   
> 
> 
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