[PATCH 0/2] i2c: i801: Detect SPD Write Disable and expose as adapter quirk

[PATCH 0/2] i2c: i801: Detect SPD Write Disable and expose as adapter quirk

[Tinsae Tadesse]

Hi I2C and HWMON maintainers,

Intel i801 SMBus controllers feature a "SPD Write Disable" bit 
in the SMBHSTCFG register. When set by firmware, the hardware 
silently blocks all write transactions to the SPD EEPROM 
address range (0x50-0x57) while allowing reads to succeed.

This creates a significant issue for the spd5118 hwmon driver. 
The SPD5118 requires write access for switching between 
register pages to read temperature data, and for cache 
synchronization during suspend/resume. When SPD Write Disable 
is set and the spd5118 driver attempts write transactions, the 
bus will generate a storm of SMBus DEV_ERR messages.

This patch series proposes a generic solution by:
1. Introducing a new adapter quirk flag in include/linux/i2c.h 
to communicate this hardware restriction.
2. Modifying drivers/i2c/i2c-i801.c to detect the SPD Write 
Disable bit and set the quirk flag.
3. Modifying drivers/hwmon/spd5118.c to check for this quirk 
during probe and fail cleanly, as write access is mandatory.

By using this mechanism, we avoid embedding device-specific 
policies in the controller driver and provide client drivers 
with the necessary information to make an informed decision.

Tinsae Tadesse (2):
  i2c: i801: Detect SPD Write Disable and expose as adapter quirk
  hwmon: spd5118: Fail probe if SPD writes are disabled

 drivers/hwmon/spd5118.c       | 15 +++++++++++++++
 drivers/i2c/busses/i2c-i801.c | 16 +++++++++++++++-
 include/linux/i2c.h           |  3 +++
 3 files changed, 33 insertions(+), 1 deletion(-)

-- 
2.52.0

[PATCH 1/2] i2c: i801: Detect SPD Write Disable and expose as adapter quirk

[Tinsae Tadesse]

Detect SPD Write Disable in SMBHSTCFG and expose it through
I2C adapter quirk. The I2C client driver may decide whether
SPD write operations are supported without implementing
device-specific policies in the SMBus controller driver.

Signed-off-by: Tinsae Tadesse <tinsaetadesse2015@gmail.com>
---
 drivers/i2c/busses/i2c-i801.c | 16 +++++++++++++++-
 include/linux/i2c.h           |  3 +++
 2 files changed, 18 insertions(+), 1 deletion(-)

diff --git a/drivers/i2c/busses/i2c-i801.c b/drivers/i2c/busses/i2c-i801.c
index 9e1789725edf..d771e9f5f82f 100644
--- a/drivers/i2c/busses/i2c-i801.c
+++ b/drivers/i2c/busses/i2c-i801.c
@@ -1533,6 +1533,11 @@ static int i801_probe(struct pci_dev *dev, const struct pci_device_id *id)
 {
 	int err, i, bar = SMBBAR;
 	struct i801_priv *priv;
+	struct i2c_adapter_quirks *quirks;
+
+	quirks = devm_kzalloc(&dev->dev, sizeof(*quirks), GFP_KERNEL);
+	if (!quirks)
+		return -ENOMEM;
 
 	priv = devm_kzalloc(&dev->dev, sizeof(*priv), GFP_KERNEL);
 	if (!priv)
@@ -1600,8 +1605,17 @@ static int i801_probe(struct pci_dev *dev, const struct pci_device_id *id)
 		/* Disable SMBus interrupt feature if SMBus using SMI# */
 		priv->features &= ~FEATURE_IRQ;
 	}
-	if (priv->original_hstcfg & SMBHSTCFG_SPD_WD)
+
+	/*
+	 * Detect the SPD Write Disabled status. Mark the adapter
+	 * as unable to perform SPD writes, which allows consuming
+	 * drivers to decide on safe operation.
+	 */
+	if (priv->original_hstcfg & SMBHSTCFG_SPD_WD) {
 		pci_info(dev, "SPD Write Disable is set\n");
+		quirks->flags |= I2C_AQ_SPD_WRITE_DISABLED;
+	}
+	priv->adapter.quirks = quirks;
 
 	/* Clear special mode bits */
 	if (priv->features & (FEATURE_SMBUS_PEC | FEATURE_BLOCK_BUFFER))
diff --git a/include/linux/i2c.h b/include/linux/i2c.h
index 20fd41b51d5c..4b89f0bf62a1 100644
--- a/include/linux/i2c.h
+++ b/include/linux/i2c.h
@@ -726,6 +726,9 @@ struct i2c_adapter_quirks {
 /* adapter cannot do repeated START */
 #define I2C_AQ_NO_REP_START		BIT(7)
 
+/* SPD writes are blocked by host controller */
+#define I2C_AQ_SPD_WRITE_DISABLED	BIT(8)
+
 /*
  * i2c_adapter is the structure used to identify a physical i2c bus along
  * with the access algorithms necessary to access it.
-- 
2.52.0

Re: [PATCH 1/2] i2c: i801: Detect SPD Write Disable and expose as adapter quirk

[Andi Shyti]

Hi Tinsae,

sorry for the very late reply.

> +/* SPD writes are blocked by host controller */
> +#define I2C_AQ_SPD_WRITE_DISABLED	BIT(8)
> +

We don't need this extra flag, we already do this statement in
i2c_register_spd().

Can't we just assume that for spd5118 spd write is always
disabled? That's what happens in i2c_register_spd.

Check:

84d477354b0a ("i2c: smbus: Support DDR5 and LPDDR5 SPD EEPROMs")
4d6d35d3417d ("i2c: smbus: introduce Write Disable-aware SPD instantiating functions")

Thanks,
Andi

Re: [PATCH 1/2] i2c: i801: Detect SPD Write Disable and expose as adapter quirk

[TINSAE TADESSE]

On Mon, Jun 8, 2026 at 3:28 PM Andi Shyti <andi.shyti@kernel.org> wrote:
>
> Hi Tinsae,
>
> sorry for the very late reply.
>
> > +/* SPD writes are blocked by host controller */
> > +#define I2C_AQ_SPD_WRITE_DISABLED    BIT(8)
> > +
>
> We don't need this extra flag, we already do this statement in
> i2c_register_spd().
>
> Can't we just assume that for spd5118 spd write is always
> disabled? That's what happens in i2c_register_spd.
>
> Check:
>
> 84d477354b0a ("i2c: smbus: Support DDR5 and LPDDR5 SPD EEPROMs")
> 4d6d35d3417d ("i2c: smbus: introduce Write Disable-aware SPD instantiating functions")
>
> Thanks,
> Andi


Hi Andi,

Thanks for reviewing this patch series.

> We don't need this extra flag, we already do this statement in
> i2c_register_spd().

Based on my testing, the issue does not appear to be in the SPD
registration path
handled by 'i2c_register_spd()'.

I verified that:

* The i801 driver correctly detects SPD Write Disable.
* Disabling 'CONFIG_SENSORS_SPD5118_DETECT' completely eliminates the problem.
* The suspend/resume failures only occur when 'CONFIG_SENSORS_SPD5118_DETECT=y'.

Based on these observations, it appears that the SPD5118 detect path
may instantiate
the device independently of the SPD registration logic and therefore
may bypass the
SPD Write Disable handling added by commit 4d6d35d3417d ("i2c: smbus:
introduce Write
Disable-aware SPD instantiating functions").

This would explain why SPD5118 is still instantiated on systems where SPD Write
Disable is active, even though the SPD registration helpers are
already SPD WD aware.

The above observations are what motivated this patch series. Am I correct in
suspecting that the SPD5118 detect path is separate from the SPD
registration path, or
is there another instantiation path that I should investigate?

Best,
Tinsae Tadesse

Re: [PATCH 1/2] i2c: i801: Detect SPD Write Disable and expose as adapter quirk

[Guenter Roeck]

On 6/10/26 01:54, TINSAE TADESSE wrote:
> On Mon, Jun 8, 2026 at 3:28 PM Andi Shyti <andi.shyti@kernel.org> wrote:
>>
>> Hi Tinsae,
>>
>> sorry for the very late reply.
>>
>>> +/* SPD writes are blocked by host controller */
>>> +#define I2C_AQ_SPD_WRITE_DISABLED    BIT(8)
>>> +
>>
>> We don't need this extra flag, we already do this statement in
>> i2c_register_spd().
>>
>> Can't we just assume that for spd5118 spd write is always
>> disabled? That's what happens in i2c_register_spd.
>>
>> Check:
>>
>> 84d477354b0a ("i2c: smbus: Support DDR5 and LPDDR5 SPD EEPROMs")
>> 4d6d35d3417d ("i2c: smbus: introduce Write Disable-aware SPD instantiating functions")
>>
>> Thanks,
>> Andi
> 
> 
> Hi Andi,
> 
> Thanks for reviewing this patch series.
> 
>> We don't need this extra flag, we already do this statement in
>> i2c_register_spd().
> 
> Based on my testing, the issue does not appear to be in the SPD
> registration path
> handled by 'i2c_register_spd()'.
> 
> I verified that:
> 
> * The i801 driver correctly detects SPD Write Disable.
> * Disabling 'CONFIG_SENSORS_SPD5118_DETECT' completely eliminates the problem.
> * The suspend/resume failures only occur when 'CONFIG_SENSORS_SPD5118_DETECT=y'.
> 
> Based on these observations, it appears that the SPD5118 detect path
> may instantiate
> the device independently of the SPD registration logic and therefore
> may bypass the
> SPD Write Disable handling added by commit 4d6d35d3417d ("i2c: smbus:
> introduce Write
> Disable-aware SPD instantiating functions").
> 
> This would explain why SPD5118 is still instantiated on systems where SPD Write
> Disable is active, even though the SPD registration helpers are
> already SPD WD aware.
> 
> The above observations are what motivated this patch series. Am I correct in
> suspecting that the SPD5118 detect path is separate from the SPD
> registration path, or
> is there another instantiation path that I should investigate?
> 

The detect path [spd5118_detect()] is intended for systems where
i2c_register_spd() is not called. After all, not all systems with
DDR5 support have i801 or piix4 I2C controllers installed.
If your system uses one of those controllers (i.e., Intel or AMD
CPU), CONFIG_SENSORS_SPD5118_DETECT is not needed and should not be
enabled. There are some exceptions, such as servers with a large
number of DIMM slots, but that is not common.

Guenter

[PATCH 2/2] hwmon: spd5118: Fail probe if SPD writes are disabled

[Tinsae Tadesse]

SPD5118 requires write access for page selection, configuration,
and cache synchronization during suspend/resume. If the host
controller does not allow SPD writes, the driver cannot function
properly.

Detect this state using adapter quirks and determine whether to
stop the probe.

Signed-off-by: Tinsae Tadesse <tinsaetadesse2015@gmail.com>
---
 drivers/hwmon/spd5118.c | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/drivers/hwmon/spd5118.c b/drivers/hwmon/spd5118.c
index 5da44571b6a0..094d05472562 100644
--- a/drivers/hwmon/spd5118.c
+++ b/drivers/hwmon/spd5118.c
@@ -525,6 +525,8 @@ static int spd5118_common_probe(struct device *dev, struct regmap *regmap,
 	unsigned int capability, revision, vendor, bank;
 	struct spd5118_data *data;
 	struct device *hwmon_dev;
+	struct i2c_client *client;
+	const struct i2c_adapter_quirks *quirks;
 	int err;
 
 	data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
@@ -552,6 +554,19 @@ static int spd5118_common_probe(struct device *dev, struct regmap *regmap,
 	if (!spd5118_vendor_valid(bank, vendor))
 		return -ENODEV;
 
+	/*
+	 * SPD5118 requires write access for correct operation
+	 * (page selection, configuration, and suspend/resume cache sync).
+	 * If the SPD writes are blocked by the SMBus controller, the
+	 * probe fails.
+	 */
+	client = to_i2c_client(dev);
+	quirks = client->adapter->quirks;
+	if (quirks && (quirks->flags & I2C_AQ_SPD_WRITE_DISABLED)) {
+		dev_err_probe(dev, -ENODEV, "SPD Write Disable is set on adapter; refusing probe\n");
+		return -ENODEV;
+	}
+
 	data->regmap = regmap;
 	mutex_init(&data->nvmem_lock);
 	dev_set_drvdata(dev, data);
-- 
2.52.0

Re: [PATCH 2/2] hwmon: spd5118: Fail probe if SPD writes are disabled

[Guenter Roeck]

On Thu, Feb 05, 2026 at 01:29:25PM +0300, Tinsae Tadesse wrote:
> SPD5118 requires write access for page selection, configuration,
> and cache synchronization during suspend/resume. If the host
> controller does not allow SPD writes, the driver cannot function
> properly.
> 
> Detect this state using adapter quirks and determine whether to
> stop the probe.
> 
> Signed-off-by: Tinsae Tadesse <tinsaetadesse2015@gmail.com>
> ---
>  drivers/hwmon/spd5118.c | 15 +++++++++++++++
>  1 file changed, 15 insertions(+)
> 
> diff --git a/drivers/hwmon/spd5118.c b/drivers/hwmon/spd5118.c
> index 5da44571b6a0..094d05472562 100644
> --- a/drivers/hwmon/spd5118.c
> +++ b/drivers/hwmon/spd5118.c
> @@ -525,6 +525,8 @@ static int spd5118_common_probe(struct device *dev, struct regmap *regmap,
>  	unsigned int capability, revision, vendor, bank;
>  	struct spd5118_data *data;
>  	struct device *hwmon_dev;
> +	struct i2c_client *client;
> +	const struct i2c_adapter_quirks *quirks;
>  	int err;
>  
>  	data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
> @@ -552,6 +554,19 @@ static int spd5118_common_probe(struct device *dev, struct regmap *regmap,
>  	if (!spd5118_vendor_valid(bank, vendor))
>  		return -ENODEV;
>  
> +	/*
> +	 * SPD5118 requires write access for correct operation
> +	 * (page selection, configuration, and suspend/resume cache sync).
> +	 * If the SPD writes are blocked by the SMBus controller, the
> +	 * probe fails.
> +	 */
> +	client = to_i2c_client(dev);
> +	quirks = client->adapter->quirks;
> +	if (quirks && (quirks->flags & I2C_AQ_SPD_WRITE_DISABLED)) {
> +		dev_err_probe(dev, -ENODEV, "SPD Write Disable is set on adapter; refusing probe\n");
> +		return -ENODEV;

		return dev_err_probe(...);

> +	}
> +
>  	data->regmap = regmap;
>  	mutex_init(&data->nvmem_lock);
>  	dev_set_drvdata(dev, data);
> -- 
> 2.52.0
> 

Re: [PATCH 0/2] i2c: i801: Detect SPD Write Disable and expose as adapter quirk

[TINSAE TADESSE]

On Thu, Feb 5, 2026 at 1:29 PM Tinsae Tadesse
<tinsaetadesse2015@gmail.com> wrote:
>
> Hi I2C and HWMON maintainers,
>
> Intel i801 SMBus controllers feature a "SPD Write Disable" bit
> in the SMBHSTCFG register. When set by firmware, the hardware
> silently blocks all write transactions to the SPD EEPROM
> address range (0x50-0x57) while allowing reads to succeed.
>
> This creates a significant issue for the spd5118 hwmon driver.
> The SPD5118 requires write access for switching between
> register pages to read temperature data, and for cache
> synchronization during suspend/resume. When SPD Write Disable
> is set and the spd5118 driver attempts write transactions, the
> bus will generate a storm of SMBus DEV_ERR messages.
>
> This patch series proposes a generic solution by:
> 1. Introducing a new adapter quirk flag in include/linux/i2c.h
> to communicate this hardware restriction.
> 2. Modifying drivers/i2c/i2c-i801.c to detect the SPD Write
> Disable bit and set the quirk flag.
> 3. Modifying drivers/hwmon/spd5118.c to check for this quirk
> during probe and fail cleanly, as write access is mandatory.
>
> By using this mechanism, we avoid embedding device-specific
> policies in the controller driver and provide client drivers
> with the necessary information to make an informed decision.
>
> Tinsae Tadesse (2):
>   i2c: i801: Detect SPD Write Disable and expose as adapter quirk
>   hwmon: spd5118: Fail probe if SPD writes are disabled
>
>  drivers/hwmon/spd5118.c       | 15 +++++++++++++++
>  drivers/i2c/busses/i2c-i801.c | 16 +++++++++++++++-
>  include/linux/i2c.h           |  3 +++
>  3 files changed, 33 insertions(+), 1 deletion(-)
>
> --
> 2.52.0
>


Hi Wolfram, Jean, and Andi;

Please review this patch series.

Thanks,
Tinsae Tadesse

Re: [PATCH 0/2] i2c: i801: Detect SPD Write Disable and expose as adapter quirk

[Mark Pearson]

Hi Tinsae,

On Sat, Feb 21, 2026, at 4:57 AM, TINSAE TADESSE wrote:
> On Thu, Feb 5, 2026 at 1:29 PM Tinsae Tadesse
> <tinsaetadesse2015@gmail.com> wrote:
>>
>> Hi I2C and HWMON maintainers,
>>
>> Intel i801 SMBus controllers feature a "SPD Write Disable" bit
>> in the SMBHSTCFG register. When set by firmware, the hardware
>> silently blocks all write transactions to the SPD EEPROM
>> address range (0x50-0x57) while allowing reads to succeed.
>>
>> This creates a significant issue for the spd5118 hwmon driver.
>> The SPD5118 requires write access for switching between
>> register pages to read temperature data, and for cache
>> synchronization during suspend/resume. When SPD Write Disable
>> is set and the spd5118 driver attempts write transactions, the
>> bus will generate a storm of SMBus DEV_ERR messages.
>>
>> This patch series proposes a generic solution by:
>> 1. Introducing a new adapter quirk flag in include/linux/i2c.h
>> to communicate this hardware restriction.
>> 2. Modifying drivers/i2c/i2c-i801.c to detect the SPD Write
>> Disable bit and set the quirk flag.
>> 3. Modifying drivers/hwmon/spd5118.c to check for this quirk
>> during probe and fail cleanly, as write access is mandatory.
>>
>> By using this mechanism, we avoid embedding device-specific
>> policies in the controller driver and provide client drivers
>> with the necessary information to make an informed decision.
>>
>> Tinsae Tadesse (2):
>>   i2c: i801: Detect SPD Write Disable and expose as adapter quirk
>>   hwmon: spd5118: Fail probe if SPD writes are disabled
>>
>>  drivers/hwmon/spd5118.c       | 15 +++++++++++++++
>>  drivers/i2c/busses/i2c-i801.c | 16 +++++++++++++++-
>>  include/linux/i2c.h           |  3 +++
>>  3 files changed, 33 insertions(+), 1 deletion(-)
>>
>> --
>> 2.52.0
>>
>

I'm hitting a very similar problem on all the Lenovo 2026 Linux certified platforms.
Your patch is great, and I wanted to add a tested-by tag to say it fixed the issue for me, but it doesn't quite unfortunately.

I added this change (hack?) in i2c-smbus.c to take advantage of your changes and fix the issue that I'm seeing:

 void i2c_register_spd_write_enable(struct i2c_adapter *adap)
 {
-       i2c_register_spd(adap, false);
+       if (adap->quirks && adap->quirks->flags & I2C_AQ_SPD_WRITE_DISABLED)
+               i2c_register_spd(adap, true);
+       else
+               i2c_register_spd(adap, false);
 }

What do you think? Any side effects or impacts you can foresee based on your testing?

Maintainers - would love your opinion too. I suspect this may become a common issue.

Mark

Re: [PATCH 0/2] i2c: i801: Detect SPD Write Disable and expose as adapter quirk

[TINSAE TADESSE]

On Tue, Apr 21, 2026 at 8:56 PM Mark Pearson <mpearson@squebb.ca> wrote:
>
> Hi Tinsae,
>
> On Sat, Feb 21, 2026, at 4:57 AM, TINSAE TADESSE wrote:
> > On Thu, Feb 5, 2026 at 1:29 PM Tinsae Tadesse
> > <tinsaetadesse2015@gmail.com> wrote:
> >>
> >> Hi I2C and HWMON maintainers,
> >>
> >> Intel i801 SMBus controllers feature a "SPD Write Disable" bit
> >> in the SMBHSTCFG register. When set by firmware, the hardware
> >> silently blocks all write transactions to the SPD EEPROM
> >> address range (0x50-0x57) while allowing reads to succeed.
> >>
> >> This creates a significant issue for the spd5118 hwmon driver.
> >> The SPD5118 requires write access for switching between
> >> register pages to read temperature data, and for cache
> >> synchronization during suspend/resume. When SPD Write Disable
> >> is set and the spd5118 driver attempts write transactions, the
> >> bus will generate a storm of SMBus DEV_ERR messages.
> >>
> >> This patch series proposes a generic solution by:
> >> 1. Introducing a new adapter quirk flag in include/linux/i2c.h
> >> to communicate this hardware restriction.
> >> 2. Modifying drivers/i2c/i2c-i801.c to detect the SPD Write
> >> Disable bit and set the quirk flag.
> >> 3. Modifying drivers/hwmon/spd5118.c to check for this quirk
> >> during probe and fail cleanly, as write access is mandatory.
> >>
> >> By using this mechanism, we avoid embedding device-specific
> >> policies in the controller driver and provide client drivers
> >> with the necessary information to make an informed decision.
> >>
> >> Tinsae Tadesse (2):
> >>   i2c: i801: Detect SPD Write Disable and expose as adapter quirk
> >>   hwmon: spd5118: Fail probe if SPD writes are disabled
> >>
> >>  drivers/hwmon/spd5118.c       | 15 +++++++++++++++
> >>  drivers/i2c/busses/i2c-i801.c | 16 +++++++++++++++-
> >>  include/linux/i2c.h           |  3 +++
> >>  3 files changed, 33 insertions(+), 1 deletion(-)
> >>
> >> --
> >> 2.52.0
> >>
> >
>
> I'm hitting a very similar problem on all the Lenovo 2026 Linux certified platforms.
> Your patch is great, and I wanted to add a tested-by tag to say it fixed the issue for me, but it doesn't quite unfortunately.
>
> I added this change (hack?) in i2c-smbus.c to take advantage of your changes and fix the issue that I'm seeing:
>
>  void i2c_register_spd_write_enable(struct i2c_adapter *adap)
>  {
> -       i2c_register_spd(adap, false);
> +       if (adap->quirks && adap->quirks->flags & I2C_AQ_SPD_WRITE_DISABLED)
> +               i2c_register_spd(adap, true);
> +       else
> +               i2c_register_spd(adap, false);
>  }
>
> What do you think? Any side effects or impacts you can foresee based on your testing?
>
> Maintainers - would love your opinion too. I suspect this may become a common issue.
>
> Mark

Hi Mark,

Thank you for suggesting this fix, and I apologize for the delayed response :)

> What do you think? Any side effects or impacts you can foresee based on your testing?

I think that fix looks okay; however, it would be helpful to know which kernel
driver was the source of your error. Additionally, having the kernel
debug logs would help pinpoint the exact place of the problem.

> I added this change (hack?) in i2c-smbus.c to take advantage of your changes and fix the issue that I'm seeing:

The goal of this patch series, as you can see from the RFC, was to
"avoid embedding device-specific policies in the controller driver and
provide client driver with the necessary information to make an informed
decision on whether it can operate or not under SPD Write Disable."
Therefore, I would rather have this check in the client driver's probe function,
rather than in the SMBus controller driver.


Best,
Tinsae Tadesse

Re: [PATCH 0/2] i2c: i801: Detect SPD Write Disable and expose as adapter quirk

[Mark Pearson]

Hi Tinsae

Sorry for the long delay in reply

On Thu, Apr 23, 2026, at 7:21 AM, TINSAE TADESSE wrote:
> On Tue, Apr 21, 2026 at 8:56 PM Mark Pearson <mpearson@squebb.ca> wrote:
>>
>> Hi Tinsae,
>>
>> On Sat, Feb 21, 2026, at 4:57 AM, TINSAE TADESSE wrote:
>> > On Thu, Feb 5, 2026 at 1:29 PM Tinsae Tadesse
>> > <tinsaetadesse2015@gmail.com> wrote:
>> >>
>> >> Hi I2C and HWMON maintainers,
>> >>
>> >> Intel i801 SMBus controllers feature a "SPD Write Disable" bit
>> >> in the SMBHSTCFG register. When set by firmware, the hardware
>> >> silently blocks all write transactions to the SPD EEPROM
>> >> address range (0x50-0x57) while allowing reads to succeed.
>> >>
>> >> This creates a significant issue for the spd5118 hwmon driver.
>> >> The SPD5118 requires write access for switching between
>> >> register pages to read temperature data, and for cache
>> >> synchronization during suspend/resume. When SPD Write Disable
>> >> is set and the spd5118 driver attempts write transactions, the
>> >> bus will generate a storm of SMBus DEV_ERR messages.
>> >>
>> >> This patch series proposes a generic solution by:
>> >> 1. Introducing a new adapter quirk flag in include/linux/i2c.h
>> >> to communicate this hardware restriction.
>> >> 2. Modifying drivers/i2c/i2c-i801.c to detect the SPD Write
>> >> Disable bit and set the quirk flag.
>> >> 3. Modifying drivers/hwmon/spd5118.c to check for this quirk
>> >> during probe and fail cleanly, as write access is mandatory.
>> >>
>> >> By using this mechanism, we avoid embedding device-specific
>> >> policies in the controller driver and provide client drivers
>> >> with the necessary information to make an informed decision.
>> >>
>> >> Tinsae Tadesse (2):
>> >>   i2c: i801: Detect SPD Write Disable and expose as adapter quirk
>> >>   hwmon: spd5118: Fail probe if SPD writes are disabled
>> >>
>> >>  drivers/hwmon/spd5118.c       | 15 +++++++++++++++
>> >>  drivers/i2c/busses/i2c-i801.c | 16 +++++++++++++++-
>> >>  include/linux/i2c.h           |  3 +++
>> >>  3 files changed, 33 insertions(+), 1 deletion(-)
>> >>
>> >> --
>> >> 2.52.0
>> >>
>> >
>>
>> I'm hitting a very similar problem on all the Lenovo 2026 Linux certified platforms.
>> Your patch is great, and I wanted to add a tested-by tag to say it fixed the issue for me, but it doesn't quite unfortunately.
>>
>> I added this change (hack?) in i2c-smbus.c to take advantage of your changes and fix the issue that I'm seeing:
>>
>>  void i2c_register_spd_write_enable(struct i2c_adapter *adap)
>>  {
>> -       i2c_register_spd(adap, false);
>> +       if (adap->quirks && adap->quirks->flags & I2C_AQ_SPD_WRITE_DISABLED)
>> +               i2c_register_spd(adap, true);
>> +       else
>> +               i2c_register_spd(adap, false);
>>  }
>>
>> What do you think? Any side effects or impacts you can foresee based on your testing?
>>
>> Maintainers - would love your opinion too. I suspect this may become a common issue.
>>
>> Mark
>
> Hi Mark,
>
> Thank you for suggesting this fix, and I apologize for the delayed response :)
>
>> What do you think? Any side effects or impacts you can foresee based on your testing?
>
> I think that fix looks okay; however, it would be helpful to know which kernel
> driver was the source of your error. Additionally, having the kernel
> debug logs would help pinpoint the exact place of the problem.
>

It was on 7.0, built from Linus's tree.
I can pull up logs - but it's just when reading the DDR SPD get's triggered so not terribly useful.
For me it gets triggered from i801_probe_optional_targets

>> I added this change (hack?) in i2c-smbus.c to take advantage of your changes and fix the issue that I'm seeing.
>
> The goal of this patch series, as you can see from the RFC, was to
> "avoid embedding device-specific policies in the controller driver and
> provide client driver with the necessary information to make an informed
> decision on whether it can operate or not under SPD Write Disable."
> Therefore, I would rather have this check in the client driver's probe function,
> rather than in the SMBus controller driver.
>

Fair enough.

What about having it in the i2c-i801 driver? Something like:

-               i2c_register_spd_write_enable(&priv->adapter);
+               if (priv->adapter.quirks && priv->adapter.quirks->flags & I2C_AQ_SPD_WRITE_DISABLED)
+                       i2c_register_spd_write_disable(&priv->adapter);
+               else
+                       i2c_register_spd_write_enable(&priv->adapter);

Would that be better? (there are two places in that file where this change is needed)
I confirmed this did fix it for me :)

Mark

Re: [PATCH 0/2] i2c: i801: Detect SPD Write Disable and expose as adapter quirk

[Delaida Muminović]

Tested the series on a machine that hits this bug:

  Lenovo ThinkPad T14 Gen 6 (21QCS1NV00)
  Fedora 44, kernel 7.0.13-200.fc44.x86_64
  BIOS N4JET27W 1.17

This controller has SPD Write Disable set:

  i801_smbus 0000:00:1f.4: SPD Write Disable is set

Without the series, spd5118 binds at 15-0050 and resume fails with:

  spd5118 15-0050: Failed to write b = 0: -6
  spd5118 15-0050: PM: dpm_run_callback(): spd5118_resume [spd5118] returns -6
  spd5118 15-0050: PM: failed to resume async: error -6

I rebuilt i2c-i801 and spd5118 with this series on the above kernel. i801 now
marks the adapter with I2C_AQ_SPD_WRITE_DISABLED, and spd5118 declines to bind:

  spd5118 15-0050: SPD Write Disable is set on adapter; refusing probe

spd5118 is loaded but not bound to the SPD device, so spd5118_resume() is never
registered and the -6 failure can no longer occur. The approach works on this
hardware and is cleaner than blacklisting the module.

Tested-by: Delaida Muminovic <delaidamuminovic2@gmail.com>