* [PATCH v5 01/12] arm64: dts: ti: k3-j784s4-j742s2-mcu-wakeup: Move bootph from mcu_timer1 to mcu_timer0
2024-10-23 6:57 [PATCH v5 00/12] Add bootph-all property for J7 boards Manorit Chawdhry
@ 2024-10-23 6:57 ` Manorit Chawdhry
2024-10-23 6:57 ` [PATCH v5 02/12] arm64: dts: ti: k3-j784s4-j742s2-mcu-wakeup: Remove parent nodes bootph-* Manorit Chawdhry
` (10 subsequent siblings)
11 siblings, 0 replies; 21+ messages in thread
From: Manorit Chawdhry @ 2024-10-23 6:57 UTC (permalink / raw)
To: Nishanth Menon, Vignesh Raghavendra, Tero Kristo, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-kernel, devicetree, linux-kernel, Neha Malcom Francis,
Aniket Limaye, Udit Kumar, Beleswar Padhi, Siddharth Vadapalli,
Andrew Davis, Manorit Chawdhry
Bootloader are using mcu_timer0 instead of mcu_timer1. Adds bootph to
mcu_timer0 instead of mcu_timer1.
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
---
arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi
index cba8d0e64f2e..9899da73a905 100644
--- a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi
@@ -172,13 +172,13 @@ mcu_timer0: timer@40400000 {
assigned-clocks = <&k3_clks 35 2>;
assigned-clock-parents = <&k3_clks 35 3>;
power-domains = <&k3_pds 35 TI_SCI_PD_EXCLUSIVE>;
+ bootph-all;
ti,timer-pwm;
/* Non-MPU Firmware usage */
status = "reserved";
};
mcu_timer1: timer@40410000 {
- bootph-all;
compatible = "ti,am654-timer";
reg = <0x00 0x40410000 0x00 0x400>;
interrupts = <GIC_SPI 817 IRQ_TYPE_LEVEL_HIGH>;
--
2.46.0
^ permalink raw reply [flat|nested] 21+ messages in thread* [PATCH v5 02/12] arm64: dts: ti: k3-j784s4-j742s2-mcu-wakeup: Remove parent nodes bootph-*
2024-10-23 6:57 [PATCH v5 00/12] Add bootph-all property for J7 boards Manorit Chawdhry
2024-10-23 6:57 ` [PATCH v5 01/12] arm64: dts: ti: k3-j784s4-j742s2-mcu-wakeup: Move bootph from mcu_timer1 to mcu_timer0 Manorit Chawdhry
@ 2024-10-23 6:57 ` Manorit Chawdhry
2024-10-23 15:38 ` Aniket Limaye
2024-10-23 6:57 ` [PATCH v5 03/12] arm64: dts: ti: k3-j784s4: Add bootph-* properties Manorit Chawdhry
` (9 subsequent siblings)
11 siblings, 1 reply; 21+ messages in thread
From: Manorit Chawdhry @ 2024-10-23 6:57 UTC (permalink / raw)
To: Nishanth Menon, Vignesh Raghavendra, Tero Kristo, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-kernel, devicetree, linux-kernel, Neha Malcom Francis,
Aniket Limaye, Udit Kumar, Beleswar Padhi, Siddharth Vadapalli,
Andrew Davis, Manorit Chawdhry
Adding bootph properties on leaf nodes imply that they are applicable to
the parent nodes as well. Bootloaders can derive the parent nodes when
bootph is available in the leaf nodes.
Remove the bootph-* properties from parent nodes as they are redundant.
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
---
Notes:
It wasn't existing previously in U-boot but the following patch fixes it [0]
[0]: https://lore.kernel.org/u-boot/20231217163627.2339802-10-sjg@chromium.org/
arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi | 3 ---
1 file changed, 3 deletions(-)
diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi
index 9899da73a905..46bc2a3e4aea 100644
--- a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi
@@ -7,7 +7,6 @@
&cbass_mcu_wakeup {
sms: system-controller@44083000 {
- bootph-all;
compatible = "ti,k2g-sci";
ti,host-id = <12>;
@@ -39,7 +38,6 @@ k3_reset: reset-controller {
};
wkup_conf: bus@43000000 {
- bootph-all;
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
@@ -458,7 +456,6 @@ mcu_spi2: spi@40320000 {
};
mcu_navss: bus@28380000 {
- bootph-all;
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
--
2.46.0
^ permalink raw reply [flat|nested] 21+ messages in thread* Re: [PATCH v5 02/12] arm64: dts: ti: k3-j784s4-j742s2-mcu-wakeup: Remove parent nodes bootph-*
2024-10-23 6:57 ` [PATCH v5 02/12] arm64: dts: ti: k3-j784s4-j742s2-mcu-wakeup: Remove parent nodes bootph-* Manorit Chawdhry
@ 2024-10-23 15:38 ` Aniket Limaye
0 siblings, 0 replies; 21+ messages in thread
From: Aniket Limaye @ 2024-10-23 15:38 UTC (permalink / raw)
To: Manorit Chawdhry, Nishanth Menon, Vignesh Raghavendra,
Tero Kristo, Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-kernel, devicetree, linux-kernel, Neha Malcom Francis,
Udit Kumar, Beleswar Padhi, Siddharth Vadapalli, Andrew Davis
On 23/10/24 12:27, Manorit Chawdhry wrote:
> Adding bootph properties on leaf nodes imply that they are applicable to
> the parent nodes as well. Bootloaders can derive the parent nodes when
> bootph is available in the leaf nodes.
>
> Remove the bootph-* properties from parent nodes as they are redundant.
>
> Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Reviewed-by: Aniket Limaye <a-limaye@ti.com>
> ---
>
> Notes:
> It wasn't existing previously in U-boot but the following patch fixes it [0]
>
> [0]: https://lore.kernel.org/u-boot/20231217163627.2339802-10-sjg@chromium.org/
>
> arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi | 3 ---
> 1 file changed, 3 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi
> index 9899da73a905..46bc2a3e4aea 100644
> --- a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi
> @@ -7,7 +7,6 @@
>
> &cbass_mcu_wakeup {
> sms: system-controller@44083000 {
> - bootph-all;
> compatible = "ti,k2g-sci";
> ti,host-id = <12>;
>
> @@ -39,7 +38,6 @@ k3_reset: reset-controller {
> };
>
> wkup_conf: bus@43000000 {
> - bootph-all;
> compatible = "simple-bus";
> #address-cells = <1>;
> #size-cells = <1>;
> @@ -458,7 +456,6 @@ mcu_spi2: spi@40320000 {
> };
>
> mcu_navss: bus@28380000 {
> - bootph-all;
> compatible = "simple-bus";
> #address-cells = <2>;
> #size-cells = <2>;
>
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v5 03/12] arm64: dts: ti: k3-j784s4: Add bootph-* properties
2024-10-23 6:57 [PATCH v5 00/12] Add bootph-all property for J7 boards Manorit Chawdhry
2024-10-23 6:57 ` [PATCH v5 01/12] arm64: dts: ti: k3-j784s4-j742s2-mcu-wakeup: Move bootph from mcu_timer1 to mcu_timer0 Manorit Chawdhry
2024-10-23 6:57 ` [PATCH v5 02/12] arm64: dts: ti: k3-j784s4-j742s2-mcu-wakeup: Remove parent nodes bootph-* Manorit Chawdhry
@ 2024-10-23 6:57 ` Manorit Chawdhry
2024-10-23 6:57 ` [PATCH v5 04/12] arm64: dts: ti: k3-j721s2: " Manorit Chawdhry
` (8 subsequent siblings)
11 siblings, 0 replies; 21+ messages in thread
From: Manorit Chawdhry @ 2024-10-23 6:57 UTC (permalink / raw)
To: Nishanth Menon, Vignesh Raghavendra, Tero Kristo, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-kernel, devicetree, linux-kernel, Neha Malcom Francis,
Aniket Limaye, Udit Kumar, Beleswar Padhi, Siddharth Vadapalli,
Andrew Davis, Manorit Chawdhry
The following nodes are being used in the bootloaders. Adds bootph-*
properties to the leaf nodes to enable bootloaders to utilise them.
Following adds bootph-* to
- secure_proxy_sa3/secure_proxy_main mboxes for communication with
System Controller
- wkup_vtm for enabling Adaptive voltage scaling(AVS) support
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
---
arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi
index 46bc2a3e4aea..9638130caece 100644
--- a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi
@@ -57,6 +57,8 @@ secure_proxy_sa3: mailbox@43600000 {
reg = <0x00 0x43600000 0x00 0x10000>,
<0x00 0x44880000 0x00 0x20000>,
<0x00 0x44860000 0x00 0x20000>;
+ bootph-pre-ram;
+
/*
* Marked Disabled:
* Node is incomplete as it is meant for bootloaders and
@@ -512,6 +514,8 @@ secure_proxy_mcu: mailbox@2a480000 {
reg = <0x00 0x2a480000 0x00 0x80000>,
<0x00 0x2a380000 0x00 0x80000>,
<0x00 0x2a400000 0x00 0x80000>;
+ bootph-pre-ram;
+
/*
* Marked Disabled:
* Node is incomplete as it is meant for bootloaders and
@@ -629,6 +633,7 @@ wkup_vtm0: temperature-sensor@42040000 {
<0x00 0x42050000 0x00 0x350>;
power-domains = <&k3_pds 243 TI_SCI_PD_SHARED>;
#thermal-sensor-cells = <1>;
+ bootph-pre-ram;
};
tscadc0: tscadc@40200000 {
--
2.46.0
^ permalink raw reply [flat|nested] 21+ messages in thread* [PATCH v5 04/12] arm64: dts: ti: k3-j721s2: Add bootph-* properties
2024-10-23 6:57 [PATCH v5 00/12] Add bootph-all property for J7 boards Manorit Chawdhry
` (2 preceding siblings ...)
2024-10-23 6:57 ` [PATCH v5 03/12] arm64: dts: ti: k3-j784s4: Add bootph-* properties Manorit Chawdhry
@ 2024-10-23 6:57 ` Manorit Chawdhry
2024-10-23 6:57 ` [PATCH v5 05/12] arm64: dts: ti: k3-j721e: " Manorit Chawdhry
` (7 subsequent siblings)
11 siblings, 0 replies; 21+ messages in thread
From: Manorit Chawdhry @ 2024-10-23 6:57 UTC (permalink / raw)
To: Nishanth Menon, Vignesh Raghavendra, Tero Kristo, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-kernel, devicetree, linux-kernel, Neha Malcom Francis,
Aniket Limaye, Udit Kumar, Beleswar Padhi, Siddharth Vadapalli,
Andrew Davis, Manorit Chawdhry
Adds bootph-* properties to the leaf nodes to enable bootloaders to
utilise them.
Following adds bootph-* to
- System controller nodes that allow controlling power domain, clocks, etc.
- secure_proxy_sa3/secure_proxy_main mboxes for communication with
System Controller
- mcu_ringacc/mcu_udmap for DMA to SMS
- chipid for detection soc information.
- mcu_timer0 for bootloader tick-timer.
- wkup_vtm for enabling Adaptive voltage scaling(AVS) support
Reviewed-by: Andrew Davis <afd@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
---
Notes:
R-by picked up in v3 ( Andrew )
arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 1 +
arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi | 13 +++++++++++++
2 files changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
index 9ed6949b40e9..9889144d665a 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
@@ -816,6 +816,7 @@ secure_proxy_main: mailbox@32c00000 {
<0x00 0x32800000 0x00 0x100000>;
interrupt-names = "rx_011";
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+ bootph-all;
};
hwspinlock: spinlock@30e00000 {
diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi
index 9d96b19d0e7c..c36888c45531 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi
@@ -21,16 +21,19 @@ sms: system-controller@44083000 {
k3_pds: power-controller {
compatible = "ti,sci-pm-domain";
#power-domain-cells = <2>;
+ bootph-all;
};
k3_clks: clock-controller {
compatible = "ti,k2g-sci-clk";
#clock-cells = <2>;
+ bootph-all;
};
k3_reset: reset-controller {
compatible = "ti,sci-reset";
#reset-cells = <2>;
+ bootph-all;
};
};
@@ -43,6 +46,7 @@ wkup_conf: bus@43000000 {
chipid: chipid@14 {
compatible = "ti,am654-chipid";
reg = <0x14 0x4>;
+ bootph-all;
};
};
@@ -53,6 +57,8 @@ secure_proxy_sa3: mailbox@43600000 {
reg = <0x00 0x43600000 0x00 0x10000>,
<0x00 0x44880000 0x00 0x20000>,
<0x00 0x44860000 0x00 0x20000>;
+ bootph-pre-ram;
+
/*
* Marked Disabled:
* Node is incomplete as it is meant for bootloaders and
@@ -167,6 +173,7 @@ mcu_timer0: timer@40400000 {
assigned-clocks = <&k3_clks 35 1>;
assigned-clock-parents = <&k3_clks 35 2>;
power-domains = <&k3_pds 35 TI_SCI_PD_EXCLUSIVE>;
+ bootph-pre-ram;
ti,timer-pwm;
/* Non-MPU Firmware usage */
status = "reserved";
@@ -361,6 +368,7 @@ wkup_i2c0: i2c@42120000 {
clocks = <&k3_clks 223 1>;
clock-names = "fck";
power-domains = <&k3_pds 223 TI_SCI_PD_EXCLUSIVE>;
+ bootph-all;
status = "disabled";
};
@@ -469,6 +477,7 @@ mcu_ringacc: ringacc@2b800000 {
<0x0 0x2a500000 0x0 0x40000>,
<0x0 0x28440000 0x0 0x40000>;
reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg";
+ bootph-all;
ti,num-rings = <286>;
ti,sci-rm-range-gp-rings = <0x1>;
ti,sci = <&sms>;
@@ -488,6 +497,7 @@ mcu_udmap: dma-controller@285c0000 {
"tchan", "rchan", "rflow";
msi-parent = <&main_udmass_inta>;
#dma-cells = <1>;
+ bootph-all;
ti,sci = <&sms>;
ti,sci-dev-id = <273>;
@@ -507,6 +517,8 @@ secure_proxy_mcu: mailbox@2a480000 {
reg = <0x00 0x2a480000 0x00 0x80000>,
<0x00 0x2a380000 0x00 0x80000>,
<0x00 0x2a400000 0x00 0x80000>;
+ bootph-pre-ram;
+
/*
* Marked Disabled:
* Node is incomplete as it is meant for bootloaders and
@@ -667,6 +679,7 @@ wkup_vtm0: temperature-sensor@42040000 {
<0x00 0x42050000 0x0 0x350>;
power-domains = <&k3_pds 180 TI_SCI_PD_SHARED>;
#thermal-sensor-cells = <1>;
+ bootph-pre-ram;
};
mcu_r5fss0: r5fss@41000000 {
--
2.46.0
^ permalink raw reply [flat|nested] 21+ messages in thread* [PATCH v5 05/12] arm64: dts: ti: k3-j721e: Add bootph-* properties
2024-10-23 6:57 [PATCH v5 00/12] Add bootph-all property for J7 boards Manorit Chawdhry
` (3 preceding siblings ...)
2024-10-23 6:57 ` [PATCH v5 04/12] arm64: dts: ti: k3-j721s2: " Manorit Chawdhry
@ 2024-10-23 6:57 ` Manorit Chawdhry
2024-10-23 11:24 ` Neha Malcom Francis
2024-10-23 6:57 ` [PATCH v5 06/12] arm64: dts: ti: k3-j7200: " Manorit Chawdhry
` (6 subsequent siblings)
11 siblings, 1 reply; 21+ messages in thread
From: Manorit Chawdhry @ 2024-10-23 6:57 UTC (permalink / raw)
To: Nishanth Menon, Vignesh Raghavendra, Tero Kristo, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-kernel, devicetree, linux-kernel, Neha Malcom Francis,
Aniket Limaye, Udit Kumar, Beleswar Padhi, Siddharth Vadapalli,
Andrew Davis, Manorit Chawdhry
Adds bootph-* properties to the leaf nodes to enable bootloaders to
utilise them.
Following adds bootph-* to
- System controller nodes that allow controlling power domain, clocks, etc.
- secure_proxy_sa3/secure_proxy_main mboxes for communication with
System Controller
- mcu_ringacc/mcu_udmap for DMA to SMS
- chipid for detection soc information.
- mcu_timer0 for bootloader tick-timer.
- hbmc_mux for enabling Hyperflash support
- ESM nodes for enabling ESM support.
- wkup_vtm for enabling Adaptive voltage scaling(AVS) support
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
---
arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 2 ++
arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi | 10 ++++++++++
2 files changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
index 0da785be80ff..af3d730154ac 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
@@ -226,6 +226,7 @@ secure_proxy_main: mailbox@32c00000 {
<0x00 0x32800000 0x00 0x100000>;
interrupt-names = "rx_011";
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+ bootph-all;
};
smmu0: iommu@36600000 {
@@ -2853,6 +2854,7 @@ main_spi7: spi@2170000 {
main_esm: esm@700000 {
compatible = "ti,j721e-esm";
reg = <0x0 0x700000 0x0 0x1000>;
+ bootph-pre-ram;
ti,esm-pins = <344>, <345>;
};
};
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
index 3731ffb4a5c9..cf5fb1160ada 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
@@ -21,16 +21,19 @@ dmsc: system-controller@44083000 {
k3_pds: power-controller {
compatible = "ti,sci-pm-domain";
#power-domain-cells = <2>;
+ bootph-all;
};
k3_clks: clock-controller {
compatible = "ti,k2g-sci-clk";
#clock-cells = <2>;
+ bootph-all;
};
k3_reset: reset-controller {
compatible = "ti,sci-reset";
#reset-cells = <2>;
+ bootph-all;
};
};
@@ -61,6 +64,7 @@ wkup_conf: bus@43000000 {
chipid: chipid@14 {
compatible = "ti,am654-chipid";
reg = <0x14 0x4>;
+ bootph-all;
};
};
@@ -112,6 +116,7 @@ mcu_timer0: timer@40400000 {
assigned-clocks = <&k3_clks 35 1>;
assigned-clock-parents = <&k3_clks 35 2>;
power-domains = <&k3_pds 35 TI_SCI_PD_EXCLUSIVE>;
+ bootph-pre-ram;
ti,timer-pwm;
/* Non-MPU Firmware usage */
status = "reserved";
@@ -362,6 +367,7 @@ hbmc_mux: mux-controller@47000004 {
reg = <0x00 0x47000004 0x00 0x4>;
#mux-control-cells = <1>;
mux-reg-masks = <0x0 0x2>; /* HBMC select */
+ bootph-all;
};
hbmc: hyperbus@47034000 {
@@ -470,6 +476,7 @@ mcu_ringacc: ringacc@2b800000 {
<0x0 0x2a500000 0x0 0x40000>,
<0x0 0x28440000 0x0 0x40000>;
reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg";
+ bootph-all;
ti,num-rings = <286>;
ti,sci-rm-range-gp-rings = <0x1>; /* GP ring range */
ti,sci = <&dmsc>;
@@ -489,6 +496,7 @@ mcu_udmap: dma-controller@285c0000 {
"tchan", "rchan", "rflow";
msi-parent = <&main_udmass_inta>;
#dma-cells = <1>;
+ bootph-all;
ti,sci = <&dmsc>;
ti,sci-dev-id = <236>;
@@ -509,6 +517,7 @@ secure_proxy_mcu: mailbox@2a480000 {
reg = <0x0 0x2a480000 0x0 0x80000>,
<0x0 0x2a380000 0x0 0x80000>,
<0x0 0x2a400000 0x0 0x80000>;
+ bootph-pre-ram;
/*
* Marked Disabled:
* Node is incomplete as it is meant for bootloaders and
@@ -687,6 +696,7 @@ wkup_vtm0: temperature-sensor@42040000 {
<0x00 0x43000300 0x00 0x10>;
power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>;
#thermal-sensor-cells = <1>;
+ bootph-pre-ram;
};
mcu_esm: esm@40800000 {
--
2.46.0
^ permalink raw reply [flat|nested] 21+ messages in thread* Re: [PATCH v5 05/12] arm64: dts: ti: k3-j721e: Add bootph-* properties
2024-10-23 6:57 ` [PATCH v5 05/12] arm64: dts: ti: k3-j721e: " Manorit Chawdhry
@ 2024-10-23 11:24 ` Neha Malcom Francis
0 siblings, 0 replies; 21+ messages in thread
From: Neha Malcom Francis @ 2024-10-23 11:24 UTC (permalink / raw)
To: Manorit Chawdhry, Nishanth Menon, Vignesh Raghavendra,
Tero Kristo, Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-kernel, devicetree, linux-kernel, Aniket Limaye,
Udit Kumar, Beleswar Padhi, Siddharth Vadapalli, Andrew Davis
Hi Manorit
On 23/10/24 12:27, Manorit Chawdhry wrote:
> Adds bootph-* properties to the leaf nodes to enable bootloaders to
> utilise them.
>
> Following adds bootph-* to
> - System controller nodes that allow controlling power domain, clocks, etc.
> - secure_proxy_sa3/secure_proxy_main mboxes for communication with
> System Controller
> - mcu_ringacc/mcu_udmap for DMA to SMS
> - chipid for detection soc information.
> - mcu_timer0 for bootloader tick-timer.
> - hbmc_mux for enabling Hyperflash support
> - ESM nodes for enabling ESM support.
> - wkup_vtm for enabling Adaptive voltage scaling(AVS) support
>
> Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
> ---
> arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 2 ++
> arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi | 10 ++++++++++
> 2 files changed, 12 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
> index 0da785be80ff..af3d730154ac 100644
> --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
> @@ -226,6 +226,7 @@ secure_proxy_main: mailbox@32c00000 {
> <0x00 0x32800000 0x00 0x100000>;
> interrupt-names = "rx_011";
> interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
> + bootph-all;
> };
>
> smmu0: iommu@36600000 {
> @@ -2853,6 +2854,7 @@ main_spi7: spi@2170000 {
> main_esm: esm@700000 {
> compatible = "ti,j721e-esm";
> reg = <0x0 0x700000 0x0 0x1000>;
> + bootph-pre-ram;
> ti,esm-pins = <344>, <345>;
> };
> };
> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
> index 3731ffb4a5c9..cf5fb1160ada 100644
> --- a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
> @@ -21,16 +21,19 @@ dmsc: system-controller@44083000 {
> k3_pds: power-controller {
> compatible = "ti,sci-pm-domain";
> #power-domain-cells = <2>;
> + bootph-all;
> };
>
> k3_clks: clock-controller {
> compatible = "ti,k2g-sci-clk";
> #clock-cells = <2>;
> + bootph-all;
> };
>
> k3_reset: reset-controller {
> compatible = "ti,sci-reset";
> #reset-cells = <2>;
> + bootph-all;
> };
> };
>
> @@ -61,6 +64,7 @@ wkup_conf: bus@43000000 {
> chipid: chipid@14 {
> compatible = "ti,am654-chipid";
> reg = <0x14 0x4>;
> + bootph-all;
> };
> };
>
> @@ -112,6 +116,7 @@ mcu_timer0: timer@40400000 {
> assigned-clocks = <&k3_clks 35 1>;
> assigned-clock-parents = <&k3_clks 35 2>;
> power-domains = <&k3_pds 35 TI_SCI_PD_EXCLUSIVE>;
> + bootph-pre-ram;
> ti,timer-pwm;
> /* Non-MPU Firmware usage */
> status = "reserved";
> @@ -362,6 +367,7 @@ hbmc_mux: mux-controller@47000004 {
> reg = <0x00 0x47000004 0x00 0x4>;
> #mux-control-cells = <1>;
> mux-reg-masks = <0x0 0x2>; /* HBMC select */
> + bootph-all;
> };
>
> hbmc: hyperbus@47034000 {
> @@ -470,6 +476,7 @@ mcu_ringacc: ringacc@2b800000 {
> <0x0 0x2a500000 0x0 0x40000>,
> <0x0 0x28440000 0x0 0x40000>;
> reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg";
> + bootph-all;
> ti,num-rings = <286>;
> ti,sci-rm-range-gp-rings = <0x1>; /* GP ring range */
> ti,sci = <&dmsc>;
> @@ -489,6 +496,7 @@ mcu_udmap: dma-controller@285c0000 {
> "tchan", "rchan", "rflow";
> msi-parent = <&main_udmass_inta>;
> #dma-cells = <1>;
> + bootph-all;
>
> ti,sci = <&dmsc>;
> ti,sci-dev-id = <236>;
> @@ -509,6 +517,7 @@ secure_proxy_mcu: mailbox@2a480000 {
> reg = <0x0 0x2a480000 0x0 0x80000>,
> <0x0 0x2a380000 0x0 0x80000>,
> <0x0 0x2a400000 0x0 0x80000>;
> + bootph-pre-ram;
> /*
> * Marked Disabled:
> * Node is incomplete as it is meant for bootloaders and
> @@ -687,6 +696,7 @@ wkup_vtm0: temperature-sensor@42040000 {
> <0x00 0x43000300 0x00 0x10>;
> power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>;
> #thermal-sensor-cells = <1>;
> + bootph-pre-ram;
> };
>
> mcu_esm: esm@40800000 {
>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
--
Thanking You
Neha Malcom Francis
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v5 06/12] arm64: dts: ti: k3-j7200: Add bootph-* properties
2024-10-23 6:57 [PATCH v5 00/12] Add bootph-all property for J7 boards Manorit Chawdhry
` (4 preceding siblings ...)
2024-10-23 6:57 ` [PATCH v5 05/12] arm64: dts: ti: k3-j721e: " Manorit Chawdhry
@ 2024-10-23 6:57 ` Manorit Chawdhry
2024-10-23 15:05 ` Aniket Limaye
2024-10-23 6:57 ` [PATCH v5 07/12] arm64: dts: ti: k3-j784s4-j742s2-evm-common: Remove parent nodes bootph-* Manorit Chawdhry
` (5 subsequent siblings)
11 siblings, 1 reply; 21+ messages in thread
From: Manorit Chawdhry @ 2024-10-23 6:57 UTC (permalink / raw)
To: Nishanth Menon, Vignesh Raghavendra, Tero Kristo, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-kernel, devicetree, linux-kernel, Neha Malcom Francis,
Aniket Limaye, Udit Kumar, Beleswar Padhi, Siddharth Vadapalli,
Andrew Davis, Manorit Chawdhry
Adds bootph-* properties to the leaf nodes to enable bootloaders to
utilise them.
Following adds bootph-* to
- System controller nodes that allow controlling power domain, clocks, etc.
- secure_proxy_sa3/secure_proxy_main mboxes for communication with
System Controller
- mcu_ringacc/mcu_udmap for DMA to SMS
- chipid for detection soc information.
- mcu_timer0 for bootloader tick-timer.
- hbmc_mux for enabling Hyperflash support
- ESM nodes for enabling ESM support.
- wkup_vtm for enabling Adaptive voltage scaling(AVS) support
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
---
arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 2 ++
arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 11 +++++++++++
2 files changed, 13 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
index 9386bf3ef9f6..ac9c0a939461 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
@@ -136,6 +136,7 @@ secure_proxy_main: mailbox@32c00000 {
<0x00 0x32800000 0x00 0x100000>;
interrupt-names = "rx_011";
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+ bootph-all;
};
hwspinlock: spinlock@30e00000 {
@@ -1527,6 +1528,7 @@ main_r5fss0_core1: r5f@5d00000 {
main_esm: esm@700000 {
compatible = "ti,j721e-esm";
reg = <0x0 0x700000 0x0 0x1000>;
+ bootph-pre-ram;
ti,esm-pins = <656>, <657>;
};
};
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
index 5097d192c2b2..7e9ad2301937 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
@@ -21,16 +21,19 @@ dmsc: system-controller@44083000 {
k3_pds: power-controller {
compatible = "ti,sci-pm-domain";
#power-domain-cells = <2>;
+ bootph-all;
};
k3_clks: clock-controller {
compatible = "ti,k2g-sci-clk";
#clock-cells = <2>;
+ bootph-all;
};
k3_reset: reset-controller {
compatible = "ti,sci-reset";
#reset-cells = <2>;
+ bootph-all;
};
};
@@ -44,6 +47,7 @@ mcu_timer0: timer@40400000 {
assigned-clocks = <&k3_clks 35 1>;
assigned-clock-parents = <&k3_clks 35 2>;
power-domains = <&k3_pds 35 TI_SCI_PD_EXCLUSIVE>;
+ bootph-pre-ram;
ti,timer-pwm;
};
@@ -191,6 +195,7 @@ wkup_conf: bus@43000000 {
chipid: chipid@14 {
compatible = "ti,am654-chipid";
reg = <0x14 0x4>;
+ bootph-all;
};
};
@@ -344,6 +349,7 @@ mcu_ringacc: ringacc@2b800000 {
<0x00 0x28440000 0x00 0x40000>;
reg-names = "rt", "fifos", "proxy_gcfg",
"proxy_target", "cfg";
+ bootph-all;
ti,num-rings = <286>;
ti,sci-rm-range-gp-rings = <0x1>; /* GP ring range */
ti,sci = <&dmsc>;
@@ -363,6 +369,7 @@ mcu_udmap: dma-controller@285c0000 {
"tchan", "rchan", "rflow";
msi-parent = <&main_udmass_inta>;
#dma-cells = <1>;
+ bootph-all;
ti,sci = <&dmsc>;
ti,sci-dev-id = <236>;
@@ -383,6 +390,8 @@ secure_proxy_mcu: mailbox@2a480000 {
reg = <0x0 0x2a480000 0x0 0x80000>,
<0x0 0x2a380000 0x0 0x80000>,
<0x0 0x2a400000 0x0 0x80000>;
+ bootph-pre-ram;
+
/*
* Marked Disabled:
* Node is incomplete as it is meant for bootloaders and
@@ -534,6 +543,7 @@ hbmc_mux: mux-controller@47000004 {
reg = <0x00 0x47000004 0x00 0x4>;
#mux-control-cells = <1>;
mux-reg-masks = <0x0 0x2>; /* HBMC select */
+ bootph-all;
};
hbmc: hyperbus@47034000 {
@@ -652,6 +662,7 @@ wkup_vtm0: temperature-sensor@42040000 {
<0x00 0x42050000 0x00 0x350>;
power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>;
#thermal-sensor-cells = <1>;
+ bootph-pre-ram;
};
mcu_esm: esm@40800000 {
--
2.46.0
^ permalink raw reply [flat|nested] 21+ messages in thread* Re: [PATCH v5 06/12] arm64: dts: ti: k3-j7200: Add bootph-* properties
2024-10-23 6:57 ` [PATCH v5 06/12] arm64: dts: ti: k3-j7200: " Manorit Chawdhry
@ 2024-10-23 15:05 ` Aniket Limaye
0 siblings, 0 replies; 21+ messages in thread
From: Aniket Limaye @ 2024-10-23 15:05 UTC (permalink / raw)
To: Manorit Chawdhry, Nishanth Menon, Vignesh Raghavendra,
Tero Kristo, Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-kernel, devicetree, linux-kernel, Neha Malcom Francis,
Udit Kumar, Beleswar Padhi, Siddharth Vadapalli, Andrew Davis
On 23/10/24 12:27, Manorit Chawdhry wrote:
> Adds bootph-* properties to the leaf nodes to enable bootloaders to
> utilise them.
>
> Following adds bootph-* to
> - System controller nodes that allow controlling power domain, clocks, etc.
> - secure_proxy_sa3/secure_proxy_main mboxes for communication with
> System Controller
> - mcu_ringacc/mcu_udmap for DMA to SMS
> - chipid for detection soc information.
> - mcu_timer0 for bootloader tick-timer.
> - hbmc_mux for enabling Hyperflash support
> - ESM nodes for enabling ESM support.
> - wkup_vtm for enabling Adaptive voltage scaling(AVS) support
>
> Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Thanks for the patch!
Reviewed-by: Aniket Limaye <a-limaye@ti.com>
> ---
> arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 2 ++
> arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 11 +++++++++++
> 2 files changed, 13 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
> index 9386bf3ef9f6..ac9c0a939461 100644
> --- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
> @@ -136,6 +136,7 @@ secure_proxy_main: mailbox@32c00000 {
> <0x00 0x32800000 0x00 0x100000>;
> interrupt-names = "rx_011";
> interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
> + bootph-all;
> };
>
> hwspinlock: spinlock@30e00000 {
> @@ -1527,6 +1528,7 @@ main_r5fss0_core1: r5f@5d00000 {
> main_esm: esm@700000 {
> compatible = "ti,j721e-esm";
> reg = <0x0 0x700000 0x0 0x1000>;
> + bootph-pre-ram;
> ti,esm-pins = <656>, <657>;
> };
> };
> diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
> index 5097d192c2b2..7e9ad2301937 100644
> --- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
> @@ -21,16 +21,19 @@ dmsc: system-controller@44083000 {
> k3_pds: power-controller {
> compatible = "ti,sci-pm-domain";
> #power-domain-cells = <2>;
> + bootph-all;
> };
>
> k3_clks: clock-controller {
> compatible = "ti,k2g-sci-clk";
> #clock-cells = <2>;
> + bootph-all;
> };
>
> k3_reset: reset-controller {
> compatible = "ti,sci-reset";
> #reset-cells = <2>;
> + bootph-all;
> };
> };
>
> @@ -44,6 +47,7 @@ mcu_timer0: timer@40400000 {
> assigned-clocks = <&k3_clks 35 1>;
> assigned-clock-parents = <&k3_clks 35 2>;
> power-domains = <&k3_pds 35 TI_SCI_PD_EXCLUSIVE>;
> + bootph-pre-ram;
> ti,timer-pwm;
> };
>
> @@ -191,6 +195,7 @@ wkup_conf: bus@43000000 {
> chipid: chipid@14 {
> compatible = "ti,am654-chipid";
> reg = <0x14 0x4>;
> + bootph-all;
> };
> };
>
> @@ -344,6 +349,7 @@ mcu_ringacc: ringacc@2b800000 {
> <0x00 0x28440000 0x00 0x40000>;
> reg-names = "rt", "fifos", "proxy_gcfg",
> "proxy_target", "cfg";
> + bootph-all;
> ti,num-rings = <286>;
> ti,sci-rm-range-gp-rings = <0x1>; /* GP ring range */
> ti,sci = <&dmsc>;
> @@ -363,6 +369,7 @@ mcu_udmap: dma-controller@285c0000 {
> "tchan", "rchan", "rflow";
> msi-parent = <&main_udmass_inta>;
> #dma-cells = <1>;
> + bootph-all;
>
> ti,sci = <&dmsc>;
> ti,sci-dev-id = <236>;
> @@ -383,6 +390,8 @@ secure_proxy_mcu: mailbox@2a480000 {
> reg = <0x0 0x2a480000 0x0 0x80000>,
> <0x0 0x2a380000 0x0 0x80000>,
> <0x0 0x2a400000 0x0 0x80000>;
> + bootph-pre-ram;
> +
> /*
> * Marked Disabled:
> * Node is incomplete as it is meant for bootloaders and
> @@ -534,6 +543,7 @@ hbmc_mux: mux-controller@47000004 {
> reg = <0x00 0x47000004 0x00 0x4>;
> #mux-control-cells = <1>;
> mux-reg-masks = <0x0 0x2>; /* HBMC select */
> + bootph-all;
> };
>
> hbmc: hyperbus@47034000 {
> @@ -652,6 +662,7 @@ wkup_vtm0: temperature-sensor@42040000 {
> <0x00 0x42050000 0x00 0x350>;
> power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>;
> #thermal-sensor-cells = <1>;
> + bootph-pre-ram;
> };
>
> mcu_esm: esm@40800000 {
>
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v5 07/12] arm64: dts: ti: k3-j784s4-j742s2-evm-common: Remove parent nodes bootph-*
2024-10-23 6:57 [PATCH v5 00/12] Add bootph-all property for J7 boards Manorit Chawdhry
` (5 preceding siblings ...)
2024-10-23 6:57 ` [PATCH v5 06/12] arm64: dts: ti: k3-j7200: " Manorit Chawdhry
@ 2024-10-23 6:57 ` Manorit Chawdhry
2024-10-23 15:25 ` Aniket Limaye
2024-10-23 6:57 ` [PATCH v5 08/12] arm64: dts: ti: k3-j721s2-evm*: Add bootph-* properties Manorit Chawdhry
` (4 subsequent siblings)
11 siblings, 1 reply; 21+ messages in thread
From: Manorit Chawdhry @ 2024-10-23 6:57 UTC (permalink / raw)
To: Nishanth Menon, Vignesh Raghavendra, Tero Kristo, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-kernel, devicetree, linux-kernel, Neha Malcom Francis,
Aniket Limaye, Udit Kumar, Beleswar Padhi, Siddharth Vadapalli,
Andrew Davis, Manorit Chawdhry
Adding bootph properties on leaf nodes imply that they are applicable to
the parent nodes as well. Bootloaders can derive the parent nodes when
bootph is available in the leaf nodes.
Remove the bootph-* properties from parent nodes as they are redundant.
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
---
arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi | 9 ---------
1 file changed, 9 deletions(-)
diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi
index 98453171a179..b2e2b9f507a9 100644
--- a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi
@@ -305,7 +305,6 @@ &wkup_gpio0 {
};
&main_pmx0 {
- bootph-all;
main_cpsw2g_default_pins: main-cpsw2g-default-pins {
pinctrl-single,pins = <
J784S4_IOPAD(0x0b8, PIN_INPUT, 6) /* (AC34) MCASP1_ACLKX.RGMII1_RD0 */
@@ -432,7 +431,6 @@ J784S4_IOPAD(0x078, PIN_OUTPUT, 1) /* (AH37) MCAN2_RX.AUDIO_EXT_REFCLK1 */
};
&wkup_pmx2 {
- bootph-all;
wkup_uart0_pins_default: wkup-uart0-default-pins {
bootph-all;
pinctrl-single,pins = <
@@ -548,7 +546,6 @@ J784S4_WKUP_IOPAD(0x028, PIN_INPUT, 7)
};
&wkup_pmx0 {
- bootph-all;
mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-default-pins {
bootph-all;
pinctrl-single,pins = <
@@ -568,7 +565,6 @@ J784S4_WKUP_IOPAD(0x008, PIN_INPUT, 0) /* (C34) MCU_OSPI0_DQS */
};
&wkup_pmx1 {
- bootph-all;
mcu_fss0_ospi0_1_pins_default: mcu-fss0-ospi0-1-default-pins {
bootph-all;
pinctrl-single,pins = <
@@ -740,18 +736,15 @@ &ufs_wrapper {
};
&fss {
- bootph-all;
status = "okay";
};
&ospi0 {
- bootph-all;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&mcu_fss0_ospi0_pins_default>, <&mcu_fss0_ospi0_1_pins_default>;
flash@0 {
- bootph-all;
compatible = "jedec,spi-nor";
reg = <0x0>;
spi-tx-bus-width = <8>;
@@ -808,13 +801,11 @@ partition@3fc0000 {
};
&ospi1 {
- bootph-all;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&mcu_fss0_ospi1_pins_default>;
flash@0 {
- bootph-all;
compatible = "jedec,spi-nor";
reg = <0x0>;
spi-tx-bus-width = <1>;
--
2.46.0
^ permalink raw reply [flat|nested] 21+ messages in thread* Re: [PATCH v5 07/12] arm64: dts: ti: k3-j784s4-j742s2-evm-common: Remove parent nodes bootph-*
2024-10-23 6:57 ` [PATCH v5 07/12] arm64: dts: ti: k3-j784s4-j742s2-evm-common: Remove parent nodes bootph-* Manorit Chawdhry
@ 2024-10-23 15:25 ` Aniket Limaye
0 siblings, 0 replies; 21+ messages in thread
From: Aniket Limaye @ 2024-10-23 15:25 UTC (permalink / raw)
To: Manorit Chawdhry, Nishanth Menon, Vignesh Raghavendra,
Tero Kristo, Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-kernel, devicetree, linux-kernel, Neha Malcom Francis,
Udit Kumar, Beleswar Padhi, Siddharth Vadapalli, Andrew Davis
On 23/10/24 12:27, Manorit Chawdhry wrote:
> Adding bootph properties on leaf nodes imply that they are applicable to
> the parent nodes as well. Bootloaders can derive the parent nodes when
> bootph is available in the leaf nodes.
>
> Remove the bootph-* properties from parent nodes as they are redundant.
>
> Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Reviewed-by: Aniket Limaye <a-limaye@ti.com>
> ---
> arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi | 9 ---------
> 1 file changed, 9 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi
> index 98453171a179..b2e2b9f507a9 100644
> --- a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi
> @@ -305,7 +305,6 @@ &wkup_gpio0 {
> };
>
> &main_pmx0 {
> - bootph-all;
> main_cpsw2g_default_pins: main-cpsw2g-default-pins {
> pinctrl-single,pins = <
> J784S4_IOPAD(0x0b8, PIN_INPUT, 6) /* (AC34) MCASP1_ACLKX.RGMII1_RD0 */
> @@ -432,7 +431,6 @@ J784S4_IOPAD(0x078, PIN_OUTPUT, 1) /* (AH37) MCAN2_RX.AUDIO_EXT_REFCLK1 */
> };
>
> &wkup_pmx2 {
> - bootph-all;
> wkup_uart0_pins_default: wkup-uart0-default-pins {
> bootph-all;
> pinctrl-single,pins = <
> @@ -548,7 +546,6 @@ J784S4_WKUP_IOPAD(0x028, PIN_INPUT, 7)
> };
>
> &wkup_pmx0 {
> - bootph-all;
> mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-default-pins {
> bootph-all;
> pinctrl-single,pins = <
> @@ -568,7 +565,6 @@ J784S4_WKUP_IOPAD(0x008, PIN_INPUT, 0) /* (C34) MCU_OSPI0_DQS */
> };
>
> &wkup_pmx1 {
> - bootph-all;
> mcu_fss0_ospi0_1_pins_default: mcu-fss0-ospi0-1-default-pins {
> bootph-all;
> pinctrl-single,pins = <
> @@ -740,18 +736,15 @@ &ufs_wrapper {
> };
>
> &fss {
> - bootph-all;
> status = "okay";
> };
>
> &ospi0 {
> - bootph-all;
> status = "okay";
> pinctrl-names = "default";
> pinctrl-0 = <&mcu_fss0_ospi0_pins_default>, <&mcu_fss0_ospi0_1_pins_default>;
>
> flash@0 {
> - bootph-all;
> compatible = "jedec,spi-nor";
> reg = <0x0>;
> spi-tx-bus-width = <8>;
> @@ -808,13 +801,11 @@ partition@3fc0000 {
> };
>
> &ospi1 {
> - bootph-all;
> status = "okay";
> pinctrl-names = "default";
> pinctrl-0 = <&mcu_fss0_ospi1_pins_default>;
>
> flash@0 {
> - bootph-all;
> compatible = "jedec,spi-nor";
> reg = <0x0>;
> spi-tx-bus-width = <1>;
>
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v5 08/12] arm64: dts: ti: k3-j721s2-evm*: Add bootph-* properties
2024-10-23 6:57 [PATCH v5 00/12] Add bootph-all property for J7 boards Manorit Chawdhry
` (6 preceding siblings ...)
2024-10-23 6:57 ` [PATCH v5 07/12] arm64: dts: ti: k3-j784s4-j742s2-evm-common: Remove parent nodes bootph-* Manorit Chawdhry
@ 2024-10-23 6:57 ` Manorit Chawdhry
2024-10-23 6:57 ` [PATCH v5 09/12] arm64: dts: ti: k3-am68-sk*: " Manorit Chawdhry
` (3 subsequent siblings)
11 siblings, 0 replies; 21+ messages in thread
From: Manorit Chawdhry @ 2024-10-23 6:57 UTC (permalink / raw)
To: Nishanth Menon, Vignesh Raghavendra, Tero Kristo, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-kernel, devicetree, linux-kernel, Neha Malcom Francis,
Aniket Limaye, Udit Kumar, Beleswar Padhi, Siddharth Vadapalli,
Andrew Davis, Manorit Chawdhry
Adds bootph-* properties to the leaf nodes to enable bootloaders to
utilise them.
Following adds bootph-* to:
- pmic regulator for enabling AVS Support
- main_uart8, mcu_uart0(DM), wkup_uart0(TIFS) for Traces
- mmc0, mmc1, usb0, ospi0, ospi1 for enabling various bootmodes.
Reviewed-by: Andrew Davis <afd@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
---
Notes:
R-by picked up in v3 ( Andrew )
arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts | 14 ++++++++++++++
arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi | 3 +++
2 files changed, 17 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts
index c5a0b7cbb14f..e2fc1288ed07 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts
@@ -138,6 +138,7 @@ J721S2_IOPAD(0x044, PIN_OUTPUT, 14) /* (Y26) MCASP0_AXR1.UART8_RTSn */
J721S2_IOPAD(0x0d0, PIN_INPUT, 11) /* (AF26) SPI0_CS1.UART8_RXD */
J721S2_IOPAD(0x0d4, PIN_OUTPUT, 11) /* (AH27) SPI0_CLK.UART8_TXD */
>;
+ bootph-all;
};
main_i2c3_pins_default: main-i2c3-default-pins {
@@ -165,6 +166,7 @@ J721S2_IOPAD(0x0f4, PIN_INPUT, 0) /* (R24) MMC1_DAT2 */
J721S2_IOPAD(0x0f0, PIN_INPUT, 0) /* (R22) MMC1_DAT3 */
J721S2_IOPAD(0x0e8, PIN_INPUT, 8) /* (AE25) TIMER_IO0.MMC1_SDCD */
>;
+ bootph-all;
};
vdd_sd_dv_pins_default: vdd-sd-dv-default-pins {
@@ -177,6 +179,7 @@ main_usbss0_pins_default: main-usbss0-default-pins {
pinctrl-single,pins = <
J721S2_IOPAD(0x0ec, PIN_OUTPUT, 6) /* (AG25) TIMER_IO1.USB0_DRVVBUS */
>;
+ bootph-all;
};
main_mcan3_pins_default: main-mcan3-default-pins {
@@ -200,6 +203,7 @@ wkup_uart0_pins_default: wkup-uart0-default-pins {
J721S2_WKUP_IOPAD(0x048, PIN_INPUT, 0) /* (D28) WKUP_UART0_RXD */
J721S2_WKUP_IOPAD(0x04c, PIN_OUTPUT, 0) /* (D27) WKUP_UART0_TXD */
>;
+ bootph-all;
};
mcu_uart0_pins_default: mcu-uart0-default-pins {
@@ -209,6 +213,7 @@ J721S2_WKUP_IOPAD(0x094, PIN_OUTPUT, 0) /* (D25) WKUP_GPIO0_15.MCU_UART0_RTSn */
J721S2_WKUP_IOPAD(0x08c, PIN_INPUT, 0) /* (C24) WKUP_GPIO0_13.MCU_UART0_RXD */
J721S2_WKUP_IOPAD(0x088, PIN_OUTPUT, 0) /* (C25) WKUP_GPIO0_12.MCU_UART0_TXD */
>;
+ bootph-all;
};
mcu_cpsw_pins_default: mcu-cpsw-default-pins {
@@ -301,6 +306,7 @@ J721S2_WKUP_IOPAD(0x020, PIN_INPUT, 0) /* (A20) MCU_OSPI1_D3 */
J721S2_WKUP_IOPAD(0x010, PIN_INPUT, 0) /* (B19) MCU_OSPI1_DQS */
J721S2_WKUP_IOPAD(0x00c, PIN_INPUT, 0) /* (B20) MCU_OSPI1_LBCLKO */
>;
+ bootph-all;
};
};
@@ -316,12 +322,14 @@ &wkup_uart0 {
status = "reserved";
pinctrl-names = "default";
pinctrl-0 = <&wkup_uart0_pins_default>;
+ bootph-all;
};
&mcu_uart0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&mcu_uart0_pins_default>;
+ bootph-all;
};
&main_uart8 {
@@ -330,6 +338,7 @@ &main_uart8 {
pinctrl-0 = <&main_uart8_pins_default>;
/* Shared with TFA on this platform */
power-domains = <&k3_pds 357 TI_SCI_PD_SHARED>;
+ bootph-all;
};
&main_i2c0 {
@@ -383,6 +392,7 @@ &main_sdhci0 {
/* eMMC */
status = "okay";
non-removable;
+ bootph-all;
ti,driver-strength-ohm = <50>;
disable-wp;
};
@@ -395,6 +405,7 @@ &main_sdhci1 {
disable-wp;
vmmc-supply = <&vdd_mmc1>;
vqmmc-supply = <&vdd_sd_dv>;
+ bootph-all;
};
&mcu_cpsw {
@@ -444,6 +455,7 @@ &usbss0 {
status = "okay";
pinctrl-0 = <&main_usbss0_pins_default>;
pinctrl-names = "default";
+ bootph-all;
ti,vbus-divider;
ti,usb2-only;
};
@@ -451,6 +463,7 @@ &usbss0 {
&usb0 {
dr_mode = "otg";
maximum-speed = "high-speed";
+ bootph-all;
};
&ospi1 {
@@ -464,6 +477,7 @@ flash@0 {
spi-tx-bus-width = <1>;
spi-rx-bus-width = <4>;
spi-max-frequency = <40000000>;
+ bootph-all;
cdns,tshsl-ns = <60>;
cdns,tsd2d-ns = <60>;
cdns,tchsh-ns = <60>;
diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi
index 89252e4a5f1b..b3a0385ed3d8 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi
@@ -170,6 +170,7 @@ J721S2_WKUP_IOPAD(0x028, PIN_INPUT, 0) /* (F20) MCU_OSPI0_D7 */
J721S2_WKUP_IOPAD(0x008, PIN_INPUT, 0) /* (E18) MCU_OSPI0_DQS */
J721S2_WKUP_IOPAD(0x004, PIN_INPUT, 0) /* (E20) MCU_OSPI0_LBCLKO */
>;
+ bootph-all;
};
};
@@ -188,6 +189,7 @@ wkup_i2c0_pins_default: wkup-i2c0-default-pins {
J721S2_WKUP_IOPAD(0x98, PIN_INPUT, 0) /* (H24) WKUP_I2C0_SCL */
J721S2_WKUP_IOPAD(0x9c, PIN_INPUT, 0) /* (H27) WKUP_I2C0_SDA */
>;
+ bootph-pre-ram;
};
};
@@ -440,6 +442,7 @@ flash@0 {
spi-tx-bus-width = <8>;
spi-rx-bus-width = <8>;
spi-max-frequency = <25000000>;
+ bootph-all;
cdns,tshsl-ns = <60>;
cdns,tsd2d-ns = <60>;
cdns,tchsh-ns = <60>;
--
2.46.0
^ permalink raw reply [flat|nested] 21+ messages in thread* [PATCH v5 09/12] arm64: dts: ti: k3-am68-sk*: Add bootph-* properties
2024-10-23 6:57 [PATCH v5 00/12] Add bootph-all property for J7 boards Manorit Chawdhry
` (7 preceding siblings ...)
2024-10-23 6:57 ` [PATCH v5 08/12] arm64: dts: ti: k3-j721s2-evm*: Add bootph-* properties Manorit Chawdhry
@ 2024-10-23 6:57 ` Manorit Chawdhry
2024-10-23 6:57 ` [PATCH v5 10/12] arm64: dts: ti: k3-j721e-evm*: " Manorit Chawdhry
` (2 subsequent siblings)
11 siblings, 0 replies; 21+ messages in thread
From: Manorit Chawdhry @ 2024-10-23 6:57 UTC (permalink / raw)
To: Nishanth Menon, Vignesh Raghavendra, Tero Kristo, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-kernel, devicetree, linux-kernel, Neha Malcom Francis,
Aniket Limaye, Udit Kumar, Beleswar Padhi, Siddharth Vadapalli,
Andrew Davis, Manorit Chawdhry
Adds bootph-* properties to the leaf nodes to enable bootloaders to
utilise them.
Following adds bootph-* to:
- main_uart8, mcu_uart0(DM), wkup_uart0(TIFS) for Traces
- mmc1, ospi0 for enabling various bootmodes.
- eeprom for board detection
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
---
Notes:
R-by picked up in v4 ( Udit )
arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts | 8 ++++++++
arch/arm64/boot/dts/ti/k3-am68-sk-som.dtsi | 5 +++--
2 files changed, 11 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts b/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts
index d5ceab79536c..11522b36e0ce 100644
--- a/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts
@@ -184,6 +184,7 @@ main_uart8_pins_default: main-uart8-default-pins {
J721S2_IOPAD(0x0d0, PIN_INPUT, 11) /* (AF26) SPI0_CS1.UART8_RXD */
J721S2_IOPAD(0x0d4, PIN_OUTPUT, 11) /* (AH27) SPI0_CLK.UART8_TXD */
>;
+ bootph-all;
};
main_i2c0_pins_default: main-i2c0-default-pins {
@@ -211,6 +212,7 @@ J721S2_IOPAD(0x0f4, PIN_INPUT, 0) /* (R24) MMC1_DAT2 */
J721S2_IOPAD(0x0f0, PIN_INPUT, 0) /* (R22) MMC1_DAT3 */
J721S2_IOPAD(0x0e8, PIN_INPUT, 8) /* (AE25) TIMER_IO0.MMC1_SDCD */
>;
+ bootph-all;
};
vdd_sd_dv_pins_default: vdd-sd-dv-default-pins {
@@ -313,6 +315,7 @@ J721S2_WKUP_IOPAD(0x074, PIN_OUTPUT, 0) /* (F28) WKUP_GPIO0_7.WKUP_UART0_RTSn */
J721S2_WKUP_IOPAD(0x048, PIN_INPUT, 0) /* (D28) WKUP_UART0_RXD */
J721S2_WKUP_IOPAD(0x04c, PIN_OUTPUT, 0) /* (D27) WKUP_UART0_TXD */
>;
+ bootph-all;
};
mcu_cpsw_pins_default: mcu-cpsw-default-pins {
@@ -372,6 +375,7 @@ mcu_uart0_pins_default: mcu-uart0-default-pins {
J721S2_WKUP_IOPAD(0x08c, PIN_INPUT, 0) /* (C24) WKUP_GPIO0_13.MCU_UART0_RXD */
J721S2_WKUP_IOPAD(0x088, PIN_OUTPUT, 0) /* (C25) WKUP_GPIO0_12.MCU_UART0_TXD */
>;
+ bootph-all;
};
mcu_rpi_header_gpio0_pins0_default: mcu-rpi-header-gpio0-default-pins-0 {
@@ -413,6 +417,7 @@ &wkup_uart0 {
status = "reserved";
pinctrl-names = "default";
pinctrl-0 = <&wkup_uart0_pins_default>;
+ bootph-all;
};
&wkup_i2c0 {
@@ -495,6 +500,7 @@ &mcu_uart0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&mcu_uart0_pins_default>;
+ bootph-all;
};
&main_uart8 {
@@ -503,6 +509,7 @@ &main_uart8 {
pinctrl-0 = <&main_uart8_pins_default>;
/* Shared with TFA on this platform */
power-domains = <&k3_pds 357 TI_SCI_PD_SHARED>;
+ bootph-all;
};
&main_i2c0 {
@@ -597,6 +604,7 @@ &main_sdhci1 {
disable-wp;
vmmc-supply = <&vdd_mmc1>;
vqmmc-supply = <&vdd_sd_dv>;
+ bootph-all;
};
&mcu_cpsw {
diff --git a/arch/arm64/boot/dts/ti/k3-am68-sk-som.dtsi b/arch/arm64/boot/dts/ti/k3-am68-sk-som.dtsi
index 5bc0d2fb4b8f..4ca2d4e2fb9b 100644
--- a/arch/arm64/boot/dts/ti/k3-am68-sk-som.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am68-sk-som.dtsi
@@ -156,6 +156,7 @@ wkup_i2c0_pins_default: wkup-i2c0-default-pins {
J721S2_WKUP_IOPAD(0x098, PIN_INPUT, 0) /* (H24) WKUP_I2C0_SCL */
J721S2_WKUP_IOPAD(0x09c, PIN_INPUT, 0) /* (H27) WKUP_I2C0_SDA */
>;
+ bootph-all;
};
};
@@ -169,6 +170,7 @@ eeprom@51 {
/* AT24C512C-MAHM-T */
compatible = "atmel,24c512";
reg = <0x51>;
+ bootph-all;
};
};
@@ -190,7 +192,6 @@ flash@0 {
cdns,read-delay = <4>;
partitions {
- bootph-all;
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
@@ -226,9 +227,9 @@ partition@800000 {
};
partition@3fc0000 {
- bootph-pre-ram;
label = "ospi.phypattern";
reg = <0x3fc0000 0x40000>;
+ bootph-all;
};
};
};
--
2.46.0
^ permalink raw reply [flat|nested] 21+ messages in thread* [PATCH v5 10/12] arm64: dts: ti: k3-j721e-evm*: Add bootph-* properties
2024-10-23 6:57 [PATCH v5 00/12] Add bootph-all property for J7 boards Manorit Chawdhry
` (8 preceding siblings ...)
2024-10-23 6:57 ` [PATCH v5 09/12] arm64: dts: ti: k3-am68-sk*: " Manorit Chawdhry
@ 2024-10-23 6:57 ` Manorit Chawdhry
2024-10-23 11:33 ` Neha Malcom Francis
2024-10-23 6:57 ` [PATCH v5 11/12] arm64: dts: ti: k3-j721e-sk*: " Manorit Chawdhry
2024-10-23 6:57 ` [PATCH v5 12/12] arm64: dts: ti: k3-j7200-evm*: " Manorit Chawdhry
11 siblings, 1 reply; 21+ messages in thread
From: Manorit Chawdhry @ 2024-10-23 6:57 UTC (permalink / raw)
To: Nishanth Menon, Vignesh Raghavendra, Tero Kristo, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-kernel, devicetree, linux-kernel, Neha Malcom Francis,
Aniket Limaye, Udit Kumar, Beleswar Padhi, Siddharth Vadapalli,
Andrew Davis, Manorit Chawdhry
Adds bootph-* properties to the leaf nodes to enable bootloaders to
utilise them.
Following adds bootph-* to:
- main_uart0, mcu_uart0(DM), wkup_uart0(TIFS) for Traces
- mmc0, mmc1, usb0, ospi0, ospi1, hbmc for enabling various bootmodes.
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
---
arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts | 16 ++++++++++++++++
arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi | 5 +++++
2 files changed, 21 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
index 8230d53cd696..4c1e02a4e7a2 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
@@ -193,6 +193,7 @@ J721E_IOPAD(0x1c0, PIN_OUTPUT, 1) /* (AA2) SPI0_CS0.UART0_RTSn */
J721E_IOPAD(0x1e8, PIN_INPUT, 0) /* (AB2) UART0_RXD */
J721E_IOPAD(0x1ec, PIN_OUTPUT, 0) /* (AB3) UART0_TXD */
>;
+ bootph-all;
};
main_uart1_pins_default: main-uart1-default-pins {
@@ -234,6 +235,7 @@ J721E_IOPAD(0x240, PIN_INPUT, 0) /* (R26) MMC1_DAT3 */
J721E_IOPAD(0x258, PIN_INPUT, 0) /* (P23) MMC1_SDCD */
J721E_IOPAD(0x25c, PIN_INPUT, 0) /* (R28) MMC1_SDWP */
>;
+ bootph-all;
};
vdd_sd_dv_alt_pins_default: vdd-sd-dv-alt-default-pins {
@@ -247,6 +249,7 @@ main_usbss0_pins_default: main-usbss0-default-pins {
J721E_IOPAD(0x290, PIN_OUTPUT, 0) /* (U6) USB0_DRVVBUS */
J721E_IOPAD(0x210, PIN_INPUT, 7) /* (W3) MCAN1_RX.GPIO1_3 */
>;
+ bootph-all;
};
main_usbss1_pins_default: main-usbss1-default-pins {
@@ -342,6 +345,7 @@ wkup_uart0_pins_default: wkup-uart0-default-pins {
J721E_WKUP_IOPAD(0xa0, PIN_INPUT, 0) /* (J29) WKUP_UART0_RXD */
J721E_WKUP_IOPAD(0xa4, PIN_OUTPUT, 0) /* (J28) WKUP_UART0_TXD */
>;
+ bootph-all;
};
mcu_uart0_pins_default: mcu-uart0-default-pins {
@@ -351,6 +355,7 @@ J721E_WKUP_IOPAD(0xec, PIN_OUTPUT, 0) /* (J27) WKUP_GPIO0_15.MCU_UART0_RTSn */
J721E_WKUP_IOPAD(0xe4, PIN_INPUT, 0) /* (H28) WKUP_GPIO0_13.MCU_UART0_RXD */
J721E_WKUP_IOPAD(0xe0, PIN_OUTPUT, 0) /* (G29) WKUP_GPIO0_12.MCU_UART0_TXD */
>;
+ bootph-all;
};
sw11_button_pins_default: sw11-button-default-pins {
@@ -370,6 +375,7 @@ J721E_WKUP_IOPAD(0x4c, PIN_INPUT, 0) /* (C23) MCU_OSPI1_D3 */
J721E_WKUP_IOPAD(0x3c, PIN_INPUT, 0) /* (B23) MCU_OSPI1_DQS */
J721E_WKUP_IOPAD(0x38, PIN_INPUT, 0) /* (A23) MCU_OSPI1_LBCLKO */
>;
+ bootph-all;
};
mcu_cpsw_pins_default: mcu-cpsw-default-pins {
@@ -435,12 +441,14 @@ &wkup_uart0 {
status = "reserved";
pinctrl-names = "default";
pinctrl-0 = <&wkup_uart0_pins_default>;
+ bootph-all;
};
&mcu_uart0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&mcu_uart0_pins_default>;
+ bootph-all;
};
&main_uart0 {
@@ -449,6 +457,7 @@ &main_uart0 {
pinctrl-0 = <&main_uart0_pins_default>;
/* Shared with ATF on this platform */
power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
+ bootph-all;
};
&main_uart1 {
@@ -487,6 +496,7 @@ &main_sdhci0 {
/* eMMC */
status = "okay";
non-removable;
+ bootph-all;
ti,driver-strength-ohm = <50>;
disable-wp;
};
@@ -498,12 +508,14 @@ &main_sdhci1 {
vqmmc-supply = <&vdd_sd_dv_alt>;
pinctrl-names = "default";
pinctrl-0 = <&main_mmc1_pins_default>;
+ bootph-all;
ti,driver-strength-ohm = <50>;
disable-wp;
};
&usb_serdes_mux {
idle-states = <1>, <0>; /* USB0 to SERDES3, USB1 to SERDES1 */
+ bootph-all;
};
&serdes_ln_ctrl {
@@ -513,6 +525,7 @@ &serdes_ln_ctrl {
<J721E_SERDES3_LANE0_USB3_0_SWAP>, <J721E_SERDES3_LANE1_USB3_0>,
<J721E_SERDES4_LANE0_EDP_LANE0>, <J721E_SERDES4_LANE1_EDP_LANE1>,
<J721E_SERDES4_LANE2_EDP_LANE2>, <J721E_SERDES4_LANE3_EDP_LANE3>;
+ bootph-all;
};
&serdes_wiz3 {
@@ -533,6 +546,7 @@ serdes3_usb_link: phy@0 {
&usbss0 {
pinctrl-names = "default";
pinctrl-0 = <&main_usbss0_pins_default>;
+ bootph-all;
ti,vbus-divider;
};
@@ -541,6 +555,7 @@ &usb0 {
maximum-speed = "super-speed";
phys = <&serdes3_usb_link>;
phy-names = "cdns3,usb3-phy";
+ bootph-all;
};
&usbss1 {
@@ -613,6 +628,7 @@ partition@800000 {
partition@3fe0000 {
label = "qspi.phypattern";
reg = <0x3fe0000 0x20000>;
+ bootph-all;
};
};
};
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi
index cef47c67493f..0722f6361cc8 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi
@@ -151,6 +151,7 @@ wkup_i2c0_pins_default: wkup-i2c0-default-pins {
J721E_WKUP_IOPAD(0xf8, PIN_INPUT_PULLUP, 0) /* (J25) WKUP_I2C0_SCL */
J721E_WKUP_IOPAD(0xfc, PIN_INPUT_PULLUP, 0) /* (H24) WKUP_I2C0_SDA */
>;
+ bootph-all;
};
pmic_irq_pins_default: pmic-irq-default-pins {
@@ -173,6 +174,7 @@ J721E_WKUP_IOPAD(0x0024, PIN_INPUT, 0) /* MCU_OSPI0_D6 */
J721E_WKUP_IOPAD(0x0028, PIN_INPUT, 0) /* MCU_OSPI0_D7 */
J721E_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0) /* MCU_OSPI0_CSn0 */
>;
+ bootph-all;
};
mcu_fss0_hpb0_pins_default: mcu-fss0-hpb0-default-pins {
@@ -192,6 +194,7 @@ J721E_WKUP_IOPAD(0x20, PIN_INPUT, 1) /* MCU_HYPERBUS0_DQ5 */
J721E_WKUP_IOPAD(0x24, PIN_INPUT, 1) /* MCU_HYPERBUS0_DQ6 */
J721E_WKUP_IOPAD(0x28, PIN_INPUT, 1) /* MCU_HYPERBUS0_DQ7 */
>;
+ bootph-all;
};
};
@@ -422,6 +425,7 @@ partition@800000 {
partition@3fe0000 {
label = "ospi.phypattern";
reg = <0x3fe0000 0x20000>;
+ bootph-all;
};
};
};
@@ -440,6 +444,7 @@ &hbmc {
flash@0,0 {
compatible = "cypress,hyperflash", "cfi-flash";
reg = <0x00 0x00 0x4000000>;
+ bootph-all;
partitions {
compatible = "fixed-partitions";
--
2.46.0
^ permalink raw reply [flat|nested] 21+ messages in thread* Re: [PATCH v5 10/12] arm64: dts: ti: k3-j721e-evm*: Add bootph-* properties
2024-10-23 6:57 ` [PATCH v5 10/12] arm64: dts: ti: k3-j721e-evm*: " Manorit Chawdhry
@ 2024-10-23 11:33 ` Neha Malcom Francis
0 siblings, 0 replies; 21+ messages in thread
From: Neha Malcom Francis @ 2024-10-23 11:33 UTC (permalink / raw)
To: Manorit Chawdhry, Nishanth Menon, Vignesh Raghavendra,
Tero Kristo, Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-kernel, devicetree, linux-kernel, Aniket Limaye,
Udit Kumar, Beleswar Padhi, Siddharth Vadapalli, Andrew Davis
Hi Manorit
On 23/10/24 12:27, Manorit Chawdhry wrote:
> Adds bootph-* properties to the leaf nodes to enable bootloaders to
> utilise them.
>
> Following adds bootph-* to:
> - main_uart0, mcu_uart0(DM), wkup_uart0(TIFS) for Traces
> - mmc0, mmc1, usb0, ospi0, ospi1, hbmc for enabling various bootmodes.
>
> Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
> ---
> arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts | 16 ++++++++++++++++
> arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi | 5 +++++
> 2 files changed, 21 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
> index 8230d53cd696..4c1e02a4e7a2 100644
> --- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
> +++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
> @@ -193,6 +193,7 @@ J721E_IOPAD(0x1c0, PIN_OUTPUT, 1) /* (AA2) SPI0_CS0.UART0_RTSn */
> J721E_IOPAD(0x1e8, PIN_INPUT, 0) /* (AB2) UART0_RXD */
> J721E_IOPAD(0x1ec, PIN_OUTPUT, 0) /* (AB3) UART0_TXD */
> >;
> + bootph-all;
> };
>
> main_uart1_pins_default: main-uart1-default-pins {
> @@ -234,6 +235,7 @@ J721E_IOPAD(0x240, PIN_INPUT, 0) /* (R26) MMC1_DAT3 */
> J721E_IOPAD(0x258, PIN_INPUT, 0) /* (P23) MMC1_SDCD */
> J721E_IOPAD(0x25c, PIN_INPUT, 0) /* (R28) MMC1_SDWP */
> >;
> + bootph-all;
> };
>
> vdd_sd_dv_alt_pins_default: vdd-sd-dv-alt-default-pins {
> @@ -247,6 +249,7 @@ main_usbss0_pins_default: main-usbss0-default-pins {
> J721E_IOPAD(0x290, PIN_OUTPUT, 0) /* (U6) USB0_DRVVBUS */
> J721E_IOPAD(0x210, PIN_INPUT, 7) /* (W3) MCAN1_RX.GPIO1_3 */
> >;
> + bootph-all;
> };
>
> main_usbss1_pins_default: main-usbss1-default-pins {
> @@ -342,6 +345,7 @@ wkup_uart0_pins_default: wkup-uart0-default-pins {
> J721E_WKUP_IOPAD(0xa0, PIN_INPUT, 0) /* (J29) WKUP_UART0_RXD */
> J721E_WKUP_IOPAD(0xa4, PIN_OUTPUT, 0) /* (J28) WKUP_UART0_TXD */
> >;
> + bootph-all;
> };
>
> mcu_uart0_pins_default: mcu-uart0-default-pins {
> @@ -351,6 +355,7 @@ J721E_WKUP_IOPAD(0xec, PIN_OUTPUT, 0) /* (J27) WKUP_GPIO0_15.MCU_UART0_RTSn */
> J721E_WKUP_IOPAD(0xe4, PIN_INPUT, 0) /* (H28) WKUP_GPIO0_13.MCU_UART0_RXD */
> J721E_WKUP_IOPAD(0xe0, PIN_OUTPUT, 0) /* (G29) WKUP_GPIO0_12.MCU_UART0_TXD */
> >;
> + bootph-all;
> };
>
> sw11_button_pins_default: sw11-button-default-pins {
> @@ -370,6 +375,7 @@ J721E_WKUP_IOPAD(0x4c, PIN_INPUT, 0) /* (C23) MCU_OSPI1_D3 */
> J721E_WKUP_IOPAD(0x3c, PIN_INPUT, 0) /* (B23) MCU_OSPI1_DQS */
> J721E_WKUP_IOPAD(0x38, PIN_INPUT, 0) /* (A23) MCU_OSPI1_LBCLKO */
> >;
> + bootph-all;
> };
>
> mcu_cpsw_pins_default: mcu-cpsw-default-pins {
> @@ -435,12 +441,14 @@ &wkup_uart0 {
> status = "reserved";
> pinctrl-names = "default";
> pinctrl-0 = <&wkup_uart0_pins_default>;
> + bootph-all;
> };
>
> &mcu_uart0 {
> status = "okay";
> pinctrl-names = "default";
> pinctrl-0 = <&mcu_uart0_pins_default>;
> + bootph-all;
> };
>
> &main_uart0 {
> @@ -449,6 +457,7 @@ &main_uart0 {
> pinctrl-0 = <&main_uart0_pins_default>;
> /* Shared with ATF on this platform */
> power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
> + bootph-all;
> };
>
> &main_uart1 {
> @@ -487,6 +496,7 @@ &main_sdhci0 {
> /* eMMC */
> status = "okay";
> non-removable;
> + bootph-all;
> ti,driver-strength-ohm = <50>;
> disable-wp;
> };
> @@ -498,12 +508,14 @@ &main_sdhci1 {
> vqmmc-supply = <&vdd_sd_dv_alt>;
> pinctrl-names = "default";
> pinctrl-0 = <&main_mmc1_pins_default>;
> + bootph-all;
> ti,driver-strength-ohm = <50>;
> disable-wp;
> };
>
> &usb_serdes_mux {
> idle-states = <1>, <0>; /* USB0 to SERDES3, USB1 to SERDES1 */
> + bootph-all;
> };
>
> &serdes_ln_ctrl {
> @@ -513,6 +525,7 @@ &serdes_ln_ctrl {
> <J721E_SERDES3_LANE0_USB3_0_SWAP>, <J721E_SERDES3_LANE1_USB3_0>,
> <J721E_SERDES4_LANE0_EDP_LANE0>, <J721E_SERDES4_LANE1_EDP_LANE1>,
> <J721E_SERDES4_LANE2_EDP_LANE2>, <J721E_SERDES4_LANE3_EDP_LANE3>;
> + bootph-all;
> };
>
> &serdes_wiz3 {
> @@ -533,6 +546,7 @@ serdes3_usb_link: phy@0 {
> &usbss0 {
> pinctrl-names = "default";
> pinctrl-0 = <&main_usbss0_pins_default>;
> + bootph-all;
> ti,vbus-divider;
> };
>
> @@ -541,6 +555,7 @@ &usb0 {
> maximum-speed = "super-speed";
> phys = <&serdes3_usb_link>;
> phy-names = "cdns3,usb3-phy";
> + bootph-all;
> };
>
> &usbss1 {
> @@ -613,6 +628,7 @@ partition@800000 {
> partition@3fe0000 {
> label = "qspi.phypattern";
> reg = <0x3fe0000 0x20000>;
> + bootph-all;
> };
> };
> };
> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi
> index cef47c67493f..0722f6361cc8 100644
> --- a/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi
> @@ -151,6 +151,7 @@ wkup_i2c0_pins_default: wkup-i2c0-default-pins {
> J721E_WKUP_IOPAD(0xf8, PIN_INPUT_PULLUP, 0) /* (J25) WKUP_I2C0_SCL */
> J721E_WKUP_IOPAD(0xfc, PIN_INPUT_PULLUP, 0) /* (H24) WKUP_I2C0_SDA */
> >;
> + bootph-all;
> };
>
> pmic_irq_pins_default: pmic-irq-default-pins {
> @@ -173,6 +174,7 @@ J721E_WKUP_IOPAD(0x0024, PIN_INPUT, 0) /* MCU_OSPI0_D6 */
> J721E_WKUP_IOPAD(0x0028, PIN_INPUT, 0) /* MCU_OSPI0_D7 */
> J721E_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0) /* MCU_OSPI0_CSn0 */
> >;
> + bootph-all;
> };
>
> mcu_fss0_hpb0_pins_default: mcu-fss0-hpb0-default-pins {
> @@ -192,6 +194,7 @@ J721E_WKUP_IOPAD(0x20, PIN_INPUT, 1) /* MCU_HYPERBUS0_DQ5 */
> J721E_WKUP_IOPAD(0x24, PIN_INPUT, 1) /* MCU_HYPERBUS0_DQ6 */
> J721E_WKUP_IOPAD(0x28, PIN_INPUT, 1) /* MCU_HYPERBUS0_DQ7 */
> >;
> + bootph-all;
> };
> };
>
> @@ -422,6 +425,7 @@ partition@800000 {
> partition@3fe0000 {
> label = "ospi.phypattern";
> reg = <0x3fe0000 0x20000>;
> + bootph-all;
> };
> };
> };
> @@ -440,6 +444,7 @@ &hbmc {
> flash@0,0 {
> compatible = "cypress,hyperflash", "cfi-flash";
> reg = <0x00 0x00 0x4000000>;
> + bootph-all;
>
> partitions {
> compatible = "fixed-partitions";
>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
--
Thanking You
Neha Malcom Francis
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v5 11/12] arm64: dts: ti: k3-j721e-sk*: Add bootph-* properties
2024-10-23 6:57 [PATCH v5 00/12] Add bootph-all property for J7 boards Manorit Chawdhry
` (9 preceding siblings ...)
2024-10-23 6:57 ` [PATCH v5 10/12] arm64: dts: ti: k3-j721e-evm*: " Manorit Chawdhry
@ 2024-10-23 6:57 ` Manorit Chawdhry
2024-10-23 11:34 ` Neha Malcom Francis
2024-10-23 6:57 ` [PATCH v5 12/12] arm64: dts: ti: k3-j7200-evm*: " Manorit Chawdhry
11 siblings, 1 reply; 21+ messages in thread
From: Manorit Chawdhry @ 2024-10-23 6:57 UTC (permalink / raw)
To: Nishanth Menon, Vignesh Raghavendra, Tero Kristo, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-kernel, devicetree, linux-kernel, Neha Malcom Francis,
Aniket Limaye, Udit Kumar, Beleswar Padhi, Siddharth Vadapalli,
Andrew Davis, Manorit Chawdhry
Adds bootph-* properties to the leaf nodes to enable bootloaders to
utilise them.
Following adds bootph-* to:
- main_uart0, mcu_uart0(DM), wkup_uart0(TIFS) for Traces
- mmc1, usb0, usb1, ospi0 for enabling various bootmodes.
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
---
arch/arm64/boot/dts/ti/k3-j721e-sk.dts | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
index 6285e8d94dde..69b3d1ed8a21 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
@@ -346,6 +346,7 @@ J721E_IOPAD(0x244, PIN_INPUT, 0) /* (R25) MMC1_DAT2 */
J721E_IOPAD(0x240, PIN_INPUT, 0) /* (R26) MMC1_DAT3 */
J721E_IOPAD(0x258, PIN_INPUT, 0) /* (P23) MMC1_SDCD */
>;
+ bootph-all;
};
main_uart0_pins_default: main-uart0-default-pins {
@@ -355,6 +356,7 @@ J721E_IOPAD(0x1f4, PIN_OUTPUT, 0) /* (AB1) UART0_RTSn */
J721E_IOPAD(0x1e8, PIN_INPUT, 0) /* (AB2) UART0_RXD */
J721E_IOPAD(0x1ec, PIN_OUTPUT, 0) /* (AB3) UART0_TXD */
>;
+ bootph-all;
};
main_uart1_pins_default: main-uart1-default-pins {
@@ -390,12 +392,14 @@ main_usbss0_pins_default: main-usbss0-default-pins {
J721E_IOPAD(0x290, PIN_OUTPUT, 0) /* (U6) USB0_DRVVBUS */
J721E_IOPAD(0x210, PIN_INPUT, 7) /* (W3) MCAN1_RX.GPIO1_3 */
>;
+ bootph-all;
};
main_usbss1_pins_default: main-usbss1-default-pins {
pinctrl-single,pins = <
J721E_IOPAD(0x214, PIN_OUTPUT, 4) /* (V4) MCAN1_TX.USB1_DRVVBUS */
>;
+ bootph-all;
};
main_csi_mux_sel_pins_default: main-csi-mux-sel-default-pins {
@@ -594,6 +598,7 @@ J721E_WKUP_IOPAD(0x24, PIN_INPUT, 0) /* (B22) MCU_OSPI0_D6 */
J721E_WKUP_IOPAD(0x28, PIN_INPUT, 0) /* (G21) MCU_OSPI0_D7 */
J721E_WKUP_IOPAD(0x8, PIN_INPUT, 0) /* (D21) MCU_OSPI0_DQS */
>;
+ bootph-all;
};
vdd_mmc1_en_pins_default: vdd-mmc1-en-default-pins {
@@ -622,6 +627,7 @@ J721E_WKUP_IOPAD(0xf4, PIN_OUTPUT, 2)/* (D25) MCU_I3C0_SDA.MCU_UART0_RTSn */
J721E_WKUP_IOPAD(0xe4, PIN_INPUT, 0) /* (H28) WKUP_GPIO0_13.MCU_UART0_RXD */
J721E_WKUP_IOPAD(0xe0, PIN_OUTPUT, 0)/* (G29) WKUP_GPIO0_12.MCU_UART0_TXD */
>;
+ bootph-all;
};
wkup_i2c0_pins_default: wkup-i2c0-default-pins {
@@ -629,6 +635,7 @@ wkup_i2c0_pins_default: wkup-i2c0-default-pins {
J721E_WKUP_IOPAD(0xf8, PIN_INPUT_PULLUP, 0) /* (J25) WKUP_I2C0_SCL */
J721E_WKUP_IOPAD(0xfc, PIN_INPUT_PULLUP, 0) /* (H24) WKUP_I2C0_SDA */
>;
+ bootph-all;
};
mcu_mcan0_pins_default: mcu-mcan0-default-pins {
@@ -657,6 +664,7 @@ &wkup_uart0 {
status = "reserved";
pinctrl-names = "default";
pinctrl-0 = <&wkup_uart0_pins_default>;
+ bootph-all;
};
&wkup_i2c0 {
@@ -821,6 +829,7 @@ &mcu_uart0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&mcu_uart0_pins_default>;
+ bootph-all;
};
&main_uart0 {
@@ -829,6 +838,7 @@ &main_uart0 {
pinctrl-0 = <&main_uart0_pins_default>;
/* Shared with ATF on this platform */
power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
+ bootph-all;
};
&main_uart1 {
@@ -844,6 +854,7 @@ &main_sdhci1 {
vqmmc-supply = <&vdd_sd_dv_alt>;
pinctrl-names = "default";
pinctrl-0 = <&main_mmc1_pins_default>;
+ bootph-all;
ti,driver-strength-ohm = <50>;
disable-wp;
};
@@ -908,6 +919,7 @@ partition@800000 {
partition@3fc0000 {
label = "ospi.phypattern";
reg = <0x3fc0000 0x40000>;
+ bootph-all;
};
};
};
@@ -1003,6 +1015,7 @@ &wkup_gpio0 {
&usb_serdes_mux {
idle-states = <1>, <1>; /* USB0 to SERDES3, USB1 to SERDES2 */
+ bootph-all;
};
&serdes_ln_ctrl {
@@ -1012,6 +1025,7 @@ &serdes_ln_ctrl {
<J721E_SERDES3_LANE0_USB3_0_SWAP>, <J721E_SERDES3_LANE1_USB3_0>,
<J721E_SERDES4_LANE0_EDP_LANE0>, <J721E_SERDES4_LANE1_EDP_LANE1>,
<J721E_SERDES4_LANE2_EDP_LANE2>, <J721E_SERDES4_LANE3_EDP_LANE3>;
+ bootph-all;
};
&serdes_wiz3 {
@@ -1050,6 +1064,7 @@ &mhdp {
&usbss0 {
pinctrl-names = "default";
pinctrl-0 = <&main_usbss0_pins_default>;
+ bootph-all;
ti,vbus-divider;
};
@@ -1058,6 +1073,7 @@ &usb0 {
maximum-speed = "super-speed";
phys = <&serdes3_usb_link>;
phy-names = "cdns3,usb3-phy";
+ bootph-all;
};
&serdes2 {
@@ -1073,6 +1089,7 @@ serdes2_usb_link: phy@1 {
&usbss1 {
pinctrl-names = "default";
pinctrl-0 = <&main_usbss1_pins_default>;
+ bootph-all;
ti,vbus-divider;
};
@@ -1081,6 +1098,7 @@ &usb1 {
maximum-speed = "super-speed";
phys = <&serdes2_usb_link>;
phy-names = "cdns3,usb3-phy";
+ bootph-all;
};
&mcu_cpsw {
--
2.46.0
^ permalink raw reply [flat|nested] 21+ messages in thread* Re: [PATCH v5 11/12] arm64: dts: ti: k3-j721e-sk*: Add bootph-* properties
2024-10-23 6:57 ` [PATCH v5 11/12] arm64: dts: ti: k3-j721e-sk*: " Manorit Chawdhry
@ 2024-10-23 11:34 ` Neha Malcom Francis
0 siblings, 0 replies; 21+ messages in thread
From: Neha Malcom Francis @ 2024-10-23 11:34 UTC (permalink / raw)
To: Manorit Chawdhry, Nishanth Menon, Vignesh Raghavendra,
Tero Kristo, Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-kernel, devicetree, linux-kernel, Aniket Limaye,
Udit Kumar, Beleswar Padhi, Siddharth Vadapalli, Andrew Davis
On 23/10/24 12:27, Manorit Chawdhry wrote:
> Adds bootph-* properties to the leaf nodes to enable bootloaders to
> utilise them.
>
> Following adds bootph-* to:
> - main_uart0, mcu_uart0(DM), wkup_uart0(TIFS) for Traces
> - mmc1, usb0, usb1, ospi0 for enabling various bootmodes.
>
> Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
> ---
> arch/arm64/boot/dts/ti/k3-j721e-sk.dts | 18 ++++++++++++++++++
> 1 file changed, 18 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
> index 6285e8d94dde..69b3d1ed8a21 100644
> --- a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
> +++ b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
> @@ -346,6 +346,7 @@ J721E_IOPAD(0x244, PIN_INPUT, 0) /* (R25) MMC1_DAT2 */
> J721E_IOPAD(0x240, PIN_INPUT, 0) /* (R26) MMC1_DAT3 */
> J721E_IOPAD(0x258, PIN_INPUT, 0) /* (P23) MMC1_SDCD */
> >;
> + bootph-all;
> };
>
> main_uart0_pins_default: main-uart0-default-pins {
> @@ -355,6 +356,7 @@ J721E_IOPAD(0x1f4, PIN_OUTPUT, 0) /* (AB1) UART0_RTSn */
> J721E_IOPAD(0x1e8, PIN_INPUT, 0) /* (AB2) UART0_RXD */
> J721E_IOPAD(0x1ec, PIN_OUTPUT, 0) /* (AB3) UART0_TXD */
> >;
> + bootph-all;
> };
>
> main_uart1_pins_default: main-uart1-default-pins {
> @@ -390,12 +392,14 @@ main_usbss0_pins_default: main-usbss0-default-pins {
> J721E_IOPAD(0x290, PIN_OUTPUT, 0) /* (U6) USB0_DRVVBUS */
> J721E_IOPAD(0x210, PIN_INPUT, 7) /* (W3) MCAN1_RX.GPIO1_3 */
> >;
> + bootph-all;
> };
>
> main_usbss1_pins_default: main-usbss1-default-pins {
> pinctrl-single,pins = <
> J721E_IOPAD(0x214, PIN_OUTPUT, 4) /* (V4) MCAN1_TX.USB1_DRVVBUS */
> >;
> + bootph-all;
> };
>
> main_csi_mux_sel_pins_default: main-csi-mux-sel-default-pins {
> @@ -594,6 +598,7 @@ J721E_WKUP_IOPAD(0x24, PIN_INPUT, 0) /* (B22) MCU_OSPI0_D6 */
> J721E_WKUP_IOPAD(0x28, PIN_INPUT, 0) /* (G21) MCU_OSPI0_D7 */
> J721E_WKUP_IOPAD(0x8, PIN_INPUT, 0) /* (D21) MCU_OSPI0_DQS */
> >;
> + bootph-all;
> };
>
> vdd_mmc1_en_pins_default: vdd-mmc1-en-default-pins {
> @@ -622,6 +627,7 @@ J721E_WKUP_IOPAD(0xf4, PIN_OUTPUT, 2)/* (D25) MCU_I3C0_SDA.MCU_UART0_RTSn */
> J721E_WKUP_IOPAD(0xe4, PIN_INPUT, 0) /* (H28) WKUP_GPIO0_13.MCU_UART0_RXD */
> J721E_WKUP_IOPAD(0xe0, PIN_OUTPUT, 0)/* (G29) WKUP_GPIO0_12.MCU_UART0_TXD */
> >;
> + bootph-all;
> };
>
> wkup_i2c0_pins_default: wkup-i2c0-default-pins {
> @@ -629,6 +635,7 @@ wkup_i2c0_pins_default: wkup-i2c0-default-pins {
> J721E_WKUP_IOPAD(0xf8, PIN_INPUT_PULLUP, 0) /* (J25) WKUP_I2C0_SCL */
> J721E_WKUP_IOPAD(0xfc, PIN_INPUT_PULLUP, 0) /* (H24) WKUP_I2C0_SDA */
> >;
> + bootph-all;
> };
>
> mcu_mcan0_pins_default: mcu-mcan0-default-pins {
> @@ -657,6 +664,7 @@ &wkup_uart0 {
> status = "reserved";
> pinctrl-names = "default";
> pinctrl-0 = <&wkup_uart0_pins_default>;
> + bootph-all;
> };
>
> &wkup_i2c0 {
> @@ -821,6 +829,7 @@ &mcu_uart0 {
> status = "okay";
> pinctrl-names = "default";
> pinctrl-0 = <&mcu_uart0_pins_default>;
> + bootph-all;
> };
>
> &main_uart0 {
> @@ -829,6 +838,7 @@ &main_uart0 {
> pinctrl-0 = <&main_uart0_pins_default>;
> /* Shared with ATF on this platform */
> power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
> + bootph-all;
> };
>
> &main_uart1 {
> @@ -844,6 +854,7 @@ &main_sdhci1 {
> vqmmc-supply = <&vdd_sd_dv_alt>;
> pinctrl-names = "default";
> pinctrl-0 = <&main_mmc1_pins_default>;
> + bootph-all;
> ti,driver-strength-ohm = <50>;
> disable-wp;
> };
> @@ -908,6 +919,7 @@ partition@800000 {
> partition@3fc0000 {
> label = "ospi.phypattern";
> reg = <0x3fc0000 0x40000>;
> + bootph-all;
> };
> };
> };
> @@ -1003,6 +1015,7 @@ &wkup_gpio0 {
>
> &usb_serdes_mux {
> idle-states = <1>, <1>; /* USB0 to SERDES3, USB1 to SERDES2 */
> + bootph-all;
> };
>
> &serdes_ln_ctrl {
> @@ -1012,6 +1025,7 @@ &serdes_ln_ctrl {
> <J721E_SERDES3_LANE0_USB3_0_SWAP>, <J721E_SERDES3_LANE1_USB3_0>,
> <J721E_SERDES4_LANE0_EDP_LANE0>, <J721E_SERDES4_LANE1_EDP_LANE1>,
> <J721E_SERDES4_LANE2_EDP_LANE2>, <J721E_SERDES4_LANE3_EDP_LANE3>;
> + bootph-all;
> };
>
> &serdes_wiz3 {
> @@ -1050,6 +1064,7 @@ &mhdp {
> &usbss0 {
> pinctrl-names = "default";
> pinctrl-0 = <&main_usbss0_pins_default>;
> + bootph-all;
> ti,vbus-divider;
> };
>
> @@ -1058,6 +1073,7 @@ &usb0 {
> maximum-speed = "super-speed";
> phys = <&serdes3_usb_link>;
> phy-names = "cdns3,usb3-phy";
> + bootph-all;
> };
>
> &serdes2 {
> @@ -1073,6 +1089,7 @@ serdes2_usb_link: phy@1 {
> &usbss1 {
> pinctrl-names = "default";
> pinctrl-0 = <&main_usbss1_pins_default>;
> + bootph-all;
> ti,vbus-divider;
> };
>
> @@ -1081,6 +1098,7 @@ &usb1 {
> maximum-speed = "super-speed";
> phys = <&serdes2_usb_link>;
> phy-names = "cdns3,usb3-phy";
> + bootph-all;
> };
>
> &mcu_cpsw {
>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
--
Thanking You
Neha Malcom Francis
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v5 12/12] arm64: dts: ti: k3-j7200-evm*: Add bootph-* properties
2024-10-23 6:57 [PATCH v5 00/12] Add bootph-all property for J7 boards Manorit Chawdhry
` (10 preceding siblings ...)
2024-10-23 6:57 ` [PATCH v5 11/12] arm64: dts: ti: k3-j721e-sk*: " Manorit Chawdhry
@ 2024-10-23 6:57 ` Manorit Chawdhry
2024-10-23 15:05 ` Aniket Limaye
11 siblings, 1 reply; 21+ messages in thread
From: Manorit Chawdhry @ 2024-10-23 6:57 UTC (permalink / raw)
To: Nishanth Menon, Vignesh Raghavendra, Tero Kristo, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-kernel, devicetree, linux-kernel, Neha Malcom Francis,
Aniket Limaye, Udit Kumar, Beleswar Padhi, Siddharth Vadapalli,
Andrew Davis, Manorit Chawdhry
Adds bootph-* properties to the leaf nodes to enable bootloaders to
utilise them.
Following adds bootph-* to:
- pmic regulator for enabling AVS Support
- main_uart0, mcu_uart0(DM), wkup_uart0(TIFS) for Traces
- mmc0, mmc1, usb0, ospi0, ospi1, hbmc for enabling various bootmodes.
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
---
arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts | 13 +++++++++++++
arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi | 6 ++++++
2 files changed, 19 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
index 6593c5da82c0..d03690b8d652 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
@@ -129,6 +129,7 @@ J721E_WKUP_IOPAD(0x94, PIN_OUTPUT, 0) /* (E21) MCU_UART0_RTSn */
J721E_WKUP_IOPAD(0x8c, PIN_INPUT, 0) /* (D20) MCU_UART0_RXD */
J721E_WKUP_IOPAD(0x88, PIN_OUTPUT, 0) /* (D19) MCU_UART0_TXD */
>;
+ bootph-all;
};
wkup_uart0_pins_default: wkup-uart0-default-pins {
@@ -136,6 +137,7 @@ wkup_uart0_pins_default: wkup-uart0-default-pins {
J721E_WKUP_IOPAD(0x48, PIN_INPUT, 0) /* (B14) WKUP_UART0_RXD */
J721E_WKUP_IOPAD(0x4c, PIN_OUTPUT, 0) /* (A14) WKUP_UART0_TXD */
>;
+ bootph-all;
};
mcu_cpsw_pins_default: mcu-cpsw-default-pins {
@@ -204,6 +206,7 @@ J721E_IOPAD(0xb4, PIN_OUTPUT, 0) /* (T17) UART0_TXD */
J721E_IOPAD(0xc0, PIN_INPUT, 2) /* (W3) SPI0_CS0.UART0_CTSn */
J721E_IOPAD(0xc4, PIN_OUTPUT, 2) /* (U5) SPI0_CS1.UART0_RTSn */
>;
+ bootph-all;
};
main_uart1_pins_default: main-uart1-default-pins {
@@ -238,6 +241,7 @@ J721E_IOPAD(0xf0, PIN_INPUT, 0) /* (N20) MMC1_DAT2 */
J721E_IOPAD(0xec, PIN_INPUT, 0) /* (N19) MMC1_DAT3 */
J721E_IOPAD(0xe4, PIN_INPUT, 8) /* (V1) TIMER_IO0.MMC1_SDCD */
>;
+ bootph-all;
};
vdd_sd_dv_pins_default: vdd-sd-dv-default-pins {
@@ -259,6 +263,7 @@ main_usbss0_pins_default: main-usbss0-default-pins {
pinctrl-single,pins = <
J721E_IOPAD(0x04, PIN_OUTPUT, 0) /* (T4) USB0_DRVVBUS */
>;
+ bootph-all;
};
};
@@ -267,12 +272,14 @@ &wkup_uart0 {
status = "reserved";
pinctrl-names = "default";
pinctrl-0 = <&wkup_uart0_pins_default>;
+ bootph-all;
};
&mcu_uart0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&mcu_uart0_pins_default>;
+ bootph-all;
};
&main_uart0 {
@@ -281,6 +288,7 @@ &main_uart0 {
power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
pinctrl-names = "default";
pinctrl-0 = <&main_uart0_pins_default>;
+ bootph-all;
};
&main_uart1 {
@@ -379,6 +387,7 @@ &main_sdhci0 {
/* eMMC */
status = "okay";
non-removable;
+ bootph-all;
ti,driver-strength-ohm = <50>;
disable-wp;
};
@@ -390,6 +399,7 @@ &main_sdhci1 {
pinctrl-names = "default";
vmmc-supply = <&vdd_mmc1>;
vqmmc-supply = <&vdd_sd_dv>;
+ bootph-all;
ti,driver-strength-ohm = <50>;
disable-wp;
};
@@ -401,11 +411,13 @@ &serdes_ln_ctrl {
&usb_serdes_mux {
idle-states = <1>; /* USB0 to SERDES lane 3 */
+ bootph-all;
};
&usbss0 {
pinctrl-names = "default";
pinctrl-0 = <&main_usbss0_pins_default>;
+ bootph-all;
ti,vbus-divider;
ti,usb2-only;
};
@@ -413,6 +425,7 @@ &usbss0 {
&usb0 {
dr_mode = "otg";
maximum-speed = "high-speed";
+ bootph-all;
};
&tscadc0 {
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi
index e78b4622a7d1..291ab9bb414d 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi
@@ -121,6 +121,7 @@ J721E_WKUP_IOPAD(0x20, PIN_INPUT, 1) /* (B8) MCU_OSPI0_D5.MCU_HYPERBUS0_DQ5 */
J721E_WKUP_IOPAD(0x24, PIN_INPUT, 1) /* (A8) MCU_OSPI0_D6.MCU_HYPERBUS0_DQ6 */
J721E_WKUP_IOPAD(0x28, PIN_INPUT, 1) /* (A7) MCU_OSPI0_D7.MCU_HYPERBUS0_DQ7 */
>;
+ bootph-all;
};
mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-default-pins {
@@ -137,6 +138,7 @@ J721E_WKUP_IOPAD(0x0024, PIN_INPUT, 0) /* MCU_OSPI0_D6 */
J721E_WKUP_IOPAD(0x0028, PIN_INPUT, 0) /* MCU_OSPI0_D7 */
J721E_WKUP_IOPAD(0x0008, PIN_INPUT, 0) /* MCU_OSPI0_DQS */
>;
+ bootph-all;
};
};
@@ -146,6 +148,7 @@ wkup_i2c0_pins_default: wkup-i2c0-default-pins {
J721E_WKUP_IOPAD(0x98, PIN_INPUT_PULLUP, 0) /* (F20) WKUP_I2C0_SCL */
J721E_WKUP_IOPAD(0x9c, PIN_INPUT_PULLUP, 0) /* (H21) WKUP_I2C0_SDA */
>;
+ bootph-all;
};
};
@@ -186,6 +189,7 @@ &hbmc {
flash@0,0 {
compatible = "cypress,hyperflash", "cfi-flash";
reg = <0x00 0x00 0x4000000>;
+ bootph-all;
partitions {
compatible = "fixed-partitions";
@@ -347,6 +351,7 @@ bucka1: buck1 {
regulator-max-microvolt = <1800000>;
regulator-boot-on;
regulator-always-on;
+ bootph-all;
};
bucka2: buck2 {
@@ -520,6 +525,7 @@ partition@800000 {
partition@3fc0000 {
label = "ospi.phypattern";
reg = <0x3fc0000 0x40000>;
+ bootph-all;
};
};
};
--
2.46.0
^ permalink raw reply [flat|nested] 21+ messages in thread* Re: [PATCH v5 12/12] arm64: dts: ti: k3-j7200-evm*: Add bootph-* properties
2024-10-23 6:57 ` [PATCH v5 12/12] arm64: dts: ti: k3-j7200-evm*: " Manorit Chawdhry
@ 2024-10-23 15:05 ` Aniket Limaye
2024-10-23 16:22 ` Aniket Limaye
0 siblings, 1 reply; 21+ messages in thread
From: Aniket Limaye @ 2024-10-23 15:05 UTC (permalink / raw)
To: Manorit Chawdhry, Nishanth Menon, Vignesh Raghavendra,
Tero Kristo, Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-kernel, devicetree, linux-kernel, Neha Malcom Francis,
Udit Kumar, Beleswar Padhi, Siddharth Vadapalli, Andrew Davis
On 23/10/24 12:27, Manorit Chawdhry wrote:
> Adds bootph-* properties to the leaf nodes to enable bootloaders to
> utilise them.
>
> Following adds bootph-* to:
> - pmic regulator for enabling AVS Support
> - main_uart0, mcu_uart0(DM), wkup_uart0(TIFS) for Traces
> - mmc0, mmc1, usb0, ospi0, ospi1, hbmc for enabling various bootmodes.
>
> Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Reviewed-by: Aniket Limaye <a-limaye@ti.com>
> ---
> arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts | 13 +++++++++++++
> arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi | 6 ++++++
> 2 files changed, 19 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
> index 6593c5da82c0..d03690b8d652 100644
> --- a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
> +++ b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
> @@ -129,6 +129,7 @@ J721E_WKUP_IOPAD(0x94, PIN_OUTPUT, 0) /* (E21) MCU_UART0_RTSn */
> J721E_WKUP_IOPAD(0x8c, PIN_INPUT, 0) /* (D20) MCU_UART0_RXD */
> J721E_WKUP_IOPAD(0x88, PIN_OUTPUT, 0) /* (D19) MCU_UART0_TXD */
> >;
> + bootph-all;
> };
>
> wkup_uart0_pins_default: wkup-uart0-default-pins {
> @@ -136,6 +137,7 @@ wkup_uart0_pins_default: wkup-uart0-default-pins {
> J721E_WKUP_IOPAD(0x48, PIN_INPUT, 0) /* (B14) WKUP_UART0_RXD */
> J721E_WKUP_IOPAD(0x4c, PIN_OUTPUT, 0) /* (A14) WKUP_UART0_TXD */
> >;
> + bootph-all;
> };
>
> mcu_cpsw_pins_default: mcu-cpsw-default-pins {
> @@ -204,6 +206,7 @@ J721E_IOPAD(0xb4, PIN_OUTPUT, 0) /* (T17) UART0_TXD */
> J721E_IOPAD(0xc0, PIN_INPUT, 2) /* (W3) SPI0_CS0.UART0_CTSn */
> J721E_IOPAD(0xc4, PIN_OUTPUT, 2) /* (U5) SPI0_CS1.UART0_RTSn */
> >;
> + bootph-all;
> };
>
> main_uart1_pins_default: main-uart1-default-pins {
> @@ -238,6 +241,7 @@ J721E_IOPAD(0xf0, PIN_INPUT, 0) /* (N20) MMC1_DAT2 */
> J721E_IOPAD(0xec, PIN_INPUT, 0) /* (N19) MMC1_DAT3 */
> J721E_IOPAD(0xe4, PIN_INPUT, 8) /* (V1) TIMER_IO0.MMC1_SDCD */
> >;
> + bootph-all;
> };
>
> vdd_sd_dv_pins_default: vdd-sd-dv-default-pins {
> @@ -259,6 +263,7 @@ main_usbss0_pins_default: main-usbss0-default-pins {
> pinctrl-single,pins = <
> J721E_IOPAD(0x04, PIN_OUTPUT, 0) /* (T4) USB0_DRVVBUS */
> >;
> + bootph-all;
> };
> };
>
> @@ -267,12 +272,14 @@ &wkup_uart0 {
> status = "reserved";
> pinctrl-names = "default";
> pinctrl-0 = <&wkup_uart0_pins_default>;
> + bootph-all;
> };
>
> &mcu_uart0 {
> status = "okay";
> pinctrl-names = "default";
> pinctrl-0 = <&mcu_uart0_pins_default>;
> + bootph-all;
> };
>
> &main_uart0 {
> @@ -281,6 +288,7 @@ &main_uart0 {
> power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
> pinctrl-names = "default";
> pinctrl-0 = <&main_uart0_pins_default>;
> + bootph-all;
> };
>
> &main_uart1 {
> @@ -379,6 +387,7 @@ &main_sdhci0 {
> /* eMMC */
> status = "okay";
> non-removable;
> + bootph-all;
> ti,driver-strength-ohm = <50>;
> disable-wp;
> };
> @@ -390,6 +399,7 @@ &main_sdhci1 {
> pinctrl-names = "default";
> vmmc-supply = <&vdd_mmc1>;
> vqmmc-supply = <&vdd_sd_dv>;
> + bootph-all;
> ti,driver-strength-ohm = <50>;
> disable-wp;
> };
> @@ -401,11 +411,13 @@ &serdes_ln_ctrl {
>
> &usb_serdes_mux {
> idle-states = <1>; /* USB0 to SERDES lane 3 */
> + bootph-all;
> };
>
> &usbss0 {
> pinctrl-names = "default";
> pinctrl-0 = <&main_usbss0_pins_default>;
> + bootph-all;
> ti,vbus-divider;
> ti,usb2-only;
> };
> @@ -413,6 +425,7 @@ &usbss0 {
> &usb0 {
> dr_mode = "otg";
> maximum-speed = "high-speed";
> + bootph-all;
> };
>
> &tscadc0 {
> diff --git a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi
> index e78b4622a7d1..291ab9bb414d 100644
> --- a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi
> @@ -121,6 +121,7 @@ J721E_WKUP_IOPAD(0x20, PIN_INPUT, 1) /* (B8) MCU_OSPI0_D5.MCU_HYPERBUS0_DQ5 */
> J721E_WKUP_IOPAD(0x24, PIN_INPUT, 1) /* (A8) MCU_OSPI0_D6.MCU_HYPERBUS0_DQ6 */
> J721E_WKUP_IOPAD(0x28, PIN_INPUT, 1) /* (A7) MCU_OSPI0_D7.MCU_HYPERBUS0_DQ7 */
> >;
> + bootph-all;
> };
>
> mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-default-pins {
> @@ -137,6 +138,7 @@ J721E_WKUP_IOPAD(0x0024, PIN_INPUT, 0) /* MCU_OSPI0_D6 */
> J721E_WKUP_IOPAD(0x0028, PIN_INPUT, 0) /* MCU_OSPI0_D7 */
> J721E_WKUP_IOPAD(0x0008, PIN_INPUT, 0) /* MCU_OSPI0_DQS */
> >;
> + bootph-all;
> };
> };
>
> @@ -146,6 +148,7 @@ wkup_i2c0_pins_default: wkup-i2c0-default-pins {
> J721E_WKUP_IOPAD(0x98, PIN_INPUT_PULLUP, 0) /* (F20) WKUP_I2C0_SCL */
> J721E_WKUP_IOPAD(0x9c, PIN_INPUT_PULLUP, 0) /* (H21) WKUP_I2C0_SDA */
> >;
> + bootph-all;
> };
> };
>
> @@ -186,6 +189,7 @@ &hbmc {
> flash@0,0 {
> compatible = "cypress,hyperflash", "cfi-flash";
> reg = <0x00 0x00 0x4000000>;
> + bootph-all;
>
> partitions {
> compatible = "fixed-partitions";
> @@ -347,6 +351,7 @@ bucka1: buck1 {
> regulator-max-microvolt = <1800000>;
> regulator-boot-on;
> regulator-always-on;
> + bootph-all;
> };
>
> bucka2: buck2 {
> @@ -520,6 +525,7 @@ partition@800000 {
> partition@3fc0000 {
> label = "ospi.phypattern";
> reg = <0x3fc0000 0x40000>;
> + bootph-all;
> };
> };
> };
>
^ permalink raw reply [flat|nested] 21+ messages in thread* Re: [PATCH v5 12/12] arm64: dts: ti: k3-j7200-evm*: Add bootph-* properties
2024-10-23 15:05 ` Aniket Limaye
@ 2024-10-23 16:22 ` Aniket Limaye
0 siblings, 0 replies; 21+ messages in thread
From: Aniket Limaye @ 2024-10-23 16:22 UTC (permalink / raw)
To: Manorit Chawdhry, Nishanth Menon, Vignesh Raghavendra,
Tero Kristo, Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-kernel, devicetree, linux-kernel, Neha Malcom Francis,
Udit Kumar, Beleswar Padhi, Siddharth Vadapalli, Andrew Davis
On 23/10/24 20:35, Aniket Limaye wrote:
>
>
> On 23/10/24 12:27, Manorit Chawdhry wrote:
>> Adds bootph-* properties to the leaf nodes to enable bootloaders to
>> utilise them.
>>
>> Following adds bootph-* to:
>> - pmic regulator for enabling AVS Support
>> - main_uart0, mcu_uart0(DM), wkup_uart0(TIFS) for Traces
>> - mmc0, mmc1, usb0, ospi0, ospi1, hbmc for enabling various bootmodes.
>>
>> Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Just realized:
Needs update to commit msg: No ospi1 for j7200
You can keep R-by with above change^
Thanks,
Aniket
>
> Reviewed-by: Aniket Limaye <a-limaye@ti.com>
>
>> ---
>> arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts | 13
>> +++++++++++++
>> arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi | 6 ++++++
>> 2 files changed, 19 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
>> b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
>> index 6593c5da82c0..d03690b8d652 100644
>> --- a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
>> +++ b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
>> @@ -129,6 +129,7 @@ J721E_WKUP_IOPAD(0x94, PIN_OUTPUT, 0) /* (E21)
>> MCU_UART0_RTSn */
>> J721E_WKUP_IOPAD(0x8c, PIN_INPUT, 0) /* (D20)
>> MCU_UART0_RXD */
>> J721E_WKUP_IOPAD(0x88, PIN_OUTPUT, 0) /* (D19)
>> MCU_UART0_TXD */
>> >;
>> + bootph-all;
>> };
>> wkup_uart0_pins_default: wkup-uart0-default-pins {
>> @@ -136,6 +137,7 @@ wkup_uart0_pins_default: wkup-uart0-default-pins {
>> J721E_WKUP_IOPAD(0x48, PIN_INPUT, 0) /* (B14)
>> WKUP_UART0_RXD */
>> J721E_WKUP_IOPAD(0x4c, PIN_OUTPUT, 0) /* (A14)
>> WKUP_UART0_TXD */
>> >;
>> + bootph-all;
>> };
>> mcu_cpsw_pins_default: mcu-cpsw-default-pins {
>> @@ -204,6 +206,7 @@ J721E_IOPAD(0xb4, PIN_OUTPUT, 0) /* (T17)
>> UART0_TXD */
>> J721E_IOPAD(0xc0, PIN_INPUT, 2) /* (W3)
>> SPI0_CS0.UART0_CTSn */
>> J721E_IOPAD(0xc4, PIN_OUTPUT, 2) /* (U5)
>> SPI0_CS1.UART0_RTSn */
>> >;
>> + bootph-all;
>> };
>> main_uart1_pins_default: main-uart1-default-pins {
>> @@ -238,6 +241,7 @@ J721E_IOPAD(0xf0, PIN_INPUT, 0) /* (N20) MMC1_DAT2 */
>> J721E_IOPAD(0xec, PIN_INPUT, 0) /* (N19) MMC1_DAT3 */
>> J721E_IOPAD(0xe4, PIN_INPUT, 8) /* (V1)
>> TIMER_IO0.MMC1_SDCD */
>> >;
>> + bootph-all;
>> };
>> vdd_sd_dv_pins_default: vdd-sd-dv-default-pins {
>> @@ -259,6 +263,7 @@ main_usbss0_pins_default: main-usbss0-default-pins {
>> pinctrl-single,pins = <
>> J721E_IOPAD(0x04, PIN_OUTPUT, 0) /* (T4) USB0_DRVVBUS */
>> >;
>> + bootph-all;
>> };
>> };
>> @@ -267,12 +272,14 @@ &wkup_uart0 {
>> status = "reserved";
>> pinctrl-names = "default";
>> pinctrl-0 = <&wkup_uart0_pins_default>;
>> + bootph-all;
>> };
>> &mcu_uart0 {
>> status = "okay";
>> pinctrl-names = "default";
>> pinctrl-0 = <&mcu_uart0_pins_default>;
>> + bootph-all;
>> };
>> &main_uart0 {
>> @@ -281,6 +288,7 @@ &main_uart0 {
>> power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
>> pinctrl-names = "default";
>> pinctrl-0 = <&main_uart0_pins_default>;
>> + bootph-all;
>> };
>> &main_uart1 {
>> @@ -379,6 +387,7 @@ &main_sdhci0 {
>> /* eMMC */
>> status = "okay";
>> non-removable;
>> + bootph-all;
>> ti,driver-strength-ohm = <50>;
>> disable-wp;
>> };
>> @@ -390,6 +399,7 @@ &main_sdhci1 {
>> pinctrl-names = "default";
>> vmmc-supply = <&vdd_mmc1>;
>> vqmmc-supply = <&vdd_sd_dv>;
>> + bootph-all;
>> ti,driver-strength-ohm = <50>;
>> disable-wp;
>> };
>> @@ -401,11 +411,13 @@ &serdes_ln_ctrl {
>> &usb_serdes_mux {
>> idle-states = <1>; /* USB0 to SERDES lane 3 */
>> + bootph-all;
>> };
>> &usbss0 {
>> pinctrl-names = "default";
>> pinctrl-0 = <&main_usbss0_pins_default>;
>> + bootph-all;
>> ti,vbus-divider;
>> ti,usb2-only;
>> };
>> @@ -413,6 +425,7 @@ &usbss0 {
>> &usb0 {
>> dr_mode = "otg";
>> maximum-speed = "high-speed";
>> + bootph-all;
>> };
>> &tscadc0 {
>> diff --git a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi
>> b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi
>> index e78b4622a7d1..291ab9bb414d 100644
>> --- a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi
>> @@ -121,6 +121,7 @@ J721E_WKUP_IOPAD(0x20, PIN_INPUT, 1) /* (B8)
>> MCU_OSPI0_D5.MCU_HYPERBUS0_DQ5 */
>> J721E_WKUP_IOPAD(0x24, PIN_INPUT, 1) /* (A8)
>> MCU_OSPI0_D6.MCU_HYPERBUS0_DQ6 */
>> J721E_WKUP_IOPAD(0x28, PIN_INPUT, 1) /* (A7)
>> MCU_OSPI0_D7.MCU_HYPERBUS0_DQ7 */
>> >;
>> + bootph-all;
>> };
>> mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-default-pins {
>> @@ -137,6 +138,7 @@ J721E_WKUP_IOPAD(0x0024, PIN_INPUT, 0) /*
>> MCU_OSPI0_D6 */
>> J721E_WKUP_IOPAD(0x0028, PIN_INPUT, 0) /* MCU_OSPI0_D7 */
>> J721E_WKUP_IOPAD(0x0008, PIN_INPUT, 0) /* MCU_OSPI0_DQS */
>> >;
>> + bootph-all;
>> };
>> };
>> @@ -146,6 +148,7 @@ wkup_i2c0_pins_default: wkup-i2c0-default-pins {
>> J721E_WKUP_IOPAD(0x98, PIN_INPUT_PULLUP, 0) /* (F20)
>> WKUP_I2C0_SCL */
>> J721E_WKUP_IOPAD(0x9c, PIN_INPUT_PULLUP, 0) /* (H21)
>> WKUP_I2C0_SDA */
>> >;
>> + bootph-all;
>> };
>> };
>> @@ -186,6 +189,7 @@ &hbmc {
>> flash@0,0 {
>> compatible = "cypress,hyperflash", "cfi-flash";
>> reg = <0x00 0x00 0x4000000>;
>> + bootph-all;
>> partitions {
>> compatible = "fixed-partitions";
>> @@ -347,6 +351,7 @@ bucka1: buck1 {
>> regulator-max-microvolt = <1800000>;
>> regulator-boot-on;
>> regulator-always-on;
>> + bootph-all;
>> };
>> bucka2: buck2 {
>> @@ -520,6 +525,7 @@ partition@800000 {
>> partition@3fc0000 {
>> label = "ospi.phypattern";
>> reg = <0x3fc0000 0x40000>;
>> + bootph-all;
>> };
>> };
>> };
>>
^ permalink raw reply [flat|nested] 21+ messages in thread