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From: Florian Fainelli <florian.fainelli@broadcom.com>
To: Jim Quinlan <james.quinlan@broadcom.com>,
	linux-pci@vger.kernel.org,
	Nicolas Saenz Julienne <nsaenz@kernel.org>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Cyril Brulebois <kibi@debian.org>,
	bcm-kernel-feedback-list@broadcom.com, jim2101024@gmail.com
Cc: "Florian Fainelli" <florian.fainelli@broadcom.com>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
	"Manivannan Sadhasivam" <mani@kernel.org>,
	"Rob Herring" <robh@kernel.org>,
	"moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE"
	<linux-rpi-kernel@lists.infradead.org>,
	"moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE"
	<linux-arm-kernel@lists.infradead.org>,
	"open list" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 1/2] PCI: brcmstb: Add a way to indicate if PCIe bridge is active
Date: Fri, 13 Jun 2025 16:23:28 -0700	[thread overview]
Message-ID: <37f6825e-fba2-49c9-a802-abba1e5343a9@broadcom.com> (raw)
In-Reply-To: <20250613220843.698227-2-james.quinlan@broadcom.com>

On 6/13/25 15:08, Jim Quinlan wrote:
> In a future commit, a new handler will be introduced that in part does
> reads and writes to some of the PCIe registers.  When this handler is
> invoked, it is paramount that it does not do these register accesses when
> the PCIe bridge is inactive, as this will cause CPU abort errors.
> 
> To solve this we keep a spinlock that guards a variable which indicates
> whether the bridge is on or off.  When the bridge is on, access of the PCIe
> HW registers may proceed.
> 
> Since there are multiple ways to reset the bridge, we introduce a general
> function to obtain the spinlock, call the specific function that is used
> for the specific SoC, sets the bridge active indicator variable, and
> releases the spinlock.
> 
> Signed-off-by: Jim Quinlan <james.quinlan@broadcom.com>

Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
-- 
Florian


  reply	other threads:[~2025-06-13 23:23 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-06-13 22:08 [PATCH 0/2] PCI: brcmstb: Add panic/die handler to driver Jim Quinlan
2025-06-13 22:08 ` [PATCH 1/2] PCI: brcmstb: Add a way to indicate if PCIe bridge is active Jim Quinlan
2025-06-13 23:23   ` Florian Fainelli [this message]
2025-08-06 19:14   ` Bjorn Helgaas
2025-08-07 18:03     ` Jim Quinlan
2025-06-13 22:08 ` [PATCH 2/2] PCI: brcmstb: Add panic/die handler to driver Jim Quinlan
2025-06-13 23:28   ` Florian Fainelli
2025-08-06 18:15   ` Bjorn Helgaas
2025-08-06 18:38     ` Jim Quinlan
2025-08-06 18:50       ` Bjorn Helgaas
2025-08-06 19:16         ` Jim Quinlan
2025-08-06 20:41         ` Florian Fainelli
2025-08-07  5:26           ` Manivannan Sadhasivam
2025-08-07 14:40             ` Jim Quinlan
2025-08-07 17:00             ` Florian Fainelli
2025-08-06 19:14   ` Bjorn Helgaas

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