Re: [PATCH v8 08/18] arm64: dts: qcom: x1e80100: Add CAMCC block definition

[Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>]

On 3/3/26 6:56 AM, Taniya Das wrote:
> 
>>>  
>>> +
>>> +		camcc: clock-controller@ade0000 {
>>> +			compatible = "qcom,x1e80100-camcc";
>>> +			reg = <0 0x0ade0000 0 0x20000>;
>>> +			clocks = <&gcc GCC_CAMERA_AHB_CLK>,
>>> +				 <&bi_tcxo_div2>,
>>> +				 <&bi_tcxo_ao_div2>,
>>> +				 <&sleep_clk>;
>>> +			power-domains = <&rpmhpd RPMHPD_MXC>,
>>> +					<&rpmhpd RPMHPD_MMCX>;
>>> +			required-opps = <&rpmhpd_opp_low_svs>,
>>> +					<&rpmhpd_opp_low_svs>;
>>
>> Taniya, in light of the recent discoveries on other platforms, does x1
>> need a performance vote on MXA here?
> 
> Konrad, MxA is always ON, and with the current clock configuration, a
> performance vote isn’t required because the clock controller currently
> votes only for the minimum level.

Yes, it's on, however I'm asking whether it needs to be at any specific
higher OPP as the clocks are scaled to higher rates.

In particular, PLL2 and the MCLK RCGs/branches have *some* references
to MXA, yet their FMAX is possible @ LOWSVS_D1, so it may be that we
*effectively* don't need any.

Konrad