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From: Abhinav Kumar <quic_abhinavk@quicinc.com>
To: Jessica Zhang <quic_jesszhan@quicinc.com>,
	Rob Clark <robdclark@gmail.com>,
	Dmitry Baryshkov <dmitry.baryshkov@linaro.org>,
	"Sean Paul" <sean@poorly.run>,
	Marijn Suijten <marijn.suijten@somainline.org>,
	"David Airlie" <airlied@gmail.com>,
	Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
	Maxime Ripard <mripard@kernel.org>,
	Thomas Zimmermann <tzimmermann@suse.de>,
	Simona Vetter <simona@ffwll.ch>,
	Simona Vetter <simona.vetter@ffwll.ch>
Cc: quic_ebharadw@quicinc.com, linux-arm-msm@vger.kernel.org,
	dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org,
	linux-kernel@vger.kernel.org,
	"Rob Clark" <robdclark@chromium.org>,
	"Ville Syrjälä" <ville.syrjala@linux.intel.com>
Subject: Re: [PATCH v3 05/23] drm/msm/dpu: move resource allocation to CRTC
Date: Thu, 31 Oct 2024 12:37:03 -0700	[thread overview]
Message-ID: <3afded46-7aef-4444-9b61-b97f71d0e5fc@quicinc.com> (raw)
In-Reply-To: <20241016-concurrent-wb-v3-5-a33cf9b93835@quicinc.com>



On 10/16/2024 6:21 PM, Jessica Zhang wrote:
> From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> 
> All resource allocation is centered around the LMs. Then other blocks
> (except DSCs) are allocated basing on the LMs that was selected, and LM
> powers up the CRTC rather than the encoder.
> 
> Moreover if at some point the driver supports encoder cloning,
> allocating resources from the encoder will be incorrect, as all clones
> will have different encoder IDs, while LMs are to be shared by these
> encoders.
> 
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> [quic_abhinavk@quicinc.com: Refactored resource allocation for CDM]
> Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
> [quic_jesszhan@quicinc.com: Changed to grabbing exising global state]
> Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com>
> ---
>   drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c    |  86 ++++++++++++
>   drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 201 +++++++++++-----------------
>   drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h |  19 +++
>   3 files changed, 183 insertions(+), 123 deletions(-)
> 

<Snip>

> -	/* See dpu_encoder_get_topology, we only support 2:2:1 topology */
> +	/* We only support 2 DSC mode (with 2 LM and 1 INTF) */
>   	if (dpu_enc->dsc)
> -		num_dsc = 2;
> +		topology->num_dsc += 2;
>   
> -	return (num_dsc > 0) && (num_dsc > intf_count);
> -}

I dont recall the context of replacing num_dsc = 2 with num_dsc += 2
and its not documented.

<Snip>

> +	/* We only support 2 DSC mode (with 2 LM and 1 INTF) */
> +	if (dpu_enc->dsc)
> +		num_dsc += 2;
>   
> -	return topology;
> +	return (num_dsc > 0) && (num_dsc > num_intf);
>   }
>   

Same here

This should not break anything with current code. We could land it the 
way it is as this was the version which was last tested and post a 
follow up if this was not right. Something to be documented though, hope 
this note serves that purpose. Rest of the change LGTM,

Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>

  reply	other threads:[~2024-10-31 19:37 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-10-17  1:21 [PATCH v3 00/23] drm/msm/dpu: Add Concurrent Writeback Support for DPU 10.x+ Jessica Zhang
2024-10-17  1:21 ` [PATCH v3 01/23] drm: add clone mode check for CRTC Jessica Zhang
2024-10-17  1:21 ` [PATCH v3 02/23] drm: Add valid clones check Jessica Zhang
2024-10-17  1:21 ` [PATCH v3 03/23] drm/msm/dpu: get rid of struct dpu_rm_requirements Jessica Zhang
2024-10-31 21:29   ` Dmitry Baryshkov
2024-10-17  1:21 ` [PATCH v3 04/23] drm/msm/dpu: switch RM to use crtc_id rather than enc_id for allocation Jessica Zhang
2024-10-31 19:18   ` Abhinav Kumar
2024-10-17  1:21 ` [PATCH v3 05/23] drm/msm/dpu: move resource allocation to CRTC Jessica Zhang
2024-10-31 19:37   ` Abhinav Kumar [this message]
2024-10-31 19:53     ` Dmitry Baryshkov
2024-10-31 20:47   ` Dmitry Baryshkov
2024-10-17  1:21 ` [PATCH v3 06/23] drm/msm/dpu: fill CRTC resources in dpu_crtc.c Jessica Zhang
2024-10-31 19:46   ` Abhinav Kumar
2024-10-17  1:21 ` [PATCH v3 07/23] drm/msm/dpu: Add CWB entry to catalog for SM8650 Jessica Zhang
2024-10-17  1:21 ` [PATCH v3 08/23] drm/msm/dpu: Specify dedicated CWB pingpong blocks Jessica Zhang
2024-10-17  1:21 ` [PATCH v3 09/23] drm/msm/dpu: add devcoredumps for cwb registers Jessica Zhang
2024-10-17  1:21 ` [PATCH v3 10/23] drm/msm/dpu: Add dpu_hw_cwb abstraction for CWB block Jessica Zhang
2024-12-24 16:31   ` Dmitry Baryshkov
2024-10-17  1:21 ` [PATCH v3 11/23] drm/msm/dpu: add CWB support to dpu_hw_wb Jessica Zhang
2024-10-17  1:21 ` [PATCH v3 12/23] drm/msm/dpu: Add RM support for allocating CWB Jessica Zhang
2024-10-17  1:21 ` [PATCH v3 13/23] drm/msm/dpu: Add CWB to msm_display_topology Jessica Zhang
2024-10-17  1:21 ` [PATCH v3 14/23] drm/msm/dpu: Require modeset if clone mode status changes Jessica Zhang
2024-10-17  1:21 ` [PATCH v3 15/23] drm/msm/dpu: Fail atomic_check if CWB and CDM are enabled Jessica Zhang
2024-10-17  1:21 ` [PATCH v3 16/23] drm/msm/dpu: Reserve resources for CWB Jessica Zhang
2024-10-17  1:21 ` [PATCH v3 17/23] drm/msm/dpu: Configure CWB in writeback encoder Jessica Zhang
2024-10-17  1:21 ` [PATCH v3 18/23] drm/msm/dpu: Support CWB in dpu_hw_ctl Jessica Zhang
2024-10-17  1:21 ` [PATCH v3 19/23] drm/msm/dpu: Adjust writeback phys encoder setup for CWB Jessica Zhang
2024-10-17  1:21 ` [PATCH v3 20/23] drm/msm/dpu: Start frame done timer after encoder kickoff Jessica Zhang
2024-10-17  1:21 ` [PATCH v3 21/23] drm/msm/dpu: Skip trigger flush and start for CWB Jessica Zhang
2024-10-17  1:21 ` [PATCH v3 22/23] drm/msm/dpu: Reorder encoder kickoff " Jessica Zhang
2024-10-17  1:21 ` [PATCH v3 23/23] drm/msm/dpu: Set possible clones for all encoders Jessica Zhang
2024-10-17 14:31 ` [PATCH v3 00/23] drm/msm/dpu: Add Concurrent Writeback Support for DPU 10.x+ Maxime Ripard
2024-10-17 18:15   ` Abhinav Kumar

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