mirror of https://lore.kernel.org/lkml/
 help / color / mirror / Atom feed
From: Shawn Lin <shawn.lin@rock-chips.com>
To: Geraldo Nascimento <geraldogabriel@gmail.com>,
	Dragan Simic <dsimic@manjaro.org>
Cc: shawn.lin@rock-chips.com, linux-rockchip@lists.infradead.org,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
	"Manivannan Sadhasivam" <mani@kernel.org>,
	"Rob Herring" <robh@kernel.org>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v7 0/3] PCI: rockchip: 5.0 GT/s speed discouraged by Rockchip
Date: Fri, 9 Oct 2026 14:59:04 +0800	[thread overview]
Message-ID: <3bd9f6e1-c670-42f5-b2ea-2b4848e37468@rock-chips.com> (raw)
In-Reply-To: <cover.1781622998.git.geraldogabriel@gmail.com>

Hi Geraldo

在 2026/06/16 星期二 23:24, Geraldo Nascimento 写道:
> Dragan Simic already had warned me of potential issues with 5.0 GT/s
> speed operation in Rockchip PCIe. However, in recent interactions
> with Shawn Lin from Rockchip it came to my attention there's grave
> danger in the unknown errata regarding 5.0 GT/s operational speed
> of their PCIe core, including data loss.
> 
> Drop all code related to 5.0 GT/s operational speed from this driver.
> 

Apologies for the very late notice that this series is still pending.
FWIW,
Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com>

> Endpoint Mode driver was not tested.
> 
> Changes in v7:
> - In pcie-rockchip.c (PATCH 3) drop unreachable code
> - Link to v6: https://lore.kernel.org/all/cover.1781207474.git.geraldogabriel@gmail.com/T/
> 
> Changes in v6:
> - Squashed patches 3 & 4 together as suggested by Mani
> - More formal warning message as suggested by Dragan
> - Set the 2.5 GT/s bit regardless of if link-speed is set to 2
> - Link to v5: https://lore.kernel.org/all/cover.1772239598.git.geraldogabriel@gmail.com/T/
> 
> Changes in v5:
> - Changed commit order to not break builds and adjusted copy pasted
>    commit message. (thanks Charalampos!)
> - Reintroduced behavior to force 2.5 GT/s in case there's something
>    non-default in the DT. (thanks Dragan!)
> - Link to v4: https://lore.kernel.org/linux-rockchip/cover.1772169998.git.geraldogabriel@gmail.com/T/
> 
> Changes in v4:
> - Incorporate suggestion by Bjorn and refined by Dragan to drop the
>    "catastrophic" code
> - Link to v3: https://lore.kernel.org/linux-rockchip/cover.1772057799.git.geraldogabriel@gmail.com/T/
> 
> Changes in v3:
> - Clarify warning message even though Rockchip won't disclose details
> - Drop DT changes as they were applied as subset by Heiko
> - Link to v2: https://lore.kernel.org/all/cover.1763415705.git.geraldogabriel@gmail.com/T/
> 
> Changes in v2:
> - hard limit to 2.5 GT/s, not just warn
> - add Reported-by: and Reviewed-by: Dragan Simic
> - remove redundant declaration of max-link-speed from helios64 dts
> - fix Link: of helios64 patch
> - simplify RC mode comment
> - Link to v1: https://lore.kernel.org/all/aRhR79u5BPtRRFw3@geday/T/
> 
> Geraldo Nascimento (3):
>    PCI: rockchip-ep: do not attempt 5.0 GT/s retraining
>    PCI: rockchip-host: do not attempt 5.0 GT/s retraining
>    PCI: rockchip: drive at 2.5 GT/s, error other speeds
> 
>   drivers/pci/controller/pcie-rockchip-ep.c   | 13 -------------
>   drivers/pci/controller/pcie-rockchip-host.c | 20 --------------------
>   drivers/pci/controller/pcie-rockchip.c      | 14 ++++++--------
>   drivers/pci/controller/pcie-rockchip.h      |  3 ---
>   4 files changed, 6 insertions(+), 44 deletions(-)
> 


  parent reply	other threads:[~2026-10-09  7:04 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-06-16 15:24 Geraldo Nascimento
2026-06-16 15:25 ` [PATCH v7 1/3] PCI: rockchip-ep: do not attempt 5.0 GT/s retraining Geraldo Nascimento
2026-06-16 19:06   ` Dragan Simic
2026-06-16 15:25 ` [PATCH v7 2/3] PCI: rockchip-host: " Geraldo Nascimento
2026-06-16 19:08   ` Dragan Simic
2026-06-16 15:26 ` [PATCH v7 3/3] PCI: rockchip: drive at 2.5 GT/s, error other speeds Geraldo Nascimento
2026-06-16 19:10   ` Dragan Simic
2026-08-13 17:26 ` [PATCH v7 0/3] PCI: rockchip: 5.0 GT/s speed discouraged by Rockchip Geraldo Nascimento
2026-10-09  6:59 ` Shawn Lin [this message]
2026-10-13 13:47 ` Manivannan Sadhasivam
2026-10-13 18:11   ` Geraldo Nascimento

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=3bd9f6e1-c670-42f5-b2ea-2b4848e37468@rock-chips.com \
    --to=shawn.lin@rock-chips.com \
    --cc=bhelgaas@google.com \
    --cc=dsimic@manjaro.org \
    --cc=geraldogabriel@gmail.com \
    --cc=kwilczynski@kernel.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=linux-rockchip@lists.infradead.org \
    --cc=lpieralisi@kernel.org \
    --cc=mani@kernel.org \
    --cc=robh@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox

all inboxes | Powered by JetHome®