[PATCH v2 0/9] drm/panel: novatek-nt36672a: Extend with 5 new panels

[PATCH v2 0/9] drm/panel: novatek-nt36672a: Extend with 5 new panels

[Alexey Minnekhanov]

These series make the driver for novatek-nt36672-based panels more
easily extensible and add support for 5 new panels to it, used in
4 different smartphones, all based on NT36672A:

 * Shenchao panel used in Xiaomi Redmi Note 7 (xiaomi-lavender), the
  exact model string is unknown
 * Tianma TL063FVMCA01-00 for Xiaomi Redmi Note 7 (xiaomi-lavender)
 * Tianma TL063FVMC43-02 for Xiaomi Redmi Note 6 Pro (xiaomi-tulip)
 * Tianma TL060FVXS16-00 for Xiaomi Mi A2 smartphone (xiaomi-jasmine)
 * TXD TXDI600YANPA-43V3 Asus Zenfone Max Pro M1 (asus-x00td).

Combining two init sequences into one was previously briefly
discussed in [1].

[1] https://lore.kernel.org/all/20260523035734.6602-1-chintanlike@gmail.com/

Signed-off-by: Alexey Minnekhanov <alexeymin@minlexx.ru>
---
Changes in v2:
- rebased on next-20260914
- vendor prefixes: changed from "txd" to "txdkj" in bindings and driver for asus-x00td
- vendor-prefixes: correct company name for shenchao, expand description, add a link
- nt36672a bindings: changed description to mention several panels instead of one,
  fixed alphabetical ordering of compatible strings
- patch 5: move tianma_fhd specific deinit sequence (set_display_off, msleep,
  enter_sleep_mode) from nt36672a_panel_unprepare() into its own
  tianma_fhd_video_send_deinit_cmds() deinit function.
- patch 6: sort compatible strings alphabetically in of_device_id
- patch 7: use mipi_dsi_usleep_range() instead of usleep_range()
- patch 8: use correct co-author's real name in trailers
- picked one r-b tag from David Heidelberg
- Link to v1: https://patch.msgid.link/20260913-nt36672a-panels-v1-0-ce097402c6ea@minlexx.ru

To: Rob Herring <robh@kernel.org>
To: Krzysztof Kozlowski <krzk+dt@kernel.org>
To: Conor Dooley <conor+dt@kernel.org>
To: Sumit Semwal <sumit.semwal@linaro.org>
To: Alexey Minnekhanov <alexeymin@minlexx.ru>
To: Neil Armstrong <neil.armstrong@linaro.org>
To: Jessica Zhang <jesszhan0024@gmail.com>
To: David Airlie <airlied@gmail.com>
To: Simona Vetter <simona@ffwll.ch>
To: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
To: Maxime Ripard <mripard@kernel.org>
To: Thomas Zimmermann <tzimmermann@suse.de>
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: dri-devel@lists.freedesktop.org

---
Alexey Minnekhanov (9):
      dt-bindings: vendor-prefixes: Add Shenzhen TXD Technology Co., Ltd.
      dt-bindings: vendor-prefixes: Add Shen Chao Optoelectronics
      dt-bindings: display: novatek,nt36672a: Add 5 new panels
      drm/panel: novatek-nt36672a: Set driver name to novatek for consistency
      drm/panel: novatek-nt36672a: Combine two init callbacks into one
      drm/panel: novatek-nt36672a: Add 3 panels used in Xiaomi phones
      drm/panel: novatek-nt36672a: Add Tianma panel for Xiaomi Mi A2
      drm/panel: novatek-nt36672a: Add panel for Asus Zenfone Max Pro M1
      MAINTAINERS: Add Alexey Minnekhanov as maintainer for NT36672A panel

 .../bindings/display/panel/novatek,nt36672a.yaml   |  11 +-
 .../devicetree/bindings/vendor-prefixes.yaml       |   4 +
 MAINTAINERS                                        |   1 +
 drivers/gpu/drm/panel/panel-novatek-nt36672a.c     | 573 +++++++++++++++++++--
 4 files changed, 543 insertions(+), 46 deletions(-)
---
base-commit: 0d9d0dbf2fddcff5859d623e90ca73c4054276e1
change-id: 20260912-nt36672a-panels-e34a72677bb5

Best regards,
--  
Alexey Minnekhanov <alexeymin@minlexx.ru>

[PATCH v2 1/9] dt-bindings: vendor-prefixes: Add Shenzhen TXD Technology Co., Ltd.

[Alexey Minnekhanov]

Add prefix for Shenzhen TXD Technology Co., Ltd., manufacturer of
medium sized LCD and camera modules for mobile phones, tablets and
automotive.

[1] https://en.txdkj.com/

Signed-off-by: Alexey Minnekhanov <alexeymin@minlexx.ru>

---
v2: prefix changed from "txd" to "txdkj"
---
 Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml
index 4a5cf436eb143..bc87d5e9fdd2b 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
+++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
@@ -1773,6 +1773,8 @@ patternProperties:
     description: Turing Machines, Inc.
   "^tuxedo,.*":
     description: TUXEDO Computers GmbH
+  "^txdkj,.*":
+    description: Shenzhen TXD Technology Co., Ltd.
   "^tyan,.*":
     description: Tyan Computer Corporation
   "^tyhx,.*":

-- 
2.55.0

[PATCH v2 2/9] dt-bindings: vendor-prefixes: Add Shen Chao Optoelectronics

[Alexey Minnekhanov]

Shen Chao Optoelectronics Co., Ltd. is a manufacturer of LCD
displays based in Shenzhen. According to description in [1],
the company specializes in the design, R&D, testing, and
manufacturing of TFT-LCD liquid crystal display panels. Its
products are widely used in the 3C electronic display field,
covering a full range of display products including LCD monitors,
laptops, and mobile phones.

[1] https://www.qcc.com/firm/5b0330df7040fba496dbb0bd5723f6be.html

Signed-off-by: Alexey Minnekhanov <alexeymin@minlexx.ru>

---
v2: correct company name, expand description, add a link
---
 Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml
index bc87d5e9fdd2b..0e011b6679847 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
+++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
@@ -1509,6 +1509,8 @@ patternProperties:
     description: SGX Sensortech
   "^sharp,.*":
     description: Sharp Corporation
+  "^shenchao,.*":
+    description: Shen Chao Optoelectronics (Shenzhen) Co., Ltd.
   "^shift,.*":
     description: SHIFT GmbH
   "^shimafuji,.*":

-- 
2.55.0

[PATCH v2 3/9] dt-bindings: display: novatek,nt36672a: Add 5 new panels

[Alexey Minnekhanov]

Document 5 new panels used in 4 different smartphones produced by
Xiaomi and ASUS:

 * Shenchao panel used in Xiaomi Redmi Note 7 (xiaomi-lavender), the
  exact model string is unknown
 * Tianma TL063FVMC43-02 for Xiaomi Redmi Note 6 Pro (xiaomi-tulip)
 * Tianma TL063FVMCA01-00 for Xiaomi Redmi Note 7 (xiaomi-lavender)
 * Tianma TL060FVXS16-00 for Xiaomi Mi A2 smartphone (xiaomi-jasmine)
 * TXD TXDI600YANPA-43V3 Asus Zenfone Max Pro M1 (asus-x00td)

Signed-off-by: Alexey Minnekhanov <alexeymin@minlexx.ru>

---
v2:
 * changed description to mention several panels instead of one
 * fixed alphabetical ordering of compatible strings
 * changed vendor prefix of TXD: "txd" -> "txdkj"
---
 .../devicetree/bindings/display/panel/novatek,nt36672a.yaml   | 11 +++++++----
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/Documentation/devicetree/bindings/display/panel/novatek,nt36672a.yaml b/Documentation/devicetree/bindings/display/panel/novatek,nt36672a.yaml
index 5d16d85117254..62ec3294b9b68 100644
--- a/Documentation/devicetree/bindings/display/panel/novatek,nt36672a.yaml
+++ b/Documentation/devicetree/bindings/display/panel/novatek,nt36672a.yaml
@@ -10,10 +10,8 @@ maintainers:
   - Sumit Semwal <sumit.semwal@linaro.org>
 
 description: |
-  The nt36672a IC from Novatek is a generic DSI Panel IC used to drive dsi
-  panels.
-  Right now, support is added only for a Tianma FHD+ LCD display panel with a
-  resolution of 1080x2246. It is a video mode DSI panel.
+  The NT36672A IC from Novatek is a generic DSI Panel IC used to drive dsi
+  panels. Currently supports 6 panel models for 5 different smartphones.
 
 allOf:
   - $ref: panel-common.yaml#
@@ -22,7 +20,12 @@ properties:
   compatible:
     items:
       - enum:
+          - shenchao,fhdplus-video
           - tianma,fhd-video
+          - tianma,tl060fvxs16-00
+          - tianma,tl063fvmc43-02
+          - tianma,tl063fvmca01-00
+          - txdkj,txdi600yanpa-43v3
       - const: novatek,nt36672a
     description: This indicates the panel manufacturer of the panel that is
       in turn using the NT36672A panel driver. This compatible string

-- 
2.55.0

[PATCH v2 4/9] drm/panel: novatek-nt36672a: Set driver name to novatek for consistency

[Alexey Minnekhanov]

Since this driver should represent not only devices manufactured by
Tianma Micro-electronics, but also from other companies, it makes more
sense to name it according to what driver file name already is: novatek.

This does not change neither module file name nor Kconfig symbol, only
driver identification in dmesg. This makes it possible to e.g. grep
dmesg for "novatek" and get messages from both nt36672a-based panel and
Novatek touchscreen.

Reviewed-by: David Heidelberg <david@ixit.cz>
Signed-off-by: Alexey Minnekhanov <alexeymin@minlexx.ru>
---
 drivers/gpu/drm/panel/panel-novatek-nt36672a.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/panel/panel-novatek-nt36672a.c b/drivers/gpu/drm/panel/panel-novatek-nt36672a.c
index 464d9ce47d87d..73bec4f47ec60 100644
--- a/drivers/gpu/drm/panel/panel-novatek-nt36672a.c
+++ b/drivers/gpu/drm/panel/panel-novatek-nt36672a.c
@@ -479,16 +479,16 @@ static void nt36672a_panel_remove(struct mipi_dsi_device *dsi)
 	drm_panel_remove(&pinfo->base);
 }
 
-static const struct of_device_id tianma_fhd_video_of_match[] = {
+static const struct of_device_id panel_nt36672a_match[] = {
 	{ .compatible = "tianma,fhd-video", .data = &tianma_fhd_video_panel_desc },
 	{ },
 };
-MODULE_DEVICE_TABLE(of, tianma_fhd_video_of_match);
+MODULE_DEVICE_TABLE(of, panel_nt36672a_match);
 
 static struct mipi_dsi_driver nt36672a_panel_driver = {
 	.driver = {
-		.name = "panel-tianma-nt36672a",
-		.of_match_table = tianma_fhd_video_of_match,
+		.name = "panel-novatek-nt36672a",
+		.of_match_table = panel_nt36672a_match,
 	},
 	.probe = nt36672a_panel_probe,
 	.remove = nt36672a_panel_remove,

-- 
2.55.0

[PATCH v2 5/9] drm/panel: novatek-nt36672a: Combine two init callbacks into one

[Alexey Minnekhanov]

The split between .send_init_cmds_1 and _cmds_2 is completely artificial
and unnecessary. Two command sets are split in between by the sequence:
 - exit_sleep_mode
 - delay
 - set_display_on

But not every panel driver follows this "split" in their init sequence.
Some may have different delay timer, or put exit_sleep_mode/display_on
commands into other places in the sequence.

In order to make this driver more extensible, combine two init functions
into one by puting exit_sleep_mode/delay/display_on in the middle,
followed by commands from cmds_2. As part of this step, also move the
tianma-beryllium specific deinit sequence with its delays from
nt36672a_panel_unprepare() to tianma_fhd_video_send_deinit_cmds(), so
that each panel model can have its deinit sequence with its own delays.

No functional change - full init sequence with all the delays for the
tianma_fhd_video panel is kept the same in the end.

Signed-off-by: Alexey Minnekhanov <alexeymin@minlexx.ru>

---
v2: move tianma_fhd deinit commands into its own deinit function
    (set_display_off, msleep, enter_sleep_mode, msleep)
---
 drivers/gpu/drm/panel/panel-novatek-nt36672a.c | 61 ++++++++++----------------
 1 file changed, 23 insertions(+), 38 deletions(-)

diff --git a/drivers/gpu/drm/panel/panel-novatek-nt36672a.c b/drivers/gpu/drm/panel/panel-novatek-nt36672a.c
index 73bec4f47ec60..a445c8067aa5f 100644
--- a/drivers/gpu/drm/panel/panel-novatek-nt36672a.c
+++ b/drivers/gpu/drm/panel/panel-novatek-nt36672a.c
@@ -51,8 +51,7 @@ struct nt36672a_panel_desc {
 	enum mipi_dsi_pixel_format format;
 	unsigned int lanes;
 
-	void (*send_init_cmds_1)(struct mipi_dsi_multi_context *dsi_ctx);
-	void (*send_init_cmds_2)(struct mipi_dsi_multi_context *dsi_ctx);
+	void (*send_init_cmds)(struct mipi_dsi_multi_context *dsi_ctx);
 	void (*send_deinit_cmds)(struct mipi_dsi_multi_context *dsi_ctx);
 };
 
@@ -92,20 +91,6 @@ static int nt36672a_panel_unprepare(struct drm_panel *panel)
 	if (pinfo->desc->send_deinit_cmds)
 		pinfo->desc->send_deinit_cmds(&dsi_ctx);
 
-	/* Reset error to continue with display off even if send_cmds failed */
-	dsi_ctx.accum_err = 0;
-	mipi_dsi_dcs_set_display_off_multi(&dsi_ctx);
-	/* Reset error to continue power-down even if display off failed */
-	dsi_ctx.accum_err = 0;
-
-	/* 120ms delay required here as per DCS spec */
-	msleep(120);
-
-	mipi_dsi_dcs_enter_sleep_mode_multi(&dsi_ctx);
-
-	/* 0x3C = 60ms delay */
-	msleep(60);
-
 	nt36672a_panel_power_off(panel);
 
 	return 0;
@@ -140,22 +125,9 @@ static int nt36672a_panel_prepare(struct drm_panel *panel)
 
 	dsi_ctx.accum_err = nt36672a_panel_power_on(pinfo);
 
-	/* send first part of init cmds */
-	if (pinfo->desc->send_init_cmds_1)
-		pinfo->desc->send_init_cmds_1(&dsi_ctx);
-
-	mipi_dsi_dcs_exit_sleep_mode_multi(&dsi_ctx);
-
-	/* 0x46 = 70 ms delay */
-	mipi_dsi_msleep(&dsi_ctx, 70);
-
-	mipi_dsi_dcs_set_display_on_multi(&dsi_ctx);
-
-	/* Send rest of the init cmds */
-	if (pinfo->desc->send_init_cmds_2)
-		pinfo->desc->send_init_cmds_2(&dsi_ctx);
-
-	mipi_dsi_msleep(&dsi_ctx, 120);
+	/* send init cmds */
+	if (pinfo->desc->send_init_cmds)
+		pinfo->desc->send_init_cmds(&dsi_ctx);
 
 	if (dsi_ctx.accum_err < 0)
 		gpiod_set_value(pinfo->reset_gpio, 0);
@@ -192,7 +164,7 @@ static const struct drm_panel_funcs panel_funcs = {
 	.get_modes = nt36672a_panel_get_modes,
 };
 
-static void tianma_fhd_video_send_init_cmds_1(struct mipi_dsi_multi_context *dsi_ctx)
+static void tianma_fhd_video_send_init_cmds(struct mipi_dsi_multi_context *dsi_ctx)
 {
 	u8 reg;
 
@@ -352,15 +324,19 @@ static void tianma_fhd_video_send_init_cmds_1(struct mipi_dsi_multi_context *dsi
 	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x51, 0xff);
 	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x53, 0x24);
 	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x55, 0x00);
-}
 
-static void tianma_fhd_video_send_init_cmds_2(struct mipi_dsi_multi_context *dsi_ctx)
-{
+	mipi_dsi_dcs_exit_sleep_mode_multi(dsi_ctx);
+	/* 0x46 = 70 ms delay */
+	mipi_dsi_msleep(dsi_ctx, 70);
+	mipi_dsi_dcs_set_display_on_multi(dsi_ctx);
+
 	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x24);
 	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xfb, 0x01);
 	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xc3, 0x01);
 	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xc4, 0x54);
 	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x10);
+
+	mipi_dsi_msleep(dsi_ctx, 120);
 }
 
 static void tianma_fhd_video_send_deinit_cmds(struct mipi_dsi_multi_context *dsi_ctx)
@@ -369,6 +345,16 @@ static void tianma_fhd_video_send_deinit_cmds(struct mipi_dsi_multi_context *dsi
 	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xfb, 0x01);
 	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xc3, 0x01);
 	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x10);
+
+	/* Reset error to continue with display off even if send_cmds failed */
+	dsi_ctx->accum_err = 0;
+	mipi_dsi_dcs_set_display_off_multi(dsi_ctx);
+	/* Reset error to continue power-down even if display off failed */
+	dsi_ctx->accum_err = 0;
+	/* 120ms delay required here as per DCS spec */
+	msleep(120);
+	mipi_dsi_dcs_enter_sleep_mode_multi(dsi_ctx);
+	msleep(60); /* 0x3C = 60ms delay */
 }
 
 static const struct drm_display_mode tianma_fhd_video_panel_default_mode = {
@@ -399,8 +385,7 @@ static const struct nt36672a_panel_desc tianma_fhd_video_panel_desc = {
 			| MIPI_DSI_MODE_VIDEO_BURST,
 	.format = MIPI_DSI_FMT_RGB888,
 	.lanes = 4,
-	.send_init_cmds_1 = tianma_fhd_video_send_init_cmds_1,
-	.send_init_cmds_2 = tianma_fhd_video_send_init_cmds_2,
+	.send_init_cmds = tianma_fhd_video_send_init_cmds,
 	.send_deinit_cmds = tianma_fhd_video_send_deinit_cmds,
 };
 

-- 
2.55.0

Re: [PATCH v2 5/9] drm/panel: novatek-nt36672a: Combine two init callbacks into one

[Neil Armstrong]

On 9/17/26 18:43, Alexey Minnekhanov wrote:
> The split between .send_init_cmds_1 and _cmds_2 is completely artificial
> and unnecessary. Two command sets are split in between by the sequence:
>   - exit_sleep_mode
>   - delay
>   - set_display_on
> 
> But not every panel driver follows this "split" in their init sequence.
> Some may have different delay timer, or put exit_sleep_mode/display_on
> commands into other places in the sequence.
> 
> In order to make this driver more extensible, combine two init functions
> into one by puting exit_sleep_mode/delay/display_on in the middle,
> followed by commands from cmds_2. As part of this step, also move the
> tianma-beryllium specific deinit sequence with its delays from
> nt36672a_panel_unprepare() to tianma_fhd_video_send_deinit_cmds(), so
> that each panel model can have its deinit sequence with its own delays.
> 
> No functional change - full init sequence with all the delays for the
> tianma_fhd_video panel is kept the same in the end.
> 
> Signed-off-by: Alexey Minnekhanov <alexeymin@minlexx.ru>
> 
> ---
> v2: move tianma_fhd deinit commands into its own deinit function
>      (set_display_off, msleep, enter_sleep_mode, msleep)
> ---
>   drivers/gpu/drm/panel/panel-novatek-nt36672a.c | 61 ++++++++++----------------
>   1 file changed, 23 insertions(+), 38 deletions(-)
> 
> diff --git a/drivers/gpu/drm/panel/panel-novatek-nt36672a.c b/drivers/gpu/drm/panel/panel-novatek-nt36672a.c
> index 73bec4f47ec60..a445c8067aa5f 100644
> --- a/drivers/gpu/drm/panel/panel-novatek-nt36672a.c
> +++ b/drivers/gpu/drm/panel/panel-novatek-nt36672a.c
> @@ -51,8 +51,7 @@ struct nt36672a_panel_desc {
>   	enum mipi_dsi_pixel_format format;
>   	unsigned int lanes;
>   
> -	void (*send_init_cmds_1)(struct mipi_dsi_multi_context *dsi_ctx);
> -	void (*send_init_cmds_2)(struct mipi_dsi_multi_context *dsi_ctx);
> +	void (*send_init_cmds)(struct mipi_dsi_multi_context *dsi_ctx);
>   	void (*send_deinit_cmds)(struct mipi_dsi_multi_context *dsi_ctx);
>   };
>   
> @@ -92,20 +91,6 @@ static int nt36672a_panel_unprepare(struct drm_panel *panel)
>   	if (pinfo->desc->send_deinit_cmds)
>   		pinfo->desc->send_deinit_cmds(&dsi_ctx);
>   
> -	/* Reset error to continue with display off even if send_cmds failed */
> -	dsi_ctx.accum_err = 0;
> -	mipi_dsi_dcs_set_display_off_multi(&dsi_ctx);
> -	/* Reset error to continue power-down even if display off failed */
> -	dsi_ctx.accum_err = 0;
> -
> -	/* 120ms delay required here as per DCS spec */
> -	msleep(120);
> -
> -	mipi_dsi_dcs_enter_sleep_mode_multi(&dsi_ctx);
> -
> -	/* 0x3C = 60ms delay */
> -	msleep(60);
> -
>   	nt36672a_panel_power_off(panel);
>   
>   	return 0;
> @@ -140,22 +125,9 @@ static int nt36672a_panel_prepare(struct drm_panel *panel)
>   
>   	dsi_ctx.accum_err = nt36672a_panel_power_on(pinfo);
>   
> -	/* send first part of init cmds */
> -	if (pinfo->desc->send_init_cmds_1)
> -		pinfo->desc->send_init_cmds_1(&dsi_ctx);
> -
> -	mipi_dsi_dcs_exit_sleep_mode_multi(&dsi_ctx);
> -
> -	/* 0x46 = 70 ms delay */
> -	mipi_dsi_msleep(&dsi_ctx, 70);
> -
> -	mipi_dsi_dcs_set_display_on_multi(&dsi_ctx);
> -
> -	/* Send rest of the init cmds */
> -	if (pinfo->desc->send_init_cmds_2)
> -		pinfo->desc->send_init_cmds_2(&dsi_ctx);
> -
> -	mipi_dsi_msleep(&dsi_ctx, 120);
> +	/* send init cmds */
> +	if (pinfo->desc->send_init_cmds)
> +		pinfo->desc->send_init_cmds(&dsi_ctx);
>   
>   	if (dsi_ctx.accum_err < 0)
>   		gpiod_set_value(pinfo->reset_gpio, 0);
> @@ -192,7 +164,7 @@ static const struct drm_panel_funcs panel_funcs = {
>   	.get_modes = nt36672a_panel_get_modes,
>   };
>   
> -static void tianma_fhd_video_send_init_cmds_1(struct mipi_dsi_multi_context *dsi_ctx)
> +static void tianma_fhd_video_send_init_cmds(struct mipi_dsi_multi_context *dsi_ctx)
>   {
>   	u8 reg;
>   
> @@ -352,15 +324,19 @@ static void tianma_fhd_video_send_init_cmds_1(struct mipi_dsi_multi_context *dsi
>   	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x51, 0xff);
>   	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x53, 0x24);
>   	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x55, 0x00);
> -}
>   
> -static void tianma_fhd_video_send_init_cmds_2(struct mipi_dsi_multi_context *dsi_ctx)
> -{
> +	mipi_dsi_dcs_exit_sleep_mode_multi(dsi_ctx);
> +	/* 0x46 = 70 ms delay */
> +	mipi_dsi_msleep(dsi_ctx, 70);
> +	mipi_dsi_dcs_set_display_on_multi(dsi_ctx);
> +
>   	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x24);
>   	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xfb, 0x01);
>   	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xc3, 0x01);
>   	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xc4, 0x54);
>   	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x10);
> +
> +	mipi_dsi_msleep(dsi_ctx, 120);
>   }
>   
>   static void tianma_fhd_video_send_deinit_cmds(struct mipi_dsi_multi_context *dsi_ctx)
> @@ -369,6 +345,16 @@ static void tianma_fhd_video_send_deinit_cmds(struct mipi_dsi_multi_context *dsi
>   	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xfb, 0x01);
>   	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xc3, 0x01);
>   	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x10);
> +
> +	/* Reset error to continue with display off even if send_cmds failed */
> +	dsi_ctx->accum_err = 0;
> +	mipi_dsi_dcs_set_display_off_multi(dsi_ctx);
> +	/* Reset error to continue power-down even if display off failed */
> +	dsi_ctx->accum_err = 0;
> +	/* 120ms delay required here as per DCS spec */
> +	msleep(120);
> +	mipi_dsi_dcs_enter_sleep_mode_multi(dsi_ctx);
> +	msleep(60); /* 0x3C = 60ms delay */
>   }
>   
>   static const struct drm_display_mode tianma_fhd_video_panel_default_mode = {
> @@ -399,8 +385,7 @@ static const struct nt36672a_panel_desc tianma_fhd_video_panel_desc = {
>   			| MIPI_DSI_MODE_VIDEO_BURST,
>   	.format = MIPI_DSI_FMT_RGB888,
>   	.lanes = 4,
> -	.send_init_cmds_1 = tianma_fhd_video_send_init_cmds_1,
> -	.send_init_cmds_2 = tianma_fhd_video_send_init_cmds_2,
> +	.send_init_cmds = tianma_fhd_video_send_init_cmds,
>   	.send_deinit_cmds = tianma_fhd_video_send_deinit_cmds,
>   };
>   
> 

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>

Thanks,
Neil

[PATCH v2 6/9] drm/panel: novatek-nt36672a: Add 3 panels used in Xiaomi phones

[Alexey Minnekhanov]

Add support for 3 panels used in 2 Xiaomi smartphones, all based on
Qualcomm SDM636/660 SoC:

* Shenchao panel used in Xiaomi Redmi Note 7 (xiaomi-lavender), the
  exact model string is unknown
* Tianma TL063FVMC43-02  for Xiaomi Redmi Note 6 Pro (xiaomi-tulip)
* Tianma TL063FVMCA01-00 for Xiaomi Redmi Note 7 (xiaomi-lavender)

They all are DSI video mode panels using Novatek NT36672A controller,
so they can share almost exactly the same init/off sequences with
minimal differences between variants. This allows to avoid a lot of
code duplication.

Co-developed-by: Richard Acayan <mailingradian@gmail.com>
Signed-off-by: Richard Acayan <mailingradian@gmail.com>
Signed-off-by: Alexey Minnekhanov <alexeymin@minlexx.ru>

---
v2: sort compatible strings alphabetically in of_device_id
---
 drivers/gpu/drm/panel/panel-novatek-nt36672a.c | 166 +++++++++++++++++++++++++
 1 file changed, 166 insertions(+)

diff --git a/drivers/gpu/drm/panel/panel-novatek-nt36672a.c b/drivers/gpu/drm/panel/panel-novatek-nt36672a.c
index a445c8067aa5f..d356348d39608 100644
--- a/drivers/gpu/drm/panel/panel-novatek-nt36672a.c
+++ b/drivers/gpu/drm/panel/panel-novatek-nt36672a.c
@@ -357,6 +357,90 @@ static void tianma_fhd_video_send_deinit_cmds(struct mipi_dsi_multi_context *dsi
 	msleep(60); /* 0x3C = 60ms delay */
 }
 
+static void lavender_tulip_init_cmds(struct mipi_dsi_multi_context *dsi_ctx)
+{
+	/*
+	 * This function supports 3 similar panels with minimal differences
+	 * in their init sequences. We assume base to be lavender-tianma
+	 * panel, and 2 variations (lavender-shenchao and tulip) are handled as
+	 * differences to base.
+	 */
+	const struct device_node *node = dev_of_node(&dsi_ctx->dsi->dev);
+	bool is_shenchao = of_device_is_compatible(node, "shenchao,fhdplus-video");
+	bool is_tulip = of_device_is_compatible(node, "tianma,tl063fvmc43-02");
+
+	dsi_ctx->dsi->mode_flags |= MIPI_DSI_MODE_LPM;
+
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x25);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xfb, 0x01);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x18, 0x96);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x05, 0x04);
+
+	if (is_shenchao)
+		mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x27);
+	else
+		mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x20);
+
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xfb, 0x01);
+
+	if (is_shenchao)
+		mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xd9, 0x10);
+	else
+		mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x78, 0x01);
+
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x24);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xfb, 0x01);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x82, 0x13);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x84, 0x31);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x88, 0x13);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x8a, 0x31);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x8e, 0xe4);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x8f, 0x01);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x90, 0x80);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x26);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xfb, 0x01);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xa9, 0x12);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xaa, 0x10);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xae, 0x8a);
+
+	if (is_shenchao)
+		mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x1c, 0xfa);
+
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x10);
+
+	if (is_shenchao)
+		mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb0, 0x01);
+
+	mipi_dsi_dcs_exit_sleep_mode_multi(dsi_ctx);
+	mipi_dsi_msleep(dsi_ctx, 80);
+
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb0, 0x01);
+	mipi_dsi_dcs_set_tear_on_multi(dsi_ctx, MIPI_DSI_DCS_TEAR_MODE_VBLANK);
+
+	if (is_tulip) {
+		mipi_dsi_dcs_set_display_brightness_multi(dsi_ctx, 0x00ff);
+	} else {
+		/* lavender tianma + shenchao specific part */
+		mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x68, 0x03, 0x04);
+		mipi_dsi_dcs_set_display_brightness_multi(dsi_ctx, 0x00b8);
+	}
+
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, MIPI_DCS_WRITE_CONTROL_DISPLAY, 0x2c);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, MIPI_DCS_WRITE_POWER_SAVE, 0x00);
+
+	mipi_dsi_dcs_set_display_on_multi(dsi_ctx);
+}
+
+static void lavender_tulip_deinit_cmds(struct mipi_dsi_multi_context *dsi_ctx)
+{
+	dsi_ctx->dsi->mode_flags &= ~MIPI_DSI_MODE_LPM;
+
+	mipi_dsi_dcs_set_display_off_multi(dsi_ctx);
+	mipi_dsi_msleep(dsi_ctx, 20);
+	mipi_dsi_dcs_enter_sleep_mode_multi(dsi_ctx);
+	mipi_dsi_msleep(dsi_ctx, 120);
+}
+
 static const struct drm_display_mode tianma_fhd_video_panel_default_mode = {
 	.clock		= 161331,
 
@@ -389,6 +473,85 @@ static const struct nt36672a_panel_desc tianma_fhd_video_panel_desc = {
 	.send_deinit_cmds = tianma_fhd_video_send_deinit_cmds,
 };
 
+/* common for both lavender-tianma and lavender-shenchao panels */
+static const struct drm_display_mode lavender_panel_default_mode = {
+	.clock		= (1080 + 90 + 2 + 120) * (2340 + 10 + 3 + 8) * 60 / 1000,
+
+	.hdisplay	= 1080,
+	.hsync_start	= 1080 + 90,
+	.hsync_end	= 1080 + 90 + 2,
+	.htotal		= 1080 + 90 + 2 + 120,
+
+	.vdisplay	= 2340,
+	.vsync_start	= 2340 + 10,
+	.vsync_end	= 2340 + 10 + 3,
+	.vtotal		= 2340 + 10 + 3 + 8,
+
+	.type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
+};
+
+static const struct nt36672a_panel_desc shenchao_lavender_panel_desc = {
+	.display_mode = &lavender_panel_default_mode,
+
+	.width_mm = 67,
+	.height_mm = 145,
+
+	.mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
+			MIPI_DSI_CLOCK_NON_CONTINUOUS,
+	.format = MIPI_DSI_FMT_RGB888,
+	.lanes = 4,
+	.send_init_cmds = lavender_tulip_init_cmds,
+	.send_deinit_cmds = lavender_tulip_deinit_cmds,
+};
+
+static const struct nt36672a_panel_desc tianma_lavender_panel_desc = {
+	.display_mode = &lavender_panel_default_mode,
+
+	.width_mm = 67,
+	.height_mm = 145,
+
+	.mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
+			MIPI_DSI_CLOCK_NON_CONTINUOUS,
+	.format = MIPI_DSI_FMT_RGB888,
+	.lanes = 4,
+	.send_init_cmds = lavender_tulip_init_cmds,
+	.send_deinit_cmds = lavender_tulip_deinit_cmds,
+};
+
+static const struct drm_display_mode tianmaplus_e7t_tulip_mode = {
+	.clock		= (1080 + 100 + 28 + 120) * (2280 + 10 + 3 + 8) * 60 / 1000,
+
+	.hdisplay	= 1080,
+	.hsync_start	= 1080 + 100,
+	.hsync_end	= 1080 + 100 + 28,
+	.htotal		= 1080 + 100 + 28 + 120,
+
+	.vdisplay	= 2280,
+	.vsync_start	= 2280 + 10,
+	.vsync_end	= 2280 + 10 + 3,
+	.vtotal		= 2280 + 10 + 3 + 8,
+
+	.width_mm = 68,
+	.height_mm = 143,
+
+	.type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
+};
+
+static const struct nt36672a_panel_desc tianmaplus_e7t_tulip_panel_desc = {
+	.display_mode = &tianmaplus_e7t_tulip_mode,
+
+	.width_mm = 68,
+	.height_mm = 143,
+
+	.mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
+			MIPI_DSI_CLOCK_NON_CONTINUOUS,
+	.format = MIPI_DSI_FMT_RGB888,
+	.lanes = 4,
+	/* tulip panel uses almost the same init/deinit sequences as lavender */
+	.send_init_cmds = lavender_tulip_init_cmds,
+	.send_deinit_cmds = lavender_tulip_deinit_cmds,
+};
+
 static int nt36672a_panel_add(struct nt36672a_panel *pinfo)
 {
 	struct device *dev = &pinfo->link->dev;
@@ -465,7 +628,10 @@ static void nt36672a_panel_remove(struct mipi_dsi_device *dsi)
 }
 
 static const struct of_device_id panel_nt36672a_match[] = {
+	{ .compatible = "shenchao,fhdplus-video", .data = &shenchao_lavender_panel_desc },
 	{ .compatible = "tianma,fhd-video", .data = &tianma_fhd_video_panel_desc },
+	{ .compatible = "tianma,tl063fvmc43-02", .data = &tianmaplus_e7t_tulip_panel_desc },
+	{ .compatible = "tianma,tl063fvmca01-00", .data = &tianma_lavender_panel_desc },
 	{ },
 };
 MODULE_DEVICE_TABLE(of, panel_nt36672a_match);

-- 
2.55.0

Re: [PATCH v2 6/9] drm/panel: novatek-nt36672a: Add 3 panels used in Xiaomi phones

[Neil Armstrong]

On 9/17/26 18:43, Alexey Minnekhanov wrote:
> Add support for 3 panels used in 2 Xiaomi smartphones, all based on
> Qualcomm SDM636/660 SoC:
> 
> * Shenchao panel used in Xiaomi Redmi Note 7 (xiaomi-lavender), the
>    exact model string is unknown
> * Tianma TL063FVMC43-02  for Xiaomi Redmi Note 6 Pro (xiaomi-tulip)
> * Tianma TL063FVMCA01-00 for Xiaomi Redmi Note 7 (xiaomi-lavender)
> 
> They all are DSI video mode panels using Novatek NT36672A controller,
> so they can share almost exactly the same init/off sequences with
> minimal differences between variants. This allows to avoid a lot of
> code duplication.
> 
> Co-developed-by: Richard Acayan <mailingradian@gmail.com>
> Signed-off-by: Richard Acayan <mailingradian@gmail.com>
> Signed-off-by: Alexey Minnekhanov <alexeymin@minlexx.ru>
> 
> ---
> v2: sort compatible strings alphabetically in of_device_id
> ---
>   drivers/gpu/drm/panel/panel-novatek-nt36672a.c | 166 +++++++++++++++++++++++++
>   1 file changed, 166 insertions(+)
> 
> diff --git a/drivers/gpu/drm/panel/panel-novatek-nt36672a.c b/drivers/gpu/drm/panel/panel-novatek-nt36672a.c
> index a445c8067aa5f..d356348d39608 100644
> --- a/drivers/gpu/drm/panel/panel-novatek-nt36672a.c
> +++ b/drivers/gpu/drm/panel/panel-novatek-nt36672a.c
> @@ -357,6 +357,90 @@ static void tianma_fhd_video_send_deinit_cmds(struct mipi_dsi_multi_context *dsi
>   	msleep(60); /* 0x3C = 60ms delay */
>   }
>   
> +static void lavender_tulip_init_cmds(struct mipi_dsi_multi_context *dsi_ctx)
> +{
> +	/*
> +	 * This function supports 3 similar panels with minimal differences
> +	 * in their init sequences. We assume base to be lavender-tianma
> +	 * panel, and 2 variations (lavender-shenchao and tulip) are handled as
> +	 * differences to base.
> +	 */
> +	const struct device_node *node = dev_of_node(&dsi_ctx->dsi->dev);
> +	bool is_shenchao = of_device_is_compatible(node, "shenchao,fhdplus-video");
> +	bool is_tulip = of_device_is_compatible(node, "tianma,tl063fvmc43-02");
> +
> +	dsi_ctx->dsi->mode_flags |= MIPI_DSI_MODE_LPM;
> +
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x25);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xfb, 0x01);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x18, 0x96);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x05, 0x04);
> +
> +	if (is_shenchao)
> +		mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x27);
> +	else
> +		mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x20);
> +
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xfb, 0x01);
> +
> +	if (is_shenchao)
> +		mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xd9, 0x10);
> +	else
> +		mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x78, 0x01);
> +
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x24);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xfb, 0x01);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x82, 0x13);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x84, 0x31);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x88, 0x13);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x8a, 0x31);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x8e, 0xe4);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x8f, 0x01);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x90, 0x80);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x26);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xfb, 0x01);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xa9, 0x12);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xaa, 0x10);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xae, 0x8a);
> +
> +	if (is_shenchao)
> +		mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x1c, 0xfa);
> +
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x10);
> +
> +	if (is_shenchao)
> +		mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb0, 0x01);
> +
> +	mipi_dsi_dcs_exit_sleep_mode_multi(dsi_ctx);
> +	mipi_dsi_msleep(dsi_ctx, 80);
> +
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb0, 0x01);
> +	mipi_dsi_dcs_set_tear_on_multi(dsi_ctx, MIPI_DSI_DCS_TEAR_MODE_VBLANK);
> +
> +	if (is_tulip) {
> +		mipi_dsi_dcs_set_display_brightness_multi(dsi_ctx, 0x00ff);
> +	} else {
> +		/* lavender tianma + shenchao specific part */
> +		mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x68, 0x03, 0x04);
> +		mipi_dsi_dcs_set_display_brightness_multi(dsi_ctx, 0x00b8);
> +	}
> +
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, MIPI_DCS_WRITE_CONTROL_DISPLAY, 0x2c);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, MIPI_DCS_WRITE_POWER_SAVE, 0x00);
> +
> +	mipi_dsi_dcs_set_display_on_multi(dsi_ctx);
> +}
> +
> +static void lavender_tulip_deinit_cmds(struct mipi_dsi_multi_context *dsi_ctx)
> +{
> +	dsi_ctx->dsi->mode_flags &= ~MIPI_DSI_MODE_LPM;
> +
> +	mipi_dsi_dcs_set_display_off_multi(dsi_ctx);
> +	mipi_dsi_msleep(dsi_ctx, 20);
> +	mipi_dsi_dcs_enter_sleep_mode_multi(dsi_ctx);
> +	mipi_dsi_msleep(dsi_ctx, 120);
> +}
> +
>   static const struct drm_display_mode tianma_fhd_video_panel_default_mode = {
>   	.clock		= 161331,
>   
> @@ -389,6 +473,85 @@ static const struct nt36672a_panel_desc tianma_fhd_video_panel_desc = {
>   	.send_deinit_cmds = tianma_fhd_video_send_deinit_cmds,
>   };
>   
> +/* common for both lavender-tianma and lavender-shenchao panels */
> +static const struct drm_display_mode lavender_panel_default_mode = {
> +	.clock		= (1080 + 90 + 2 + 120) * (2340 + 10 + 3 + 8) * 60 / 1000,
> +
> +	.hdisplay	= 1080,
> +	.hsync_start	= 1080 + 90,
> +	.hsync_end	= 1080 + 90 + 2,
> +	.htotal		= 1080 + 90 + 2 + 120,
> +
> +	.vdisplay	= 2340,
> +	.vsync_start	= 2340 + 10,
> +	.vsync_end	= 2340 + 10 + 3,
> +	.vtotal		= 2340 + 10 + 3 + 8,
> +
> +	.type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
> +};
> +
> +static const struct nt36672a_panel_desc shenchao_lavender_panel_desc = {
> +	.display_mode = &lavender_panel_default_mode,
> +
> +	.width_mm = 67,
> +	.height_mm = 145,
> +
> +	.mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
> +			MIPI_DSI_CLOCK_NON_CONTINUOUS,
> +	.format = MIPI_DSI_FMT_RGB888,
> +	.lanes = 4,
> +	.send_init_cmds = lavender_tulip_init_cmds,
> +	.send_deinit_cmds = lavender_tulip_deinit_cmds,
> +};
> +
> +static const struct nt36672a_panel_desc tianma_lavender_panel_desc = {
> +	.display_mode = &lavender_panel_default_mode,
> +
> +	.width_mm = 67,
> +	.height_mm = 145,
> +
> +	.mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
> +			MIPI_DSI_CLOCK_NON_CONTINUOUS,
> +	.format = MIPI_DSI_FMT_RGB888,
> +	.lanes = 4,
> +	.send_init_cmds = lavender_tulip_init_cmds,
> +	.send_deinit_cmds = lavender_tulip_deinit_cmds,
> +};
> +
> +static const struct drm_display_mode tianmaplus_e7t_tulip_mode = {
> +	.clock		= (1080 + 100 + 28 + 120) * (2280 + 10 + 3 + 8) * 60 / 1000,
> +
> +	.hdisplay	= 1080,
> +	.hsync_start	= 1080 + 100,
> +	.hsync_end	= 1080 + 100 + 28,
> +	.htotal		= 1080 + 100 + 28 + 120,
> +
> +	.vdisplay	= 2280,
> +	.vsync_start	= 2280 + 10,
> +	.vsync_end	= 2280 + 10 + 3,
> +	.vtotal		= 2280 + 10 + 3 + 8,
> +
> +	.width_mm = 68,
> +	.height_mm = 143,
> +
> +	.type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
> +};
> +
> +static const struct nt36672a_panel_desc tianmaplus_e7t_tulip_panel_desc = {
> +	.display_mode = &tianmaplus_e7t_tulip_mode,
> +
> +	.width_mm = 68,
> +	.height_mm = 143,
> +
> +	.mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
> +			MIPI_DSI_CLOCK_NON_CONTINUOUS,
> +	.format = MIPI_DSI_FMT_RGB888,
> +	.lanes = 4,
> +	/* tulip panel uses almost the same init/deinit sequences as lavender */
> +	.send_init_cmds = lavender_tulip_init_cmds,
> +	.send_deinit_cmds = lavender_tulip_deinit_cmds,
> +};
> +
>   static int nt36672a_panel_add(struct nt36672a_panel *pinfo)
>   {
>   	struct device *dev = &pinfo->link->dev;
> @@ -465,7 +628,10 @@ static void nt36672a_panel_remove(struct mipi_dsi_device *dsi)
>   }
>   
>   static const struct of_device_id panel_nt36672a_match[] = {
> +	{ .compatible = "shenchao,fhdplus-video", .data = &shenchao_lavender_panel_desc },
>   	{ .compatible = "tianma,fhd-video", .data = &tianma_fhd_video_panel_desc },
> +	{ .compatible = "tianma,tl063fvmc43-02", .data = &tianmaplus_e7t_tulip_panel_desc },
> +	{ .compatible = "tianma,tl063fvmca01-00", .data = &tianma_lavender_panel_desc },
>   	{ },
>   };
>   MODULE_DEVICE_TABLE(of, panel_nt36672a_match);
> 

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>

Thanks,
Neil

[PATCH v2 7/9] drm/panel: novatek-nt36672a: Add Tianma panel for Xiaomi Mi A2

[Alexey Minnekhanov]

Add support for Tianma TL060FVXS16-00 video mode panel based on
Novatek NT36672A, used in Xiaomi Mi A2 smartphone (xiaomi-jasmine).
It shares some code with already supported panel in this driver
for xiaomi-lavender, so we can reuse the same panel deinit function.

Signed-off-by: Alexey Minnekhanov <alexeymin@minlexx.ru>

---
v2: use mipi_dsi_usleep_range() instead of usleep_range()
---
 drivers/gpu/drm/panel/panel-novatek-nt36672a.c | 57 ++++++++++++++++++++++++++
 1 file changed, 57 insertions(+)

diff --git a/drivers/gpu/drm/panel/panel-novatek-nt36672a.c b/drivers/gpu/drm/panel/panel-novatek-nt36672a.c
index d356348d39608..48dff2279b0e9 100644
--- a/drivers/gpu/drm/panel/panel-novatek-nt36672a.c
+++ b/drivers/gpu/drm/panel/panel-novatek-nt36672a.c
@@ -441,6 +441,29 @@ static void lavender_tulip_deinit_cmds(struct mipi_dsi_multi_context *dsi_ctx)
 	mipi_dsi_msleep(dsi_ctx, 120);
 }
 
+static void tianma_jasmine_init_cmds(struct mipi_dsi_multi_context *dsi_ctx)
+{
+	dsi_ctx->dsi->mode_flags |= MIPI_DSI_MODE_LPM;
+
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x20);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xfb, 0x01);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, MIPI_DCS_SET_PARTIAL_ROWS, 0x10);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, MIPI_DCS_SET_PARTIAL_COLUMNS, 0x50);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x32, 0x2f);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x10);
+
+	mipi_dsi_dcs_exit_sleep_mode_multi(dsi_ctx);
+	mipi_dsi_msleep(dsi_ctx, 70);
+
+	mipi_dsi_dcs_set_display_brightness_multi(dsi_ctx, 0x00ff);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x68, 0x03, 0x04);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, MIPI_DCS_WRITE_CONTROL_DISPLAY, 0x2c);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, MIPI_DCS_WRITE_POWER_SAVE, 0x00);
+
+	mipi_dsi_dcs_set_display_on_multi(dsi_ctx);
+	mipi_dsi_usleep_range(dsi_ctx, 5000, 6000);
+}
+
 static const struct drm_display_mode tianma_fhd_video_panel_default_mode = {
 	.clock		= 161331,
 
@@ -552,6 +575,39 @@ static const struct nt36672a_panel_desc tianmaplus_e7t_tulip_panel_desc = {
 	.send_deinit_cmds = lavender_tulip_deinit_cmds,
 };
 
+static const struct drm_display_mode tianma_jasmine_panel_default_mode = {
+	.clock		= (1080 + 96 + 4 + 56) * (2160 + 4 + 2 + 33) * 60 / 1000,
+
+	.hdisplay	= 1080,
+	.hsync_start	= 1080 + 96,
+	.hsync_end	= 1080 + 96 + 4,
+	.htotal		= 1080 + 96 + 4 + 56,
+
+	.vdisplay	= 2160,
+	.vsync_start	= 2160 + 4,
+	.vsync_end	= 2160 + 4 + 2,
+	.vtotal		= 2160 + 4 + 2 + 33,
+
+	.width_mm = 68,
+	.height_mm = 136,
+	.type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
+};
+
+static const struct nt36672a_panel_desc tianma_jasmine_panel_desc = {
+	.display_mode = &tianma_jasmine_panel_default_mode,
+
+	.width_mm = 68,
+	.height_mm = 136,
+
+	.mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
+			MIPI_DSI_CLOCK_NON_CONTINUOUS,
+	.format = MIPI_DSI_FMT_RGB888,
+	.lanes = 4,
+	.send_init_cmds = tianma_jasmine_init_cmds,
+	/* jasmine panel uses the same deinit sequence as lavender/tulip */
+	.send_deinit_cmds = lavender_tulip_deinit_cmds,
+};
+
 static int nt36672a_panel_add(struct nt36672a_panel *pinfo)
 {
 	struct device *dev = &pinfo->link->dev;
@@ -630,6 +686,7 @@ static void nt36672a_panel_remove(struct mipi_dsi_device *dsi)
 static const struct of_device_id panel_nt36672a_match[] = {
 	{ .compatible = "shenchao,fhdplus-video", .data = &shenchao_lavender_panel_desc },
 	{ .compatible = "tianma,fhd-video", .data = &tianma_fhd_video_panel_desc },
+	{ .compatible = "tianma,tl060fvxs16-00", .data = &tianma_jasmine_panel_desc },
 	{ .compatible = "tianma,tl063fvmc43-02", .data = &tianmaplus_e7t_tulip_panel_desc },
 	{ .compatible = "tianma,tl063fvmca01-00", .data = &tianma_lavender_panel_desc },
 	{ },

-- 
2.55.0

Re: [PATCH v2 7/9] drm/panel: novatek-nt36672a: Add Tianma panel for Xiaomi Mi A2

[Neil Armstrong]

On 9/17/26 18:43, Alexey Minnekhanov wrote:
> Add support for Tianma TL060FVXS16-00 video mode panel based on
> Novatek NT36672A, used in Xiaomi Mi A2 smartphone (xiaomi-jasmine).
> It shares some code with already supported panel in this driver
> for xiaomi-lavender, so we can reuse the same panel deinit function.
> 
> Signed-off-by: Alexey Minnekhanov <alexeymin@minlexx.ru>
> 
> ---
> v2: use mipi_dsi_usleep_range() instead of usleep_range()
> ---
>   drivers/gpu/drm/panel/panel-novatek-nt36672a.c | 57 ++++++++++++++++++++++++++
>   1 file changed, 57 insertions(+)
> 
> diff --git a/drivers/gpu/drm/panel/panel-novatek-nt36672a.c b/drivers/gpu/drm/panel/panel-novatek-nt36672a.c
> index d356348d39608..48dff2279b0e9 100644
> --- a/drivers/gpu/drm/panel/panel-novatek-nt36672a.c
> +++ b/drivers/gpu/drm/panel/panel-novatek-nt36672a.c
> @@ -441,6 +441,29 @@ static void lavender_tulip_deinit_cmds(struct mipi_dsi_multi_context *dsi_ctx)
>   	mipi_dsi_msleep(dsi_ctx, 120);
>   }
>   
> +static void tianma_jasmine_init_cmds(struct mipi_dsi_multi_context *dsi_ctx)
> +{
> +	dsi_ctx->dsi->mode_flags |= MIPI_DSI_MODE_LPM;
> +
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x20);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xfb, 0x01);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, MIPI_DCS_SET_PARTIAL_ROWS, 0x10);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, MIPI_DCS_SET_PARTIAL_COLUMNS, 0x50);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x32, 0x2f);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x10);
> +
> +	mipi_dsi_dcs_exit_sleep_mode_multi(dsi_ctx);
> +	mipi_dsi_msleep(dsi_ctx, 70);
> +
> +	mipi_dsi_dcs_set_display_brightness_multi(dsi_ctx, 0x00ff);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x68, 0x03, 0x04);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, MIPI_DCS_WRITE_CONTROL_DISPLAY, 0x2c);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, MIPI_DCS_WRITE_POWER_SAVE, 0x00);
> +
> +	mipi_dsi_dcs_set_display_on_multi(dsi_ctx);
> +	mipi_dsi_usleep_range(dsi_ctx, 5000, 6000);
> +}
> +
>   static const struct drm_display_mode tianma_fhd_video_panel_default_mode = {
>   	.clock		= 161331,
>   
> @@ -552,6 +575,39 @@ static const struct nt36672a_panel_desc tianmaplus_e7t_tulip_panel_desc = {
>   	.send_deinit_cmds = lavender_tulip_deinit_cmds,
>   };
>   
> +static const struct drm_display_mode tianma_jasmine_panel_default_mode = {
> +	.clock		= (1080 + 96 + 4 + 56) * (2160 + 4 + 2 + 33) * 60 / 1000,
> +
> +	.hdisplay	= 1080,
> +	.hsync_start	= 1080 + 96,
> +	.hsync_end	= 1080 + 96 + 4,
> +	.htotal		= 1080 + 96 + 4 + 56,
> +
> +	.vdisplay	= 2160,
> +	.vsync_start	= 2160 + 4,
> +	.vsync_end	= 2160 + 4 + 2,
> +	.vtotal		= 2160 + 4 + 2 + 33,
> +
> +	.width_mm = 68,
> +	.height_mm = 136,
> +	.type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
> +};
> +
> +static const struct nt36672a_panel_desc tianma_jasmine_panel_desc = {
> +	.display_mode = &tianma_jasmine_panel_default_mode,
> +
> +	.width_mm = 68,
> +	.height_mm = 136,
> +
> +	.mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
> +			MIPI_DSI_CLOCK_NON_CONTINUOUS,
> +	.format = MIPI_DSI_FMT_RGB888,
> +	.lanes = 4,
> +	.send_init_cmds = tianma_jasmine_init_cmds,
> +	/* jasmine panel uses the same deinit sequence as lavender/tulip */
> +	.send_deinit_cmds = lavender_tulip_deinit_cmds,
> +};
> +
>   static int nt36672a_panel_add(struct nt36672a_panel *pinfo)
>   {
>   	struct device *dev = &pinfo->link->dev;
> @@ -630,6 +686,7 @@ static void nt36672a_panel_remove(struct mipi_dsi_device *dsi)
>   static const struct of_device_id panel_nt36672a_match[] = {
>   	{ .compatible = "shenchao,fhdplus-video", .data = &shenchao_lavender_panel_desc },
>   	{ .compatible = "tianma,fhd-video", .data = &tianma_fhd_video_panel_desc },
> +	{ .compatible = "tianma,tl060fvxs16-00", .data = &tianma_jasmine_panel_desc },
>   	{ .compatible = "tianma,tl063fvmc43-02", .data = &tianmaplus_e7t_tulip_panel_desc },
>   	{ .compatible = "tianma,tl063fvmca01-00", .data = &tianma_lavender_panel_desc },
>   	{ },
> 

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>

Thanks,
Neil

[PATCH v2 8/9] drm/panel: novatek-nt36672a: Add panel for Asus Zenfone Max Pro M1

[Alexey Minnekhanov]

Add support for TXD TXDI600YANPA-43V3 video mode panel based on
Novatek NT36672A, used in Asus Zenfone Max Pro M1 smartphone
(asus-x00td).

Co-developed-by: Aboothahir U <aboothahirpkd@gmail.com>
Signed-off-by: Aboothahir U <aboothahirpkd@gmail.com>
Signed-off-by: Alexey Minnekhanov <alexeymin@minlexx.ru>

---
v2:
 * change compatible prefix "txd" -> "txdkj"
 * use co-author's real name in trailers
---
 drivers/gpu/drm/panel/panel-novatek-nt36672a.c | 281 +++++++++++++++++++++++++
 1 file changed, 281 insertions(+)

diff --git a/drivers/gpu/drm/panel/panel-novatek-nt36672a.c b/drivers/gpu/drm/panel/panel-novatek-nt36672a.c
index 48dff2279b0e9..7d7c79d2502d2 100644
--- a/drivers/gpu/drm/panel/panel-novatek-nt36672a.c
+++ b/drivers/gpu/drm/panel/panel-novatek-nt36672a.c
@@ -464,6 +464,252 @@ static void tianma_jasmine_init_cmds(struct mipi_dsi_multi_context *dsi_ctx)
 	mipi_dsi_usleep_range(dsi_ctx, 5000, 6000);
 }
 
+static void txd_x00td_init_cmds(struct mipi_dsi_multi_context *dsi_ctx)
+{
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x20);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xfb, 0x01);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x06, 0x9e);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x07, 0x94);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x0e, 0x35);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x0f, 0x24);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x6d, 0x66);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x69, 0x99);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x95, 0xf5);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x96, 0xf5);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x23);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xfb, 0x01);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x12, 0x6c);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x15, 0xe6);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x16, 0x0c);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x24);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xfb, 0x01);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x00, 0x20);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x01, 0x20);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x02, 0x20);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x03, 0x01);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x04, 0x0b);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x05, 0x0c);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x06, 0xa9);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x07, 0x06);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x08, 0x04);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x09, 0x20);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x0a, 0x0f);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x0b, 0x20);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x0c, 0x20);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x0d, 0x20);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x0e, 0x20);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x0f, 0x17);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x10, 0x15);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x11, 0x13);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x12, 0x00);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x13, 0x00);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x14, 0x20);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x15, 0x01);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x16, 0x0b);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x17, 0x0c);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x18, 0xa9);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x19, 0x05);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x1a, 0x03);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x1b, 0x20);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x1c, 0x0f);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x1d, 0x20);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x1e, 0x20);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x1f, 0x20);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x20, 0x20);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x21, 0x17);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x22, 0x15);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x23, 0x13);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x2f, 0x04);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x30, 0x08);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x31, 0x04);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x32, 0x08);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x33, 0x02);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x34, 0x02);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x35, 0x00);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x37, 0x02);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x38, 0x72);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x39, 0x72);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x3b, 0x40);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x3f, 0x72);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x60, 0x10);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x61, 0x00);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x68, 0x83);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x78, 0x00);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x79, 0x00);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x7a, 0x08);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x7b, 0x9c);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x7d, 0x06);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x7e, 0x02);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x80, 0x45);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x81, 0x06);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x8e, 0xf0);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x90, 0x00);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x92, 0x76);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x93, 0x0a);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x94, 0x0a);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x99, 0x33);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x9b, 0xff);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb3, 0x00);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb4, 0x04);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb5, 0x04);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xdc, 0x00);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xdd, 0x01);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xde, 0x00);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xdf, 0x00);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xe0, 0x75);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xe9, 0x08);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xed, 0x40);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x20);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xfb, 0x01);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb0,
+				     0x00, 0x00, 0x00, 0x15, 0x00, 0x37, 0x00,
+				     0x54, 0x00, 0x6d, 0x00, 0x84, 0x00, 0x98,
+				     0x00, 0xac);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb1,
+				     0x00, 0xbd, 0x00, 0xf9, 0x01, 0x25, 0x01,
+				     0x6b, 0x01, 0x9c, 0x01, 0xec, 0x02, 0x22,
+				     0x02, 0x25);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb2,
+				     0x02, 0x5e, 0x02, 0x9e, 0x02, 0xc9, 0x02,
+				     0xfd, 0x03, 0x21, 0x03, 0x4d, 0x03, 0x5a,
+				     0x03, 0x68);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb3,
+				     0x03, 0x78, 0x03, 0x8b, 0x03, 0xa1, 0x03,
+				     0xbd, 0x03, 0xd6, 0x03, 0xda);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb4,
+				     0x00, 0x00, 0x00, 0x15, 0x00, 0x37, 0x00,
+				     0x54, 0x00, 0x6d, 0x00, 0x84, 0x00, 0x98,
+				     0x00, 0xac);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb5,
+				     0x00, 0xbd, 0x00, 0xf9, 0x01, 0x25, 0x01,
+				     0x6b, 0x01, 0x9c, 0x01, 0xec, 0x02, 0x22,
+				     0x02, 0x25);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb6,
+				     0x02, 0x5e, 0x02, 0x9e, 0x02, 0xc9, 0x02,
+				     0xfd, 0x03, 0x21, 0x03, 0x4d, 0x03, 0x5a,
+				     0x03, 0x68);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb7,
+				     0x03, 0x78, 0x03, 0x8b, 0x03, 0xa1, 0x03,
+				     0xbd, 0x03, 0xd6, 0x03, 0xda);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb8,
+				     0x00, 0x00, 0x00, 0x15, 0x00, 0x37, 0x00,
+				     0x54, 0x00, 0x6d, 0x00, 0x84, 0x00, 0x98,
+				     0x00, 0xac);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb9,
+				     0x00, 0xbd, 0x00, 0xf9, 0x01, 0x25, 0x01,
+				     0x6b, 0x01, 0x9c, 0x01, 0xec, 0x02, 0x22,
+				     0x02, 0x25);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xba,
+				     0x02, 0x5e, 0x02, 0x9e, 0x02, 0xc9, 0x02,
+				     0xfd, 0x03, 0x21, 0x03, 0x4d, 0x03, 0x5a,
+				     0x03, 0x68);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xbb,
+				     0x03, 0x78, 0x03, 0x8b, 0x03, 0xa1, 0x03,
+				     0xbd, 0x03, 0xd6, 0x03, 0xda);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x21);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xfb, 0x01);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb0,
+				     0x00, 0x00, 0x00, 0x15, 0x00, 0x37, 0x00,
+				     0x54, 0x00, 0x6d, 0x00, 0x84, 0x00, 0x98,
+				     0x00, 0xac);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb1,
+				     0x00, 0xbd, 0x00, 0xf9, 0x01, 0x25, 0x01,
+				     0x6b, 0x01, 0x9c, 0x01, 0xec, 0x02, 0x22,
+				     0x02, 0x25);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb2,
+				     0x02, 0x5e, 0x02, 0x9e, 0x02, 0xc9, 0x02,
+				     0xfd, 0x03, 0x21, 0x03, 0x4d, 0x03, 0x5a,
+				     0x03, 0x68);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb3,
+				     0x03, 0x78, 0x03, 0x8b, 0x03, 0xa1, 0x03,
+				     0xbd, 0x03, 0xd6, 0x03, 0xda);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb4,
+				     0x00, 0x00, 0x00, 0x15, 0x00, 0x37, 0x00,
+				     0x54, 0x00, 0x6d, 0x00, 0x84, 0x00, 0x98,
+				     0x00, 0xac);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb5,
+				     0x00, 0xbd, 0x00, 0xf9, 0x01, 0x25, 0x01,
+				     0x6b, 0x01, 0x9c, 0x01, 0xec, 0x02, 0x22,
+				     0x02, 0x25);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb6,
+				     0x02, 0x5e, 0x02, 0x9e, 0x02, 0xc9, 0x02,
+				     0xfd, 0x03, 0x21, 0x03, 0x4d, 0x03, 0x5a,
+				     0x03, 0x68);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb7,
+				     0x03, 0x78, 0x03, 0x8b, 0x03, 0xa1, 0x03,
+				     0xbd, 0x03, 0xd6, 0x03, 0xda);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb8,
+				     0x00, 0x00, 0x00, 0x15, 0x00, 0x37, 0x00,
+				     0x54, 0x00, 0x6d, 0x00, 0x84, 0x00, 0x98,
+				     0x00, 0xac);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb9,
+				     0x00, 0xbd, 0x00, 0xf9, 0x01, 0x25, 0x01,
+				     0x6b, 0x01, 0x9c, 0x01, 0xec, 0x02, 0x22,
+				     0x02, 0x25);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xba,
+				     0x02, 0x5e, 0x02, 0x9e, 0x02, 0xc9, 0x02,
+				     0xfd, 0x03, 0x21, 0x03, 0x4d, 0x03, 0x5a,
+				     0x03, 0x68);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xbb,
+				     0x03, 0x78, 0x03, 0x8b, 0x03, 0xa1, 0x03,
+				     0xbd, 0x03, 0xd6, 0x03, 0xda);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x25);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xfb, 0x01);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x05, 0x0c);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x0a, 0x81);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x0b, 0xd7);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x0c, 0x01);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x17, 0x82);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x21, 0x1c);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x22, 0x1c);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x24, 0x76);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x25, 0x76);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x5c, 0x25);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x5d, 0x80);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x5e, 0x80);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x5f, 0x22);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x65, 0x00);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x69, 0x60);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x6b, 0x00);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x71, 0x2d);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x80, 0x00);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x8d, 0x04);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xd7, 0x00);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xd8, 0x00);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xd9, 0x00);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xda, 0x00);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xdb, 0x00);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xdc, 0x00);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x26);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xfb, 0x01);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x06, 0xc8);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x12, 0x5a);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x19, 0x0a);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x1a, 0x97);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x1d, 0x0a);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x1e, 0x1e);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x99, 0x20);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x27);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xfb, 0x01);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x13, 0x0e);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x16, 0xb0);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x17, 0xd0);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x10);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xfb, 0x01);
+	mipi_dsi_dcs_exit_sleep_mode_multi(dsi_ctx);
+	mipi_dsi_msleep(dsi_ctx, 70);
+	mipi_dsi_dcs_set_display_on_multi(dsi_ctx);
+	mipi_dsi_usleep_range(dsi_ctx, 10000, 11000);
+}
+
+static void txd_x00td_deinit_cmds(struct mipi_dsi_multi_context *dsi_ctx)
+{
+	mipi_dsi_dcs_set_display_off_multi(dsi_ctx);
+	mipi_dsi_msleep(dsi_ctx, 50);
+	mipi_dsi_dcs_enter_sleep_mode_multi(dsi_ctx);
+	mipi_dsi_msleep(dsi_ctx, 120);
+}
+
 static const struct drm_display_mode tianma_fhd_video_panel_default_mode = {
 	.clock		= 161331,
 
@@ -608,6 +854,40 @@ static const struct nt36672a_panel_desc tianma_jasmine_panel_desc = {
 	.send_deinit_cmds = lavender_tulip_deinit_cmds,
 };
 
+static const struct drm_display_mode txd_x00td_mode = {
+	.clock		= (1080 + 122 + 8 + 76) * (2160 + 20 + 4 + 28) * 60 / 1000,
+
+	.hdisplay	= 1080,
+	.hsync_start	= 1080 + 122,
+	.hsync_end	= 1080 + 122 + 8,
+	.htotal		= 1080 + 122 + 8 + 76,
+
+	.vdisplay	= 2160,
+	.vsync_start	= 2160 + 20,
+	.vsync_end	= 2160 + 20 + 4,
+	.vtotal		= 2160 + 20 + 4 + 28,
+
+	.width_mm	= 68,
+	.height_mm	= 136,
+
+	.type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
+};
+
+static const struct nt36672a_panel_desc txd_x00td_panel_desc = {
+	.display_mode = &txd_x00td_mode,
+
+	.width_mm = 68,
+	.height_mm = 136,
+
+	.mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
+			  MIPI_DSI_MODE_VIDEO_HSE | MIPI_DSI_MODE_NO_EOT_PACKET |
+			  MIPI_DSI_CLOCK_NON_CONTINUOUS | MIPI_DSI_MODE_LPM,
+	.format = MIPI_DSI_FMT_RGB888,
+	.lanes = 4,
+	.send_init_cmds = txd_x00td_init_cmds,
+	.send_deinit_cmds = txd_x00td_deinit_cmds,
+};
+
 static int nt36672a_panel_add(struct nt36672a_panel *pinfo)
 {
 	struct device *dev = &pinfo->link->dev;
@@ -689,6 +969,7 @@ static const struct of_device_id panel_nt36672a_match[] = {
 	{ .compatible = "tianma,tl060fvxs16-00", .data = &tianma_jasmine_panel_desc },
 	{ .compatible = "tianma,tl063fvmc43-02", .data = &tianmaplus_e7t_tulip_panel_desc },
 	{ .compatible = "tianma,tl063fvmca01-00", .data = &tianma_lavender_panel_desc },
+	{ .compatible = "txdkj,txdi600yanpa-43v3", .data = &txd_x00td_panel_desc },
 	{ },
 };
 MODULE_DEVICE_TABLE(of, panel_nt36672a_match);

-- 
2.55.0

Re: [PATCH v2 8/9] drm/panel: novatek-nt36672a: Add panel for Asus Zenfone Max Pro M1

[Neil Armstrong]

On 9/17/26 18:43, Alexey Minnekhanov wrote:
> Add support for TXD TXDI600YANPA-43V3 video mode panel based on
> Novatek NT36672A, used in Asus Zenfone Max Pro M1 smartphone
> (asus-x00td).
> 
> Co-developed-by: Aboothahir U <aboothahirpkd@gmail.com>
> Signed-off-by: Aboothahir U <aboothahirpkd@gmail.com>
> Signed-off-by: Alexey Minnekhanov <alexeymin@minlexx.ru>
> 
> ---
> v2:
>   * change compatible prefix "txd" -> "txdkj"
>   * use co-author's real name in trailers
> ---
>   drivers/gpu/drm/panel/panel-novatek-nt36672a.c | 281 +++++++++++++++++++++++++
>   1 file changed, 281 insertions(+)
> 
> diff --git a/drivers/gpu/drm/panel/panel-novatek-nt36672a.c b/drivers/gpu/drm/panel/panel-novatek-nt36672a.c
> index 48dff2279b0e9..7d7c79d2502d2 100644
> --- a/drivers/gpu/drm/panel/panel-novatek-nt36672a.c
> +++ b/drivers/gpu/drm/panel/panel-novatek-nt36672a.c
> @@ -464,6 +464,252 @@ static void tianma_jasmine_init_cmds(struct mipi_dsi_multi_context *dsi_ctx)
>   	mipi_dsi_usleep_range(dsi_ctx, 5000, 6000);
>   }
>   
> +static void txd_x00td_init_cmds(struct mipi_dsi_multi_context *dsi_ctx)
> +{
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x20);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xfb, 0x01);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x06, 0x9e);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x07, 0x94);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x0e, 0x35);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x0f, 0x24);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x6d, 0x66);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x69, 0x99);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x95, 0xf5);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x96, 0xf5);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x23);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xfb, 0x01);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x12, 0x6c);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x15, 0xe6);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x16, 0x0c);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x24);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xfb, 0x01);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x00, 0x20);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x01, 0x20);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x02, 0x20);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x03, 0x01);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x04, 0x0b);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x05, 0x0c);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x06, 0xa9);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x07, 0x06);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x08, 0x04);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x09, 0x20);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x0a, 0x0f);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x0b, 0x20);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x0c, 0x20);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x0d, 0x20);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x0e, 0x20);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x0f, 0x17);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x10, 0x15);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x11, 0x13);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x12, 0x00);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x13, 0x00);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x14, 0x20);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x15, 0x01);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x16, 0x0b);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x17, 0x0c);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x18, 0xa9);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x19, 0x05);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x1a, 0x03);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x1b, 0x20);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x1c, 0x0f);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x1d, 0x20);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x1e, 0x20);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x1f, 0x20);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x20, 0x20);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x21, 0x17);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x22, 0x15);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x23, 0x13);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x2f, 0x04);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x30, 0x08);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x31, 0x04);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x32, 0x08);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x33, 0x02);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x34, 0x02);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x35, 0x00);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x37, 0x02);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x38, 0x72);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x39, 0x72);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x3b, 0x40);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x3f, 0x72);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x60, 0x10);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x61, 0x00);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x68, 0x83);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x78, 0x00);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x79, 0x00);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x7a, 0x08);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x7b, 0x9c);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x7d, 0x06);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x7e, 0x02);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x80, 0x45);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x81, 0x06);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x8e, 0xf0);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x90, 0x00);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x92, 0x76);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x93, 0x0a);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x94, 0x0a);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x99, 0x33);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x9b, 0xff);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb3, 0x00);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb4, 0x04);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb5, 0x04);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xdc, 0x00);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xdd, 0x01);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xde, 0x00);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xdf, 0x00);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xe0, 0x75);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xe9, 0x08);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xed, 0x40);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x20);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xfb, 0x01);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb0,
> +				     0x00, 0x00, 0x00, 0x15, 0x00, 0x37, 0x00,
> +				     0x54, 0x00, 0x6d, 0x00, 0x84, 0x00, 0x98,
> +				     0x00, 0xac);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb1,
> +				     0x00, 0xbd, 0x00, 0xf9, 0x01, 0x25, 0x01,
> +				     0x6b, 0x01, 0x9c, 0x01, 0xec, 0x02, 0x22,
> +				     0x02, 0x25);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb2,
> +				     0x02, 0x5e, 0x02, 0x9e, 0x02, 0xc9, 0x02,
> +				     0xfd, 0x03, 0x21, 0x03, 0x4d, 0x03, 0x5a,
> +				     0x03, 0x68);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb3,
> +				     0x03, 0x78, 0x03, 0x8b, 0x03, 0xa1, 0x03,
> +				     0xbd, 0x03, 0xd6, 0x03, 0xda);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb4,
> +				     0x00, 0x00, 0x00, 0x15, 0x00, 0x37, 0x00,
> +				     0x54, 0x00, 0x6d, 0x00, 0x84, 0x00, 0x98,
> +				     0x00, 0xac);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb5,
> +				     0x00, 0xbd, 0x00, 0xf9, 0x01, 0x25, 0x01,
> +				     0x6b, 0x01, 0x9c, 0x01, 0xec, 0x02, 0x22,
> +				     0x02, 0x25);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb6,
> +				     0x02, 0x5e, 0x02, 0x9e, 0x02, 0xc9, 0x02,
> +				     0xfd, 0x03, 0x21, 0x03, 0x4d, 0x03, 0x5a,
> +				     0x03, 0x68);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb7,
> +				     0x03, 0x78, 0x03, 0x8b, 0x03, 0xa1, 0x03,
> +				     0xbd, 0x03, 0xd6, 0x03, 0xda);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb8,
> +				     0x00, 0x00, 0x00, 0x15, 0x00, 0x37, 0x00,
> +				     0x54, 0x00, 0x6d, 0x00, 0x84, 0x00, 0x98,
> +				     0x00, 0xac);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb9,
> +				     0x00, 0xbd, 0x00, 0xf9, 0x01, 0x25, 0x01,
> +				     0x6b, 0x01, 0x9c, 0x01, 0xec, 0x02, 0x22,
> +				     0x02, 0x25);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xba,
> +				     0x02, 0x5e, 0x02, 0x9e, 0x02, 0xc9, 0x02,
> +				     0xfd, 0x03, 0x21, 0x03, 0x4d, 0x03, 0x5a,
> +				     0x03, 0x68);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xbb,
> +				     0x03, 0x78, 0x03, 0x8b, 0x03, 0xa1, 0x03,
> +				     0xbd, 0x03, 0xd6, 0x03, 0xda);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x21);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xfb, 0x01);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb0,
> +				     0x00, 0x00, 0x00, 0x15, 0x00, 0x37, 0x00,
> +				     0x54, 0x00, 0x6d, 0x00, 0x84, 0x00, 0x98,
> +				     0x00, 0xac);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb1,
> +				     0x00, 0xbd, 0x00, 0xf9, 0x01, 0x25, 0x01,
> +				     0x6b, 0x01, 0x9c, 0x01, 0xec, 0x02, 0x22,
> +				     0x02, 0x25);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb2,
> +				     0x02, 0x5e, 0x02, 0x9e, 0x02, 0xc9, 0x02,
> +				     0xfd, 0x03, 0x21, 0x03, 0x4d, 0x03, 0x5a,
> +				     0x03, 0x68);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb3,
> +				     0x03, 0x78, 0x03, 0x8b, 0x03, 0xa1, 0x03,
> +				     0xbd, 0x03, 0xd6, 0x03, 0xda);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb4,
> +				     0x00, 0x00, 0x00, 0x15, 0x00, 0x37, 0x00,
> +				     0x54, 0x00, 0x6d, 0x00, 0x84, 0x00, 0x98,
> +				     0x00, 0xac);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb5,
> +				     0x00, 0xbd, 0x00, 0xf9, 0x01, 0x25, 0x01,
> +				     0x6b, 0x01, 0x9c, 0x01, 0xec, 0x02, 0x22,
> +				     0x02, 0x25);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb6,
> +				     0x02, 0x5e, 0x02, 0x9e, 0x02, 0xc9, 0x02,
> +				     0xfd, 0x03, 0x21, 0x03, 0x4d, 0x03, 0x5a,
> +				     0x03, 0x68);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb7,
> +				     0x03, 0x78, 0x03, 0x8b, 0x03, 0xa1, 0x03,
> +				     0xbd, 0x03, 0xd6, 0x03, 0xda);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb8,
> +				     0x00, 0x00, 0x00, 0x15, 0x00, 0x37, 0x00,
> +				     0x54, 0x00, 0x6d, 0x00, 0x84, 0x00, 0x98,
> +				     0x00, 0xac);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb9,
> +				     0x00, 0xbd, 0x00, 0xf9, 0x01, 0x25, 0x01,
> +				     0x6b, 0x01, 0x9c, 0x01, 0xec, 0x02, 0x22,
> +				     0x02, 0x25);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xba,
> +				     0x02, 0x5e, 0x02, 0x9e, 0x02, 0xc9, 0x02,
> +				     0xfd, 0x03, 0x21, 0x03, 0x4d, 0x03, 0x5a,
> +				     0x03, 0x68);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xbb,
> +				     0x03, 0x78, 0x03, 0x8b, 0x03, 0xa1, 0x03,
> +				     0xbd, 0x03, 0xd6, 0x03, 0xda);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x25);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xfb, 0x01);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x05, 0x0c);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x0a, 0x81);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x0b, 0xd7);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x0c, 0x01);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x17, 0x82);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x21, 0x1c);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x22, 0x1c);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x24, 0x76);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x25, 0x76);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x5c, 0x25);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x5d, 0x80);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x5e, 0x80);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x5f, 0x22);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x65, 0x00);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x69, 0x60);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x6b, 0x00);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x71, 0x2d);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x80, 0x00);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x8d, 0x04);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xd7, 0x00);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xd8, 0x00);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xd9, 0x00);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xda, 0x00);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xdb, 0x00);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xdc, 0x00);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x26);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xfb, 0x01);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x06, 0xc8);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x12, 0x5a);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x19, 0x0a);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x1a, 0x97);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x1d, 0x0a);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x1e, 0x1e);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x99, 0x20);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x27);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xfb, 0x01);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x13, 0x0e);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x16, 0xb0);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x17, 0xd0);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x10);
> +	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xfb, 0x01);
> +	mipi_dsi_dcs_exit_sleep_mode_multi(dsi_ctx);
> +	mipi_dsi_msleep(dsi_ctx, 70);
> +	mipi_dsi_dcs_set_display_on_multi(dsi_ctx);
> +	mipi_dsi_usleep_range(dsi_ctx, 10000, 11000);
> +}
> +
> +static void txd_x00td_deinit_cmds(struct mipi_dsi_multi_context *dsi_ctx)
> +{
> +	mipi_dsi_dcs_set_display_off_multi(dsi_ctx);
> +	mipi_dsi_msleep(dsi_ctx, 50);
> +	mipi_dsi_dcs_enter_sleep_mode_multi(dsi_ctx);
> +	mipi_dsi_msleep(dsi_ctx, 120);
> +}
> +
>   static const struct drm_display_mode tianma_fhd_video_panel_default_mode = {
>   	.clock		= 161331,
>   
> @@ -608,6 +854,40 @@ static const struct nt36672a_panel_desc tianma_jasmine_panel_desc = {
>   	.send_deinit_cmds = lavender_tulip_deinit_cmds,
>   };
>   
> +static const struct drm_display_mode txd_x00td_mode = {
> +	.clock		= (1080 + 122 + 8 + 76) * (2160 + 20 + 4 + 28) * 60 / 1000,
> +
> +	.hdisplay	= 1080,
> +	.hsync_start	= 1080 + 122,
> +	.hsync_end	= 1080 + 122 + 8,
> +	.htotal		= 1080 + 122 + 8 + 76,
> +
> +	.vdisplay	= 2160,
> +	.vsync_start	= 2160 + 20,
> +	.vsync_end	= 2160 + 20 + 4,
> +	.vtotal		= 2160 + 20 + 4 + 28,
> +
> +	.width_mm	= 68,
> +	.height_mm	= 136,
> +
> +	.type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
> +};
> +
> +static const struct nt36672a_panel_desc txd_x00td_panel_desc = {
> +	.display_mode = &txd_x00td_mode,
> +
> +	.width_mm = 68,
> +	.height_mm = 136,
> +
> +	.mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
> +			  MIPI_DSI_MODE_VIDEO_HSE | MIPI_DSI_MODE_NO_EOT_PACKET |
> +			  MIPI_DSI_CLOCK_NON_CONTINUOUS | MIPI_DSI_MODE_LPM,
> +	.format = MIPI_DSI_FMT_RGB888,
> +	.lanes = 4,
> +	.send_init_cmds = txd_x00td_init_cmds,
> +	.send_deinit_cmds = txd_x00td_deinit_cmds,
> +};
> +
>   static int nt36672a_panel_add(struct nt36672a_panel *pinfo)
>   {
>   	struct device *dev = &pinfo->link->dev;
> @@ -689,6 +969,7 @@ static const struct of_device_id panel_nt36672a_match[] = {
>   	{ .compatible = "tianma,tl060fvxs16-00", .data = &tianma_jasmine_panel_desc },
>   	{ .compatible = "tianma,tl063fvmc43-02", .data = &tianmaplus_e7t_tulip_panel_desc },
>   	{ .compatible = "tianma,tl063fvmca01-00", .data = &tianma_lavender_panel_desc },
> +	{ .compatible = "txdkj,txdi600yanpa-43v3", .data = &txd_x00td_panel_desc },
>   	{ },
>   };
>   MODULE_DEVICE_TABLE(of, panel_nt36672a_match);
> 

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>

Thanks,
Neil

[PATCH v2 9/9] MAINTAINERS: Add Alexey Minnekhanov as maintainer for NT36672A panel

[Alexey Minnekhanov]

List myself as maintainer of Novatek NT36672A panels driver
to keep a close eye on it.

Signed-off-by: Alexey Minnekhanov <alexeymin@minlexx.ru>
---
 MAINTAINERS | 1 +
 1 file changed, 1 insertion(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 6e50747a621c2..80a065264aa86 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -8393,6 +8393,7 @@ F:	drivers/gpu/drm/panel/panel-novatek-nt36532.c
 
 DRM DRIVER FOR NOVATEK NT36672A PANELS
 M:	Sumit Semwal <sumit.semwal@linaro.org>
+M:	Alexey Minnekhanov <alexeymin@minlexx.ru>
 S:	Maintained
 T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git
 F:	Documentation/devicetree/bindings/display/panel/novatek,nt36672a.yaml

-- 
2.55.0