From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
To: Xilin Wu <sophon@radxa.com>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>
Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2] arm64: dts: qcom: sc8280xp: add missing QUP pinctrl states
Date: Thu, 15 Oct 2026 14:18:28 +0200 [thread overview]
Message-ID: <3d00c7d2-026e-4ce8-bda6-bb2d0f3c3123@oss.qualcomm.com> (raw)
In-Reply-To: <20260831-sc8280xp-qup-pinctrl-v2-1-a69bbbdb37e8@radxa.com>
On 8/31/26 11:55 AM, Xilin Wu wrote:
> Add the missing tlmm pinctrl states for the SC8280XP QUP engines so common
> I2C, SPI and UART pinmux definitions are available from the SoC dtsi.
> Populate all 24 engines using the SC8280XP lane-to-GPIO mapping, including
> the non-linear QUP instances, and keep the mux function names aligned with
> the driver-supported qup0..qup23 names.
[...]
> + qup_uart0_default: qup-uart0-default-state {
> + cts-pins {
> + pins = "gpio135";
> + function = "qup0";
> + bias-bus-hold;
> + };
> + rts-pins {
Please keep a \n between each subnode, there's a new tool in town
that will be very grumpy if you don't:
https://lore.kernel.org/linux-arm-msm/cover.1790892852.git.waqar.hameed@axis.com/
https://lore.kernel.org/linux-arm-msm/e869c2bb5005830c9ac1d4bf998696ffc4eed335.1790892852.git.waqar.hameed@axis.com/
with that:
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Konrad
next prev parent reply other threads:[~2026-10-15 12:18 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-31 9:55 Xilin Wu
2026-10-15 12:18 ` Konrad Dybcio [this message]
2026-10-15 13:30 ` Xilin Wu
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