* [PATCH] drm/amdgpu: Assign boolean values to a bool variable
@ 2021-01-20 7:16 Jiapeng Zhong
2021-01-20 15:05 ` Harry Wentland
0 siblings, 1 reply; 3+ messages in thread
From: Jiapeng Zhong @ 2021-01-20 7:16 UTC (permalink / raw)
To: harry.wentland
Cc: sunpeng.li, alexander.deucher, christian.koenig, airlied, daniel,
luben.tuikov, Eric.Bernstein, Bhawanpreet.Lakha,
Rodrigo.Siqueira, Dmytro.Laktyushkin, yebin10, amd-gfx,
dri-devel, linux-kernel, Jiapeng Zhong
Fix the following coccicheck warnings:
./drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c:
1009:6-16: WARNING: Assignment of 0/1 to bool variable.
./drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c:
200:2-10: WARNING: Assignment of 0/1 to bool variable.
Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Jiapeng Zhong <abaci-bugfix@linux.alibaba.com>
---
.../display/dc/dml/dcn30/display_rq_dlg_calc_30.c | 32 +++++++++++-----------
1 file changed, 16 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c
index 5b5916b..0f14f20 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c
@@ -165,8 +165,8 @@ static void handle_det_buf_split(struct display_mode_lib *mode_lib,
unsigned int swath_bytes_c = 0;
unsigned int full_swath_bytes_packed_l = 0;
unsigned int full_swath_bytes_packed_c = 0;
- bool req128_l = 0;
- bool req128_c = 0;
+ bool req128_l = false;
+ bool req128_c = false;
bool surf_linear = (pipe_src_param.sw_mode == dm_sw_linear);
bool surf_vert = (pipe_src_param.source_scan == dm_vert);
unsigned int log2_swath_height_l = 0;
@@ -191,37 +191,37 @@ static void handle_det_buf_split(struct display_mode_lib *mode_lib,
total_swath_bytes = 2 * full_swath_bytes_packed_l;
if (total_swath_bytes <= detile_buf_size_in_bytes) { //full 256b request
- req128_l = 0;
- req128_c = 0;
+ req128_l = false;
+ req128_c = false;
swath_bytes_l = full_swath_bytes_packed_l;
swath_bytes_c = full_swath_bytes_packed_c;
} else if (!rq_param->yuv420) {
- req128_l = 1;
- req128_c = 0;
+ req128_l = true;
+ req128_c = false;
swath_bytes_c = full_swath_bytes_packed_c;
swath_bytes_l = full_swath_bytes_packed_l / 2;
} else if ((double)full_swath_bytes_packed_l / (double)full_swath_bytes_packed_c < 1.5) {
- req128_l = 0;
- req128_c = 1;
+ req128_l = false;
+ req128_c = true;
swath_bytes_l = full_swath_bytes_packed_l;
swath_bytes_c = full_swath_bytes_packed_c / 2;
total_swath_bytes = 2 * swath_bytes_l + 2 * swath_bytes_c;
if (total_swath_bytes > detile_buf_size_in_bytes) {
- req128_l = 1;
+ req128_l = true;
swath_bytes_l = full_swath_bytes_packed_l / 2;
}
} else {
- req128_l = 1;
- req128_c = 0;
+ req128_l = true;
+ req128_c = false;
swath_bytes_l = full_swath_bytes_packed_l/2;
swath_bytes_c = full_swath_bytes_packed_c;
total_swath_bytes = 2 * swath_bytes_l + 2 * swath_bytes_c;
if (total_swath_bytes > detile_buf_size_in_bytes) {
- req128_c = 1;
+ req128_c = true;
swath_bytes_c = full_swath_bytes_packed_c/2;
}
}
@@ -1006,8 +1006,8 @@ static void dml_rq_dlg_get_dlg_params(struct display_mode_lib *mode_lib,
double min_dst_y_ttu_vblank = 0;
unsigned int dlg_vblank_start = 0;
- bool dual_plane = 0;
- bool mode_422 = 0;
+ bool dual_plane = false;
+ bool mode_422 = false;
unsigned int access_dir = 0;
unsigned int vp_height_l = 0;
unsigned int vp_width_l = 0;
@@ -1021,7 +1021,7 @@ static void dml_rq_dlg_get_dlg_params(struct display_mode_lib *mode_lib,
double hratio_c = 0;
double vratio_l = 0;
double vratio_c = 0;
- bool scl_enable = 0;
+ bool scl_enable = false;
double line_time_in_us = 0;
// double vinit_l;
@@ -1156,7 +1156,7 @@ static void dml_rq_dlg_get_dlg_params(struct display_mode_lib *mode_lib,
// Source
// dcc_en = src.dcc;
dual_plane = is_dual_plane((enum source_format_class)(src->source_format));
- mode_422 = 0; // TODO
+ mode_422 = false; // TODO
access_dir = (src->source_scan == dm_vert); // vp access direction: horizontal or vertical accessed
vp_height_l = src->viewport_height;
vp_width_l = src->viewport_width;
--
1.8.3.1
^ permalink raw reply [flat|nested] 3+ messages in thread* Re: [PATCH] drm/amdgpu: Assign boolean values to a bool variable
2021-01-20 7:16 [PATCH] drm/amdgpu: Assign boolean values to a bool variable Jiapeng Zhong
@ 2021-01-20 15:05 ` Harry Wentland
2021-01-20 22:00 ` Alex Deucher
0 siblings, 1 reply; 3+ messages in thread
From: Harry Wentland @ 2021-01-20 15:05 UTC (permalink / raw)
To: Jiapeng Zhong
Cc: sunpeng.li, alexander.deucher, christian.koenig, airlied, daniel,
luben.tuikov, Eric.Bernstein, Bhawanpreet.Lakha,
Rodrigo.Siqueira, Dmytro.Laktyushkin, yebin10, amd-gfx,
dri-devel, linux-kernel
On 2021-01-20 2:16 a.m., Jiapeng Zhong wrote:
> Fix the following coccicheck warnings:
>
> ./drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c:
> 1009:6-16: WARNING: Assignment of 0/1 to bool variable.
>
> ./drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c:
> 200:2-10: WARNING: Assignment of 0/1 to bool variable.
>
> Reported-by: Abaci Robot <abaci@linux.alibaba.com>
> Signed-off-by: Jiapeng Zhong <abaci-bugfix@linux.alibaba.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Harry
> ---
> .../display/dc/dml/dcn30/display_rq_dlg_calc_30.c | 32 +++++++++++-----------
> 1 file changed, 16 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c
> index 5b5916b..0f14f20 100644
> --- a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c
> +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c
> @@ -165,8 +165,8 @@ static void handle_det_buf_split(struct display_mode_lib *mode_lib,
> unsigned int swath_bytes_c = 0;
> unsigned int full_swath_bytes_packed_l = 0;
> unsigned int full_swath_bytes_packed_c = 0;
> - bool req128_l = 0;
> - bool req128_c = 0;
> + bool req128_l = false;
> + bool req128_c = false;
> bool surf_linear = (pipe_src_param.sw_mode == dm_sw_linear);
> bool surf_vert = (pipe_src_param.source_scan == dm_vert);
> unsigned int log2_swath_height_l = 0;
> @@ -191,37 +191,37 @@ static void handle_det_buf_split(struct display_mode_lib *mode_lib,
> total_swath_bytes = 2 * full_swath_bytes_packed_l;
>
> if (total_swath_bytes <= detile_buf_size_in_bytes) { //full 256b request
> - req128_l = 0;
> - req128_c = 0;
> + req128_l = false;
> + req128_c = false;
> swath_bytes_l = full_swath_bytes_packed_l;
> swath_bytes_c = full_swath_bytes_packed_c;
> } else if (!rq_param->yuv420) {
> - req128_l = 1;
> - req128_c = 0;
> + req128_l = true;
> + req128_c = false;
> swath_bytes_c = full_swath_bytes_packed_c;
> swath_bytes_l = full_swath_bytes_packed_l / 2;
> } else if ((double)full_swath_bytes_packed_l / (double)full_swath_bytes_packed_c < 1.5) {
> - req128_l = 0;
> - req128_c = 1;
> + req128_l = false;
> + req128_c = true;
> swath_bytes_l = full_swath_bytes_packed_l;
> swath_bytes_c = full_swath_bytes_packed_c / 2;
>
> total_swath_bytes = 2 * swath_bytes_l + 2 * swath_bytes_c;
>
> if (total_swath_bytes > detile_buf_size_in_bytes) {
> - req128_l = 1;
> + req128_l = true;
> swath_bytes_l = full_swath_bytes_packed_l / 2;
> }
> } else {
> - req128_l = 1;
> - req128_c = 0;
> + req128_l = true;
> + req128_c = false;
> swath_bytes_l = full_swath_bytes_packed_l/2;
> swath_bytes_c = full_swath_bytes_packed_c;
>
> total_swath_bytes = 2 * swath_bytes_l + 2 * swath_bytes_c;
>
> if (total_swath_bytes > detile_buf_size_in_bytes) {
> - req128_c = 1;
> + req128_c = true;
> swath_bytes_c = full_swath_bytes_packed_c/2;
> }
> }
> @@ -1006,8 +1006,8 @@ static void dml_rq_dlg_get_dlg_params(struct display_mode_lib *mode_lib,
>
> double min_dst_y_ttu_vblank = 0;
> unsigned int dlg_vblank_start = 0;
> - bool dual_plane = 0;
> - bool mode_422 = 0;
> + bool dual_plane = false;
> + bool mode_422 = false;
> unsigned int access_dir = 0;
> unsigned int vp_height_l = 0;
> unsigned int vp_width_l = 0;
> @@ -1021,7 +1021,7 @@ static void dml_rq_dlg_get_dlg_params(struct display_mode_lib *mode_lib,
> double hratio_c = 0;
> double vratio_l = 0;
> double vratio_c = 0;
> - bool scl_enable = 0;
> + bool scl_enable = false;
>
> double line_time_in_us = 0;
> // double vinit_l;
> @@ -1156,7 +1156,7 @@ static void dml_rq_dlg_get_dlg_params(struct display_mode_lib *mode_lib,
> // Source
> // dcc_en = src.dcc;
> dual_plane = is_dual_plane((enum source_format_class)(src->source_format));
> - mode_422 = 0; // TODO
> + mode_422 = false; // TODO
> access_dir = (src->source_scan == dm_vert); // vp access direction: horizontal or vertical accessed
> vp_height_l = src->viewport_height;
> vp_width_l = src->viewport_width;
>
^ permalink raw reply [flat|nested] 3+ messages in thread* Re: [PATCH] drm/amdgpu: Assign boolean values to a bool variable
2021-01-20 15:05 ` Harry Wentland
@ 2021-01-20 22:00 ` Alex Deucher
0 siblings, 0 replies; 3+ messages in thread
From: Alex Deucher @ 2021-01-20 22:00 UTC (permalink / raw)
To: Harry Wentland
Cc: Jiapeng Zhong, Dmytro Laktyushkin, Leo (Sunpeng) Li, Siqueira,
Rodrigo, LKML, amd-gfx list, Dave Airlie, Tuikov, Luben,
Eric Bernstein, Maling list - DRI developers, Daniel Vetter,
Deucher, Alexander, Bhawanpreet Lakha, Christian Koenig, Ye Bin
Applied. Thanks!
Alex
On Wed, Jan 20, 2021 at 10:05 AM Harry Wentland <harry.wentland@amd.com> wrote:
>
> On 2021-01-20 2:16 a.m., Jiapeng Zhong wrote:
> > Fix the following coccicheck warnings:
> >
> > ./drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c:
> > 1009:6-16: WARNING: Assignment of 0/1 to bool variable.
> >
> > ./drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c:
> > 200:2-10: WARNING: Assignment of 0/1 to bool variable.
> >
> > Reported-by: Abaci Robot <abaci@linux.alibaba.com>
> > Signed-off-by: Jiapeng Zhong <abaci-bugfix@linux.alibaba.com>
>
> Reviewed-by: Harry Wentland <harry.wentland@amd.com>
>
> Harry
>
> > ---
> > .../display/dc/dml/dcn30/display_rq_dlg_calc_30.c | 32 +++++++++++-----------
> > 1 file changed, 16 insertions(+), 16 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c
> > index 5b5916b..0f14f20 100644
> > --- a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c
> > +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c
> > @@ -165,8 +165,8 @@ static void handle_det_buf_split(struct display_mode_lib *mode_lib,
> > unsigned int swath_bytes_c = 0;
> > unsigned int full_swath_bytes_packed_l = 0;
> > unsigned int full_swath_bytes_packed_c = 0;
> > - bool req128_l = 0;
> > - bool req128_c = 0;
> > + bool req128_l = false;
> > + bool req128_c = false;
> > bool surf_linear = (pipe_src_param.sw_mode == dm_sw_linear);
> > bool surf_vert = (pipe_src_param.source_scan == dm_vert);
> > unsigned int log2_swath_height_l = 0;
> > @@ -191,37 +191,37 @@ static void handle_det_buf_split(struct display_mode_lib *mode_lib,
> > total_swath_bytes = 2 * full_swath_bytes_packed_l;
> >
> > if (total_swath_bytes <= detile_buf_size_in_bytes) { //full 256b request
> > - req128_l = 0;
> > - req128_c = 0;
> > + req128_l = false;
> > + req128_c = false;
> > swath_bytes_l = full_swath_bytes_packed_l;
> > swath_bytes_c = full_swath_bytes_packed_c;
> > } else if (!rq_param->yuv420) {
> > - req128_l = 1;
> > - req128_c = 0;
> > + req128_l = true;
> > + req128_c = false;
> > swath_bytes_c = full_swath_bytes_packed_c;
> > swath_bytes_l = full_swath_bytes_packed_l / 2;
> > } else if ((double)full_swath_bytes_packed_l / (double)full_swath_bytes_packed_c < 1.5) {
> > - req128_l = 0;
> > - req128_c = 1;
> > + req128_l = false;
> > + req128_c = true;
> > swath_bytes_l = full_swath_bytes_packed_l;
> > swath_bytes_c = full_swath_bytes_packed_c / 2;
> >
> > total_swath_bytes = 2 * swath_bytes_l + 2 * swath_bytes_c;
> >
> > if (total_swath_bytes > detile_buf_size_in_bytes) {
> > - req128_l = 1;
> > + req128_l = true;
> > swath_bytes_l = full_swath_bytes_packed_l / 2;
> > }
> > } else {
> > - req128_l = 1;
> > - req128_c = 0;
> > + req128_l = true;
> > + req128_c = false;
> > swath_bytes_l = full_swath_bytes_packed_l/2;
> > swath_bytes_c = full_swath_bytes_packed_c;
> >
> > total_swath_bytes = 2 * swath_bytes_l + 2 * swath_bytes_c;
> >
> > if (total_swath_bytes > detile_buf_size_in_bytes) {
> > - req128_c = 1;
> > + req128_c = true;
> > swath_bytes_c = full_swath_bytes_packed_c/2;
> > }
> > }
> > @@ -1006,8 +1006,8 @@ static void dml_rq_dlg_get_dlg_params(struct display_mode_lib *mode_lib,
> >
> > double min_dst_y_ttu_vblank = 0;
> > unsigned int dlg_vblank_start = 0;
> > - bool dual_plane = 0;
> > - bool mode_422 = 0;
> > + bool dual_plane = false;
> > + bool mode_422 = false;
> > unsigned int access_dir = 0;
> > unsigned int vp_height_l = 0;
> > unsigned int vp_width_l = 0;
> > @@ -1021,7 +1021,7 @@ static void dml_rq_dlg_get_dlg_params(struct display_mode_lib *mode_lib,
> > double hratio_c = 0;
> > double vratio_l = 0;
> > double vratio_c = 0;
> > - bool scl_enable = 0;
> > + bool scl_enable = false;
> >
> > double line_time_in_us = 0;
> > // double vinit_l;
> > @@ -1156,7 +1156,7 @@ static void dml_rq_dlg_get_dlg_params(struct display_mode_lib *mode_lib,
> > // Source
> > // dcc_en = src.dcc;
> > dual_plane = is_dual_plane((enum source_format_class)(src->source_format));
> > - mode_422 = 0; // TODO
> > + mode_422 = false; // TODO
> > access_dir = (src->source_scan == dm_vert); // vp access direction: horizontal or vertical accessed
> > vp_height_l = src->viewport_height;
> > vp_width_l = src->viewport_width;
> >
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2021-01-20 22:12 UTC | newest]
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2021-01-20 7:16 [PATCH] drm/amdgpu: Assign boolean values to a bool variable Jiapeng Zhong
2021-01-20 15:05 ` Harry Wentland
2021-01-20 22:00 ` Alex Deucher
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