From: Krzysztof Kozlowski <krzk@kernel.org>
To: Qiang Yu <qiang.yu@oss.qualcomm.com>, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] arm64: defconfig: Enable QMP PCIe Multi-PHY driver
Date: Mon, 10 Aug 2026 12:51:02 +0200 [thread overview]
Message-ID: <3ecf4107-f7e8-4c72-87f6-9ca52ee10e7d@kernel.org> (raw)
In-Reply-To: <20260807-enable_multiphy_0807-v1-1-142f911d356a@oss.qualcomm.com>
On 07/08/2026 14:50, Qiang Yu wrote:
> This driver supports PHYs shared across multiple PCIe controllers, e.g.
> the PCIe3 PHY block on Glymur that PCIe3a and PCIe3b both use. Enable it
What is Glymur?
Srsly, same questions all over again. Every second defconfig change from
Qualcomm.
> so those platforms keep working with this defconfig.
Drop, pointless.
>
> Signed-off-by: Qiang Yu <qiang.yu@oss.qualcomm.com>
> ---
> This patch depends on below patch series:
> Link: https://lore.kernel.org/all/20260807-glymur_linkmode_0807-v9-0-dd1c7e236e29@oss.qualcomm.com/
Why? Above patchset targets SoC tree, so why this does not? Why it is
not part of that patchset, why none of maintainers are CC-ed here?
> ---
Best regards,
Krzysztof
next prev parent reply other threads:[~2026-08-10 10:51 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-07 12:50 Qiang Yu
2026-08-10 10:51 ` Krzysztof Kozlowski [this message]
2026-08-12 4:58 ` Qiang Yu
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