From: James Clark <james.clark@linaro.org>
To: Frank Li <Frank.li@nxp.com>
Cc: Vladimir Oltean <olteanv@gmail.com>,
Mark Brown <broonie@kernel.org>,
Vladimir Oltean <vladimir.oltean@nxp.com>,
Arnd Bergmann <arnd@arndb.de>,
Larisa Grigore <larisa.grigore@nxp.com>,
Christoph Hellwig <hch@lst.de>,
linux-spi@vger.kernel.org, imx@lists.linux.dev,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 1/6] spi: spi-fsl-dspi: Clear completion counter before initiating transfer
Date: Wed, 25 Jun 2025 10:52:23 +0100 [thread overview]
Message-ID: <3eddec49-f41a-4b59-972f-92693677bb7c@linaro.org> (raw)
In-Reply-To: <aFrLMCq6hRJj5FjI@lizhi-Precision-Tower-5810>
On 24/06/2025 4:58 pm, Frank Li wrote:
> On Tue, Jun 24, 2025 at 11:35:31AM +0100, James Clark wrote:
>> In target mode, extra interrupts can be received between the end of a
>> transfer and halting the module if the host continues sending more data.
>> If the interrupt from this occurs after the reinit_completion() then the
>> completion counter is left at a non-zero value. The next unrelated
>> transfer initiated by userspace will then complete immediately without
>> waiting for the interrupt or writing to the RX buffer.
>>
>> Fix it by resetting the counter before the transfer so that lingering
>> values are cleared. This is done after clearing the FIFOs and the
>> status register but before the transfer is initiated, so no interrupts
>> should be received at this point resulting in other race conditions.
>>
>> Fixes: 4f5ee75ea171 ("spi: spi-fsl-dspi: Replace interruptible wait queue with a simple completion")
>> Signed-off-by: James Clark <james.clark@linaro.org>
>> ---
>> drivers/spi/spi-fsl-dspi.c | 10 +++++++++-
>> 1 file changed, 9 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/spi/spi-fsl-dspi.c b/drivers/spi/spi-fsl-dspi.c
>> index 04c88d090c4d..744dfc561db2 100644
>> --- a/drivers/spi/spi-fsl-dspi.c
>> +++ b/drivers/spi/spi-fsl-dspi.c
>> @@ -1122,11 +1122,19 @@ static int dspi_transfer_one_message(struct spi_controller *ctlr,
>> if (dspi->devtype_data->trans_mode == DSPI_DMA_MODE) {
>> status = dspi_dma_xfer(dspi);
>> } else {
>> + /*
>> + * Reset completion counter to clear any extra
>> + * complete()s from spurious interrupts that may have
>> + * happened after the last message's completion but
>> + * before the module was fully in stop mode.
>> + */
>
> I think you change is correct. reinit_completion() should be called before
> dspi_fifo_write().
>
> comments is quite confused. how about below comments?
>
> /*
> * Reinitialize the completion before transferring data to avoid the case where
> * it might remain in the done state due to a spurious interrupt from a previous
> * transfer. This could falsely signal that the current transfer has completed.
> */
>
> Frank
Will do
>> + if (dspi->irq)
>> + reinit_completion(&dspi->xfer_done);
>> +
>> dspi_fifo_write(dspi);
>>
>> if (dspi->irq) {
>> wait_for_completion(&dspi->xfer_done);
>> - reinit_completion(&dspi->xfer_done);
>> } else {
>> do {
>> status = dspi_poll(dspi);
>>
>> --
>> 2.34.1
>>
next prev parent reply other threads:[~2025-06-25 9:52 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-24 10:35 [PATCH v3 0/6] spi: spi-fsl-dspi: Target mode improvements James Clark
2025-06-24 10:35 ` [PATCH v3 1/6] spi: spi-fsl-dspi: Clear completion counter before initiating transfer James Clark
2025-06-24 15:58 ` Frank Li
2025-06-25 9:52 ` James Clark [this message]
2025-06-24 10:35 ` [PATCH v3 2/6] spi: spi-fsl-dspi: Store status directly in cur_msg->status James Clark
2025-06-24 16:18 ` Frank Li
2025-06-25 9:56 ` James Clark
2025-06-24 10:35 ` [PATCH v3 3/6] spi: spi-fsl-dspi: Stub out DMA functions James Clark
2025-06-24 16:29 ` Frank Li
2025-06-24 17:16 ` Arnd Bergmann
2025-06-25 9:19 ` James Clark
2025-06-25 10:00 ` Arnd Bergmann
2025-06-25 10:19 ` James Clark
2025-06-25 10:54 ` Arnd Bergmann
2025-06-26 10:04 ` James Clark
2025-06-26 11:34 ` Mark Brown
2025-06-25 5:25 ` kernel test robot
2025-06-24 10:35 ` [PATCH v3 4/6] spi: spi-fsl-dspi: Use non-coherent memory for DMA James Clark
2025-06-24 16:39 ` Frank Li
2025-06-25 9:00 ` James Clark
2025-06-25 15:04 ` Frank Li
2025-06-26 9:14 ` James Clark
2025-06-26 9:38 ` Arnd Bergmann
2025-06-26 11:16 ` Mark Brown
2025-06-24 10:35 ` [PATCH v3 5/6] spi: spi-fsl-dspi: Increase DMA buffer size James Clark
2025-06-24 10:35 ` [PATCH v3 6/6] spi: spi-fsl-dspi: Report FIFO overflows as errors James Clark
2025-06-24 16:50 ` Frank Li
2025-06-25 10:09 ` James Clark
2025-06-25 14:55 ` Frank Li
2025-06-27 8:52 ` James Clark
2025-06-25 7:10 ` kernel test robot
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