* [PATCH] riscv: dts: thead: th1520: Add PMU event node
@ 2024-05-30 11:18 Inochi Amaoto
2024-05-31 1:43 ` Guo Ren
2024-05-31 11:35 ` Conor.Dooley
0 siblings, 2 replies; 5+ messages in thread
From: Inochi Amaoto @ 2024-05-30 11:18 UTC (permalink / raw)
To: Jisheng Zhang, Guo Ren, Fu Wei, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Paul Walmsley, Palmer Dabbelt, Albert Ou
Cc: Inochi Amaoto, linux-riscv, devicetree, linux-kernel
T-HEAD th1520 uses standard C910 chip and its pmu is already supported
by OpenSBI.
Add the pmu event description for T-HEAD th1520 SoC.
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Link: https://www.xrvm.com/product/xuantie/4240217381324001280?spm=xrvm.27140568.0.0.7f979b29nzIa1m
---
arch/riscv/boot/dts/thead/th1520.dtsi | 81 +++++++++++++++++++++++++++
1 file changed, 81 insertions(+)
diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi
index d2fa25839012..3c9974062c20 100644
--- a/arch/riscv/boot/dts/thead/th1520.dtsi
+++ b/arch/riscv/boot/dts/thead/th1520.dtsi
@@ -122,6 +122,87 @@ l2_cache: l2-cache {
};
};
+ pmu {
+ compatible = "riscv,pmu";
+ riscv,event-to-mhpmcounters =
+ <0x00003 0x00003 0x0007fff8>,
+ <0x00004 0x00004 0x0007fff8>,
+ <0x00005 0x00005 0x0007fff8>,
+ <0x00006 0x00006 0x0007fff8>,
+ <0x00007 0x00007 0x0007fff8>,
+ <0x00008 0x00008 0x0007fff8>,
+ <0x00009 0x00009 0x0007fff8>,
+ <0x0000a 0x0000a 0x0007fff8>,
+ <0x10000 0x10000 0x0007fff8>,
+ <0x10001 0x10001 0x0007fff8>,
+ <0x10002 0x10002 0x0007fff8>,
+ <0x10003 0x10003 0x0007fff8>,
+ <0x10010 0x10010 0x0007fff8>,
+ <0x10011 0x10011 0x0007fff8>,
+ <0x10012 0x10012 0x0007fff8>,
+ <0x10013 0x10013 0x0007fff8>;
+ riscv,event-to-mhpmevent =
+ <0x00003 0x00000000 0x00000001>,
+ <0x00004 0x00000000 0x00000002>,
+ <0x00006 0x00000000 0x00000006>,
+ <0x00005 0x00000000 0x00000007>,
+ <0x00007 0x00000000 0x00000008>,
+ <0x00008 0x00000000 0x00000009>,
+ <0x00009 0x00000000 0x0000000a>,
+ <0x0000a 0x00000000 0x0000000b>,
+ <0x10000 0x00000000 0x0000000c>,
+ <0x10001 0x00000000 0x0000000d>,
+ <0x10002 0x00000000 0x0000000e>,
+ <0x10003 0x00000000 0x0000000f>,
+ <0x10010 0x00000000 0x00000010>,
+ <0x10011 0x00000000 0x00000011>,
+ <0x10012 0x00000000 0x00000012>,
+ <0x10013 0x00000000 0x00000013>;
+ riscv,raw-event-to-mhpmcounters =
+ <0x00000000 0x00000001 0xffffffff 0xffffffff 0x0007fff8>,
+ <0x00000000 0x00000002 0xffffffff 0xffffffff 0x0007fff8>,
+ <0x00000000 0x00000003 0xffffffff 0xffffffff 0x0007fff8>,
+ <0x00000000 0x00000004 0xffffffff 0xffffffff 0x0007fff8>,
+ <0x00000000 0x00000005 0xffffffff 0xffffffff 0x0007fff8>,
+ <0x00000000 0x00000006 0xffffffff 0xffffffff 0x0007fff8>,
+ <0x00000000 0x00000007 0xffffffff 0xffffffff 0x0007fff8>,
+ <0x00000000 0x00000008 0xffffffff 0xffffffff 0x0007fff8>,
+ <0x00000000 0x00000009 0xffffffff 0xffffffff 0x0007fff8>,
+ <0x00000000 0x0000000a 0xffffffff 0xffffffff 0x0007fff8>,
+ <0x00000000 0x0000000b 0xffffffff 0xffffffff 0x0007fff8>,
+ <0x00000000 0x0000000c 0xffffffff 0xffffffff 0x0007fff8>,
+ <0x00000000 0x0000000d 0xffffffff 0xffffffff 0x0007fff8>,
+ <0x00000000 0x0000000e 0xffffffff 0xffffffff 0x0007fff8>,
+ <0x00000000 0x0000000f 0xffffffff 0xffffffff 0x0007fff8>,
+ <0x00000000 0x00000010 0xffffffff 0xffffffff 0x0007fff8>,
+ <0x00000000 0x00000011 0xffffffff 0xffffffff 0x0007fff8>,
+ <0x00000000 0x00000012 0xffffffff 0xffffffff 0x0007fff8>,
+ <0x00000000 0x00000013 0xffffffff 0xffffffff 0x0007fff8>,
+ <0x00000000 0x00000014 0xffffffff 0xffffffff 0x0007fff8>,
+ <0x00000000 0x00000015 0xffffffff 0xffffffff 0x0007fff8>,
+ <0x00000000 0x00000016 0xffffffff 0xffffffff 0x0007fff8>,
+ <0x00000000 0x00000017 0xffffffff 0xffffffff 0x0007fff8>,
+ <0x00000000 0x00000018 0xffffffff 0xffffffff 0x0007fff8>,
+ <0x00000000 0x00000019 0xffffffff 0xffffffff 0x0007fff8>,
+ <0x00000000 0x0000001a 0xffffffff 0xffffffff 0x0007fff8>,
+ <0x00000000 0x0000001b 0xffffffff 0xffffffff 0x0007fff8>,
+ <0x00000000 0x0000001c 0xffffffff 0xffffffff 0x0007fff8>,
+ <0x00000000 0x0000001d 0xffffffff 0xffffffff 0x0007fff8>,
+ <0x00000000 0x0000001e 0xffffffff 0xffffffff 0x0007fff8>,
+ <0x00000000 0x0000001f 0xffffffff 0xffffffff 0x0007fff8>,
+ <0x00000000 0x00000020 0xffffffff 0xffffffff 0x0007fff8>,
+ <0x00000000 0x00000021 0xffffffff 0xffffffff 0x0007fff8>,
+ <0x00000000 0x00000022 0xffffffff 0xffffffff 0x0007fff8>,
+ <0x00000000 0x00000023 0xffffffff 0xffffffff 0x0007fff8>,
+ <0x00000000 0x00000024 0xffffffff 0xffffffff 0x0007fff8>,
+ <0x00000000 0x00000025 0xffffffff 0xffffffff 0x0007fff8>,
+ <0x00000000 0x00000026 0xffffffff 0xffffffff 0x0007fff8>,
+ <0x00000000 0x00000027 0xffffffff 0xffffffff 0x0007fff8>,
+ <0x00000000 0x00000028 0xffffffff 0xffffffff 0x0007fff8>,
+ <0x00000000 0x00000029 0xffffffff 0xffffffff 0x0007fff8>,
+ <0x00000000 0x0000002a 0xffffffff 0xffffffff 0x0007fff8>;
+ };
+
osc: oscillator {
compatible = "fixed-clock";
clock-output-names = "osc_24m";
--
2.45.1
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] riscv: dts: thead: th1520: Add PMU event node
2024-05-30 11:18 [PATCH] riscv: dts: thead: th1520: Add PMU event node Inochi Amaoto
@ 2024-05-31 1:43 ` Guo Ren
2024-05-31 15:03 ` Conor Dooley
2024-05-31 11:35 ` Conor.Dooley
1 sibling, 1 reply; 5+ messages in thread
From: Guo Ren @ 2024-05-31 1:43 UTC (permalink / raw)
To: Inochi Amaoto
Cc: Jisheng Zhang, Fu Wei, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Paul Walmsley, Palmer Dabbelt, Albert Ou,
linux-riscv, devicetree, linux-kernel
On Thu, May 30, 2024 at 7:19 PM Inochi Amaoto <inochiama@outlook.com> wrote:
>
> T-HEAD th1520 uses standard C910 chip and its pmu is already supported
> by OpenSBI.
>
> Add the pmu event description for T-HEAD th1520 SoC.
>
> Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
> Link: https://www.xrvm.com/product/xuantie/4240217381324001280?spm=xrvm.27140568.0.0.7f979b29nzIa1m
> ---
> arch/riscv/boot/dts/thead/th1520.dtsi | 81 +++++++++++++++++++++++++++
> 1 file changed, 81 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi
> index d2fa25839012..3c9974062c20 100644
> --- a/arch/riscv/boot/dts/thead/th1520.dtsi
> +++ b/arch/riscv/boot/dts/thead/th1520.dtsi
> @@ -122,6 +122,87 @@ l2_cache: l2-cache {
> };
> };
>
> + pmu {
> + compatible = "riscv,pmu";
> + riscv,event-to-mhpmcounters =
> + <0x00003 0x00003 0x0007fff8>,
> + <0x00004 0x00004 0x0007fff8>,
> + <0x00005 0x00005 0x0007fff8>,
> + <0x00006 0x00006 0x0007fff8>,
> + <0x00007 0x00007 0x0007fff8>,
> + <0x00008 0x00008 0x0007fff8>,
> + <0x00009 0x00009 0x0007fff8>,
> + <0x0000a 0x0000a 0x0007fff8>,
> + <0x10000 0x10000 0x0007fff8>,
> + <0x10001 0x10001 0x0007fff8>,
> + <0x10002 0x10002 0x0007fff8>,
> + <0x10003 0x10003 0x0007fff8>,
> + <0x10010 0x10010 0x0007fff8>,
> + <0x10011 0x10011 0x0007fff8>,
> + <0x10012 0x10012 0x0007fff8>,
> + <0x10013 0x10013 0x0007fff8>;
> + riscv,event-to-mhpmevent =
> + <0x00003 0x00000000 0x00000001>,
> + <0x00004 0x00000000 0x00000002>,
> + <0x00006 0x00000000 0x00000006>,
> + <0x00005 0x00000000 0x00000007>,
> + <0x00007 0x00000000 0x00000008>,
> + <0x00008 0x00000000 0x00000009>,
> + <0x00009 0x00000000 0x0000000a>,
> + <0x0000a 0x00000000 0x0000000b>,
> + <0x10000 0x00000000 0x0000000c>,
> + <0x10001 0x00000000 0x0000000d>,
> + <0x10002 0x00000000 0x0000000e>,
> + <0x10003 0x00000000 0x0000000f>,
> + <0x10010 0x00000000 0x00000010>,
> + <0x10011 0x00000000 0x00000011>,
> + <0x10012 0x00000000 0x00000012>,
> + <0x10013 0x00000000 0x00000013>;
> + riscv,raw-event-to-mhpmcounters =
> + <0x00000000 0x00000001 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x00000002 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x00000003 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x00000004 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x00000005 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x00000006 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x00000007 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x00000008 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x00000009 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x0000000a 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x0000000b 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x0000000c 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x0000000d 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x0000000e 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x0000000f 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x00000010 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x00000011 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x00000012 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x00000013 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x00000014 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x00000015 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x00000016 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x00000017 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x00000018 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x00000019 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x0000001a 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x0000001b 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x0000001c 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x0000001d 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x0000001e 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x0000001f 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x00000020 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x00000021 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x00000022 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x00000023 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x00000024 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x00000025 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x00000026 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x00000027 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x00000028 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x00000029 0xffffffff 0xffffffff 0x0007fff8>,
> + <0x00000000 0x0000002a 0xffffffff 0xffffffff 0x0007fff8>;
> + };
> +
> osc: oscillator {
> compatible = "fixed-clock";
> clock-output-names = "osc_24m";
> --
> 2.45.1
>
LGTM! Reviewed-by: Guo Ren <guoren@kernel.org>
--
Best Regards
Guo Ren
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] riscv: dts: thead: th1520: Add PMU event node
2024-05-30 11:18 [PATCH] riscv: dts: thead: th1520: Add PMU event node Inochi Amaoto
2024-05-31 1:43 ` Guo Ren
@ 2024-05-31 11:35 ` Conor.Dooley
1 sibling, 0 replies; 5+ messages in thread
From: Conor.Dooley @ 2024-05-31 11:35 UTC (permalink / raw)
To: inochiama, jszhang, guoren, wefu, robh, krzk+dt, conor+dt,
paul.walmsley, palmer, aou
Cc: linux-riscv, devicetree, linux-kernel
On 30/05/2024 12:18, Inochi Amaoto wrote:
> T-HEAD th1520 uses standard C910 chip and its pmu is already supported
> by OpenSBI.
>
> Add the pmu event description for T-HEAD th1520 SoC.
>
> Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
> Link: https://www.xrvm.com/product/xuantie/4240217381324001280?spm=xrvm.27140568.0.0.7f979b29nzIa1m
Applied, thanks.
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] riscv: dts: thead: th1520: Add PMU event node
2024-05-31 1:43 ` Guo Ren
@ 2024-05-31 15:03 ` Conor Dooley
2024-06-01 3:07 ` Guo Ren
0 siblings, 1 reply; 5+ messages in thread
From: Conor Dooley @ 2024-05-31 15:03 UTC (permalink / raw)
To: Guo Ren
Cc: Inochi Amaoto, Jisheng Zhang, Fu Wei, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Paul Walmsley, Palmer Dabbelt,
Albert Ou, linux-riscv, devicetree, linux-kernel
[-- Attachment #1: Type: text/plain, Size: 254 bytes --]
On Fri, May 31, 2024 at 09:43:00AM +0800, Guo Ren wrote:
> LGTM! Reviewed-by: Guo Ren <guoren@kernel.org>
Please provide tags on a new line so that tooling picks them up.
I had to amend this commit cos I forgot a signoff, so I added it.
Thanks,
Conor.
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] riscv: dts: thead: th1520: Add PMU event node
2024-05-31 15:03 ` Conor Dooley
@ 2024-06-01 3:07 ` Guo Ren
0 siblings, 0 replies; 5+ messages in thread
From: Guo Ren @ 2024-06-01 3:07 UTC (permalink / raw)
To: Conor Dooley
Cc: Inochi Amaoto, Jisheng Zhang, Fu Wei, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Paul Walmsley, Palmer Dabbelt,
Albert Ou, linux-riscv, devicetree, linux-kernel
On Fri, May 31, 2024 at 11:03 PM Conor Dooley <conor@kernel.org> wrote:
>
> On Fri, May 31, 2024 at 09:43:00AM +0800, Guo Ren wrote:
> > LGTM! Reviewed-by: Guo Ren <guoren@kernel.org>
>
> Please provide tags on a new line so that tooling picks them up.
> I had to amend this commit cos I forgot a signoff, so I added it.
Okay, Thx for telling.
>
> Thanks,
> Conor.
--
Best Regards
Guo Ren
^ permalink raw reply [flat|nested] 5+ messages in thread
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2024-05-30 11:18 [PATCH] riscv: dts: thead: th1520: Add PMU event node Inochi Amaoto
2024-05-31 1:43 ` Guo Ren
2024-05-31 15:03 ` Conor Dooley
2024-06-01 3:07 ` Guo Ren
2024-05-31 11:35 ` Conor.Dooley
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