From: Dave Hansen <dave.hansen@intel.com>
To: "Edgecombe, Rick P" <rick.p.edgecombe@intel.com>,
"nik.borisov@suse.com" <nik.borisov@suse.com>,
"kas@kernel.org" <kas@kernel.org>
Cc: "kvm@vger.kernel.org" <kvm@vger.kernel.org>,
"Li, Xiaoyao" <xiaoyao.li@intel.com>,
"Huang, Kai" <kai.huang@intel.com>,
"linux-coco@lists.linux.dev" <linux-coco@lists.linux.dev>,
"Zhao, Yan Y" <yan.y.zhao@intel.com>,
"Wu, Binbin" <binbin.wu@intel.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"seanjc@google.com" <seanjc@google.com>,
"mingo@redhat.com" <mingo@redhat.com>,
"pbonzini@redhat.com" <pbonzini@redhat.com>,
"tglx@linutronix.de" <tglx@linutronix.de>,
"Yamahata, Isaku" <isaku.yamahata@intel.com>,
"Annapurve, Vishal" <vannapurve@google.com>,
"Gao, Chao" <chao.gao@intel.com>, "bp@alien8.de" <bp@alien8.de>,
"x86@kernel.org" <x86@kernel.org>
Subject: Re: [PATCH v4 07/16] x86/virt/tdx: Add tdx_alloc/free_page() helpers
Date: Wed, 3 Dec 2025 12:13:40 -0800 [thread overview]
Message-ID: <408079db-c488-492e-b6e7-063dea3cb861@intel.com> (raw)
In-Reply-To: <8bd4850b0c74fbed531232a4a69603882a5562a1.camel@intel.com>
On 12/3/25 11:59, Edgecombe, Rick P wrote:
> On Wed, 2025-12-03 at 10:21 -0800, Dave Hansen wrote:
>>> Thanks Dave. Yes, let's stick to the spec. I'm going to try to pull the
>>> loops
>>> out too because we can get rid of the union array thing too.
>>
>> Also, I honestly don't see the problem with just allocating an order-1
>> page for this. Yeah, the TDX modules doesn't need physically contiguous
>> pages, but it's easier for _us_ to lug them around if they are
>> physically contiguous.
>
> We have two spin locks to contend with for these allocations. One is the global
> spin lock on the arch/x86 side. In this case, the the pages don't have to be
> passed far, like:
>
> tdx_pamt_get(some_page, NULL)
> page1 = alloc()
> page2 = alloc()
>
> scoped_guard(spinlock, &pamt_lock) {
> tdh_phymem_pamt_add(.., page1, page2)
> /* Pack into struct */
> seamcall()
> }
>
> I think it's not too bad?
No, that's not bad.
The thing I thought was annoying was in the past when there were a bunch
of functions with two explicit page pointers plumbed in to them.
> So if we decide to pass a single order-1 page into tdx_pamt_get() instead of
> order_0_cache, we can stop passing the cache between KVM and arch/x86, but we
> then need two cache's instead of one. One for order-0 S-EPT page tables and one
> for order-1 DPAMT page pairs.
>
> Also, if we have to allocate the order-1 page in each caller, it simplifies the
> arch/x86 code, but duplicates the allocation in the KVM callers (only 2 today
> though).
>
> So I'm suspicious it's not going to be a big win, but I'll give it a try.
Yeah, the value of doing order-1 is super low if it means managing a
second cache.
>> Plus, if you permanently allocate 2 order-0 pages, you are _probably_
>> going to permanently destroy 2 potential future 2MB pages. The order-1
>> allocation will only destroy 1.
>
> Doesn't the buddy allocator try to avoid splitting larger blocks? I guess you
> mean in the worst case, but the DPAMT should also not be allocated forever
> either. So I think it's only at the intersection of two worst cases? Worth it?
It's not splitting them in this case. They're *already* split:
# cat /proc/buddyinfo
...
Node 0, zone Normal 32903 33566 ...
See, there are already ~33,000 4k pages sitting there. Those will be
consumed first on any 4k allocation. So, yeah, it'll avoid splitting an
8k block to get 4k pages normally.
BTW, I *DO* expect the DPAMT pages to be mostly allocated forever. Maybe
I'm just a pessimist, but you can't get them back for compaction or
reclaim, so they're basically untouchable. Sure, if you kill all the TDX
guests you get them back, but that's a very different kind of kernel
memory from stuff that's truly reclaimable under pressure.
next prev parent reply other threads:[~2025-12-03 20:13 UTC|newest]
Thread overview: 106+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-21 0:51 [PATCH v4 00/16] TDX: Enable Dynamic PAMT Rick Edgecombe
2025-11-21 0:51 ` [PATCH v4 01/16] x86/tdx: Move all TDX error defines into <asm/shared/tdx_errno.h> Rick Edgecombe
2025-11-25 22:30 ` Huang, Kai
2025-11-25 22:44 ` Huang, Kai
2025-11-26 23:15 ` Edgecombe, Rick P
2025-11-26 23:14 ` Edgecombe, Rick P
2025-11-21 0:51 ` [PATCH v4 02/16] x86/tdx: Add helpers to check return status codes Rick Edgecombe
2025-11-24 8:56 ` Binbin Wu
2025-11-24 19:31 ` Edgecombe, Rick P
2025-11-25 23:07 ` Huang, Kai
2025-11-26 23:26 ` Edgecombe, Rick P
2025-11-21 0:51 ` [PATCH v4 03/16] x86/virt/tdx: Simplify tdmr_get_pamt_sz() Rick Edgecombe
2025-11-24 9:26 ` Binbin Wu
2025-11-24 19:47 ` Edgecombe, Rick P
2025-11-25 1:27 ` Binbin Wu
2025-11-21 0:51 ` [PATCH v4 04/16] x86/virt/tdx: Allocate page bitmap for Dynamic PAMT Rick Edgecombe
2025-11-25 1:50 ` Binbin Wu
2025-11-26 17:56 ` Edgecombe, Rick P
2025-12-24 9:10 ` Xu Yilun
2026-01-05 22:06 ` Edgecombe, Rick P
2026-01-06 4:01 ` Xu Yilun
2026-01-06 17:00 ` Edgecombe, Rick P
2026-01-07 6:01 ` Xu Yilun
2026-01-07 14:41 ` Edgecombe, Rick P
2026-01-08 12:53 ` Xu Yilun
2026-01-08 16:52 ` Edgecombe, Rick P
2026-01-09 2:18 ` Xu Yilun
2026-01-09 16:05 ` Edgecombe, Rick P
2026-01-12 0:24 ` Xu Yilun
2025-11-21 0:51 ` [PATCH v4 05/16] x86/virt/tdx: Allocate reference counters for PAMT memory Rick Edgecombe
2025-11-21 0:51 ` [PATCH v4 06/16] x86/virt/tdx: Improve PAMT refcounts allocation for sparse memory Rick Edgecombe
2025-11-25 3:15 ` Binbin Wu
2025-11-26 20:47 ` Edgecombe, Rick P
2025-11-27 15:57 ` Kiryl Shutsemau
2025-12-01 22:14 ` Edgecombe, Rick P
2025-11-26 14:45 ` Nikolay Borisov
2025-11-26 20:47 ` Edgecombe, Rick P
2025-11-27 7:36 ` Nikolay Borisov
2025-12-11 0:07 ` Edgecombe, Rick P
2025-11-27 16:04 ` Kiryl Shutsemau
2025-11-21 0:51 ` [PATCH v4 07/16] x86/virt/tdx: Add tdx_alloc/free_page() helpers Rick Edgecombe
2025-11-25 8:09 ` Binbin Wu
2025-11-26 22:28 ` Edgecombe, Rick P
2026-01-29 1:19 ` Sean Christopherson
2026-01-29 17:18 ` Edgecombe, Rick P
2026-01-29 19:09 ` Sean Christopherson
2026-01-29 19:12 ` Edgecombe, Rick P
2025-11-26 1:21 ` Huang, Kai
2025-11-26 22:28 ` Edgecombe, Rick P
2025-11-27 12:29 ` Nikolay Borisov
2025-12-01 22:31 ` Edgecombe, Rick P
2025-11-27 16:11 ` Nikolay Borisov
2025-12-01 22:39 ` Edgecombe, Rick P
2025-12-02 7:38 ` Nikolay Borisov
2025-12-02 20:02 ` Edgecombe, Rick P
2025-12-03 13:46 ` Kiryl Shutsemau
2025-12-03 13:48 ` Nikolay Borisov
2025-12-03 15:41 ` Dave Hansen
2025-12-03 18:15 ` Edgecombe, Rick P
2025-12-03 18:21 ` Dave Hansen
2025-12-03 19:59 ` Edgecombe, Rick P
2025-12-03 20:13 ` Dave Hansen [this message]
2025-12-03 21:39 ` Edgecombe, Rick P
2025-12-03 21:40 ` Dave Hansen
2025-12-08 9:15 ` Yan Zhao
2025-12-08 20:27 ` Edgecombe, Rick P
2026-01-16 23:17 ` Sean Christopherson
2026-01-16 23:25 ` Edgecombe, Rick P
2026-01-16 23:40 ` Dave Hansen
2025-11-21 0:51 ` [PATCH v4 08/16] x86/virt/tdx: Optimize " Rick Edgecombe
2025-11-21 0:51 ` [PATCH v4 09/16] KVM: TDX: Allocate PAMT memory for TD control structures Rick Edgecombe
2025-11-25 9:11 ` Binbin Wu
2025-11-21 0:51 ` [PATCH v4 10/16] KVM: TDX: Allocate PAMT memory for vCPU " Rick Edgecombe
2025-11-25 9:14 ` Binbin Wu
2025-11-21 0:51 ` [PATCH v4 11/16] KVM: TDX: Add x86 ops for external spt cache Rick Edgecombe
2026-01-17 0:53 ` Sean Christopherson
2026-01-19 2:31 ` Yan Zhao
2026-01-20 8:42 ` Huang, Kai
2026-01-20 9:18 ` Yan Zhao
2026-01-20 10:00 ` Huang, Kai
2026-01-20 19:53 ` Edgecombe, Rick P
2026-01-21 22:12 ` Sean Christopherson
2026-01-21 22:34 ` Edgecombe, Rick P
2025-11-21 0:51 ` [PATCH v4 12/16] x86/virt/tdx: Add helpers to allow for pre-allocating pages Rick Edgecombe
2025-11-26 3:40 ` Binbin Wu
2025-11-26 5:21 ` Binbin Wu
2025-11-26 22:33 ` Edgecombe, Rick P
2025-11-27 2:38 ` Binbin Wu
2026-01-20 7:10 ` Huang, Kai
2026-01-20 7:46 ` Yan Zhao
2026-01-20 8:01 ` Huang, Kai
2026-01-17 1:02 ` Sean Christopherson
2026-01-21 0:52 ` Sean Christopherson
2026-01-21 0:58 ` Edgecombe, Rick P
2025-11-21 0:51 ` [PATCH v4 13/16] KVM: TDX: Handle PAMT allocation in fault path Rick Edgecombe
2025-11-26 5:56 ` Binbin Wu
2025-11-26 22:33 ` Edgecombe, Rick P
2025-11-21 0:51 ` [PATCH v4 14/16] KVM: TDX: Reclaim PAMT memory Rick Edgecombe
2025-11-26 8:53 ` Binbin Wu
2025-11-26 22:58 ` Edgecombe, Rick P
2025-11-21 0:51 ` [PATCH v4 15/16] x86/virt/tdx: Enable Dynamic PAMT Rick Edgecombe
2025-11-21 0:51 ` [PATCH v4 16/16] Documentation/x86: Add documentation for TDX's " Rick Edgecombe
2025-11-26 10:33 ` Binbin Wu
2025-11-26 20:05 ` Edgecombe, Rick P
2025-11-24 20:18 ` [PATCH v4 00/16] TDX: Enable " Sagi Shahar
2025-11-25 20:19 ` Vishal Annapurve
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=408079db-c488-492e-b6e7-063dea3cb861@intel.com \
--to=dave.hansen@intel.com \
--cc=binbin.wu@intel.com \
--cc=bp@alien8.de \
--cc=chao.gao@intel.com \
--cc=isaku.yamahata@intel.com \
--cc=kai.huang@intel.com \
--cc=kas@kernel.org \
--cc=kvm@vger.kernel.org \
--cc=linux-coco@lists.linux.dev \
--cc=linux-kernel@vger.kernel.org \
--cc=mingo@redhat.com \
--cc=nik.borisov@suse.com \
--cc=pbonzini@redhat.com \
--cc=rick.p.edgecombe@intel.com \
--cc=seanjc@google.com \
--cc=tglx@linutronix.de \
--cc=vannapurve@google.com \
--cc=x86@kernel.org \
--cc=xiaoyao.li@intel.com \
--cc=yan.y.zhao@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®