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From: Suzuki K Poulose <suzuki.poulose@arm.com>
To: James Clark <james.clark@arm.com>,
	coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org,
	kvmarm@lists.linux.dev, broonie@kernel.org, maz@kernel.org,
	acme@kernel.org
Cc: Oliver Upton <oliver.upton@linux.dev>,
	James Morse <james.morse@arm.com>,
	Zenghui Yu <yuzenghui@huawei.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will@kernel.org>, Mike Leach <mike.leach@linaro.org>,
	Leo Yan <leo.yan@linaro.org>,
	Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	Anshuman Khandual <anshuman.khandual@arm.com>,
	Rob Herring <robh@kernel.org>,
	Miguel Luis <miguel.luis@oracle.com>,
	Jintack Lim <jintack.lim@linaro.org>,
	Ard Biesheuvel <ardb@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Arnd Bergmann <arnd@arndb.de>,
	Kalesh Singh <kaleshsingh@google.com>,
	Quentin Perret <qperret@google.com>,
	Vincent Donnefort <vdonnefort@google.com>,
	Fuad Tabba <tabba@google.com>,
	Kristina Martsenko <kristina.martsenko@arm.com>,
	Akihiko Odaki <akihiko.odaki@daynix.com>,
	Joey Gouly <joey.gouly@arm.com>,
	Jing Zhang <jingzhangos@google.com>,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v4 5/7] arm64: KVM: Add interface to set guest value for TRFCR register
Date: Fri, 5 Jan 2024 09:20:39 +0000	[thread overview]
Message-ID: <41956737-1f6c-4b53-b910-c37355b67480@arm.com> (raw)
In-Reply-To: <20240104162714.1062610-6-james.clark@arm.com>

On 04/01/2024 16:27, James Clark wrote:
> Add an interface for the Coresight driver to use to set the value of the
> TRFCR register for the guest. This register controls the exclude
> settings for trace at different exception levels, and is used to honor
> the exclude_host and exclude_guest parameters from the Perf session.
> This will be used to later write TRFCR_EL1 on nVHE at guest switch. For
> VHE, the host trace is controlled by TRFCR_EL2 and thus we can write to
> the TRFCR_EL1 immediately. Because guest writes to the register are
> trapped, the value will persist and can't be modified.
> 
> Signed-off-by: James Clark <james.clark@arm.com>
> ---
>   arch/arm64/include/asm/kvm_host.h |  3 +++
>   arch/arm64/kvm/debug.c            | 24 ++++++++++++++++++++++++
>   2 files changed, 27 insertions(+)
> 
> diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h
> index 4864a1fcdf89..ee6cba7ee6ee 100644
> --- a/arch/arm64/include/asm/kvm_host.h
> +++ b/arch/arm64/include/asm/kvm_host.h
> @@ -471,6 +471,7 @@ struct kvm_host_global_state {
>   		u32 events_host;
>   		u32 events_guest;
>   	} pmu_events;
> +	u64 guest_trfcr_el1;
>   } ____cacheline_aligned;
>   extern struct kvm_host_global_state kvm_host_global_state[NR_CPUS];
>   
> @@ -1145,6 +1146,7 @@ void kvm_arch_vcpu_put_debug_state_flags(struct kvm_vcpu *vcpu);
>   void kvm_set_pmu_events(u32 set, struct perf_event_attr *attr);
>   void kvm_clr_pmu_events(u32 clr);
>   bool kvm_set_pmuserenr(u64 val);
> +void kvm_etm_set_guest_trfcr(u64 trfcr_guest);
>   #else
>   static inline void kvm_set_pmu_events(u32 set, struct perf_event_attr *attr) {}
>   static inline void kvm_clr_pmu_events(u32 clr) {}
> @@ -1152,6 +1154,7 @@ static inline bool kvm_set_pmuserenr(u64 val)
>   {
>   	return false;
>   }
> +static inline void kvm_etm_set_guest_trfcr(u64 trfcr_guest) {}
>   #endif
>   
>   void kvm_vcpu_load_vhe(struct kvm_vcpu *vcpu);
> diff --git a/arch/arm64/kvm/debug.c b/arch/arm64/kvm/debug.c
> index f86cbfae60f3..d69a0b9d9575 100644
> --- a/arch/arm64/kvm/debug.c
> +++ b/arch/arm64/kvm/debug.c
> @@ -358,3 +358,27 @@ void kvm_arch_vcpu_put_debug_state_flags(struct kvm_vcpu *vcpu)
>   	vcpu_clear_flag(vcpu, DEBUG_STATE_SAVE_TRBE);
>   	vcpu_clear_flag(vcpu, DEBUG_STATE_SAVE_TRFCR);
>   }
> +
> +/*
> + * Interface for the Coresight driver to use to set the value of the TRFCR
> + * register for the guest. This register controls the exclude settings for trace
> + * at different exception levels, and is used to honor the exclude_host and
> + * exclude_guest parameters from the Perf session.
> + *
> + * This will be used to later write TRFCR_EL1 on nVHE at guest switch. For VHE,
> + * the host trace is controlled by TRFCR_EL2 and thus we can write to the
> + * TRFCR_EL1 immediately. Because guest writes to the register are trapped, the
> + * value will persist and can't be modified.
> + */
> +void kvm_etm_set_guest_trfcr(u64 trfcr_guest)
> +{
> +	if (!cpuid_feature_extract_unsigned_field(read_sysreg(id_aa64dfr0_el1),
> +						  ID_AA64DFR0_EL1_TraceFilt_SHIFT))

Perhaps WARN_ON_ONCE() ?

Otherwise,

Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>

> +		return;
> +
> +	if (has_vhe())
> +		write_sysreg_s(trfcr_guest, SYS_TRFCR_EL12);
> +	else
> +		kvm_host_global_state[smp_processor_id()].guest_trfcr_el1 = trfcr_guest;
> +}
> +EXPORT_SYMBOL_GPL(kvm_etm_set_guest_trfcr);


  reply	other threads:[~2024-01-05  9:20 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-01-04 16:27 [PATCH v4 0/7] kvm/coresight: Support exclude guest and exclude host James Clark
2024-01-04 16:27 ` [PATCH v4 1/7] arm64: KVM: Fix renamed function in comment James Clark
2024-01-04 16:58   ` Suzuki K Poulose
2024-01-04 16:27 ` [PATCH v4 2/7] arm64: KVM: Use shared area to pass PMU event state to hypervisor James Clark
2024-01-05  9:40   ` Suzuki K Poulose
2024-02-01 16:14   ` James Clark
2024-02-02 22:00   ` Oliver Upton
2024-02-05 12:16     ` James Clark
2024-02-05 13:04       ` Oliver Upton
2024-02-05 13:15         ` Marc Zyngier
2024-02-05 13:21           ` Oliver Upton
2024-02-05 14:16             ` Marc Zyngier
2024-02-05 14:17             ` James Clark
2024-02-05 14:52               ` Marc Zyngier
2024-02-05 15:37                 ` James Clark
2024-02-05 15:50                   ` Marc Zyngier
2024-02-05 16:38                     ` Oliver Upton
2024-01-04 16:27 ` [PATCH v4 3/7] arm64/sysreg/tools: Move TRFCR definitions to sysreg James Clark
2024-01-05  9:18   ` Suzuki K Poulose
2024-01-05  9:59     ` James Clark
2024-01-04 16:27 ` [PATCH v4 4/7] arm64: KVM: Add iflag for FEAT_TRF James Clark
2024-01-04 16:27 ` [PATCH v4 5/7] arm64: KVM: Add interface to set guest value for TRFCR register James Clark
2024-01-05  9:20   ` Suzuki K Poulose [this message]
2024-01-04 16:27 ` [PATCH v4 6/7] arm64: KVM: Write TRFCR value on guest switch with nVHE James Clark
2024-01-05  9:50   ` Suzuki K Poulose
2024-01-05 10:05     ` James Clark
2024-01-04 16:27 ` [PATCH v4 7/7] coresight: Pass guest TRFCR value to KVM James Clark
2024-01-05  9:55   ` Suzuki K Poulose

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