From: Jose Abreu <Jose.Abreu@synopsys.com>
To: "Ville Syrjälä" <ville.syrjala@linux.intel.com>,
"Jose Abreu" <Jose.Abreu@synopsys.com>
Cc: <dri-devel@lists.freedesktop.org>,
Carlos Palminha <CARLOS.PALMINHA@synopsys.com>,
<linux-kernel@vger.kernel.org>,
Daniel Vetter <daniel.vetter@intel.com>
Subject: Re: [RFC] drm: Parse HDMI 2.0 YCbCr 4:2:0 VDB and VCB
Date: Tue, 10 Jan 2017 12:26:53 +0000 [thread overview]
Message-ID: <4233e877-8ca6-b3d4-e986-a2bf3e17f1e1@synopsys.com> (raw)
In-Reply-To: <20170110111601.GY31595@intel.com>
Hi Ville,
On 10-01-2017 11:16, Ville Syrjälä wrote:
> On Thu, Jan 05, 2017 at 02:46:06PM +0000, Jose Abreu wrote:
>>
[snip]
>> The pixel clock rate is half of the TMDS character rate in 4:2:0
>> (in 24 bit), but for example in deep color 48 bit it will be the
>> same rate. There is also a reduction to half of htotal, hactive,
>> hblank, hfront, hsync and hback but I don't think it's a good
>> solution to guide us from there.
> I was asking if we can look at a specific modeline and whether we
> can tell from that if we would need to output it as 4:2:0.
Hmm, according to HDMI 2.0 spec there are no 4:2:0 only modes and
the only way to figure out if the mode is 4:2:0 only (or able) is
to parse the VCB and VBD blocks from EDID. The clock is half rate
but this is the source that has to figure it out. The mode is
still passed in a regular way (By VIC, by timing, ...).
>
>> Why does it feel wrong to you
>> expanding the uapi?
> Because it requires changing every single userspace kms client. And
> it's not something userspace should have to worry about.
I agree but, as Daniel said [1], we could make these new HDMI 2.0
features optional and only pass them to userspace if client asked
for them. What do you think?
[1]
https://lists.freedesktop.org/archives/dri-devel/2017-January/128683.html
>
>> I think its important to say that the chosen colorspace can
>> improve performance in systems: for example, as I said, 4:2:0
>> 24-bit uses half the rate that RGB 24-bit uses so we have less
>> trafic in the bus. I am recently working with a FPGA connected
>> trough pcie and I can definitely say that this is true. But, as
>> expected, less traffic means less quality in final image so its
>> not a matter of letting kernel decide, I think its a matter of
>> user choosing between performance vs. quality.
> Image quality control for userspace is a much bigger topic. And
> something we have no real precedent for at the moment (apart from
> user choosing a different fb pixel format).
>
> The performance arument is very hardware dependent, and not really
> all that relevant IMO. If the user wants the big mode they either
> get it or not depending on whether the system can deliver.
>
Ok. But note that there is no nice way to figure this out. For
example, for a graphics card it all depends (apart from the
graphics HW) on the PCIe bus. If the bus is not free for enough
data rate then user can reach bottlenecks and not output at best
performance. If we gave user the ability to switch from, for
example, RGB to YCbCr 4:2:0 this bottleneck could be eliminated.
Unless of course we always prefer YCbCr 4:2:0, when possible. I
did this internally for bridge driver dw-hdmi. We always prefer
YCbCr over RGB when they are available. It is user transparent as
the controller does the necessary color space conversion, though,
not ideal in my opinion.
Best regards,
Jose Miguel Abreu
next prev parent reply other threads:[~2017-01-10 12:27 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-12-30 16:53 Jose Abreu
2017-01-04 8:34 ` Daniel Vetter
2017-01-04 10:44 ` Jose Abreu
2017-01-04 13:22 ` Ville Syrjälä
2017-01-04 16:15 ` Jose Abreu
2017-01-04 16:36 ` Ville Syrjälä
2017-01-05 10:07 ` Jose Abreu
2017-01-05 11:46 ` Ville Syrjälä
2017-01-05 14:46 ` Jose Abreu
2017-01-10 11:16 ` Ville Syrjälä
2017-01-10 12:26 ` Jose Abreu [this message]
2017-01-10 15:33 ` Ville Syrjälä
2017-01-10 15:52 ` Ville Syrjälä
2017-01-10 17:01 ` Jose Abreu
2017-01-10 17:21 ` Ville Syrjälä
2017-01-11 10:27 ` Jose Abreu
2017-01-11 11:36 ` Ville Syrjälä
2017-01-16 13:24 ` Jose Abreu
2017-01-16 13:57 ` Ville Syrjälä
2017-01-09 5:22 ` Sharma, Shashank
2017-01-09 11:11 ` Jose Abreu
2017-01-09 12:45 ` Sharma, Shashank
2017-01-09 13:23 ` Jose Abreu
2017-01-09 13:28 ` Sharma, Shashank
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