From: neil.armstrong@linaro.org
To: Mrinmay Sarkar <mrinmay.sarkar@oss.qualcomm.com>,
Vinod Koul <vkoul@kernel.org>,
Kishon Vijay Abraham I <kishon@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>
Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org,
linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
krishna.chundru@oss.qualcomm.com, quic_vbadigan@quicinc.com,
quic_nayiluri@quicinc.com, quic_ramkri@quicinc.com,
quic_nitegupt@quicinc.com,
Mrinmay Sarkar <quic_msarkar@quicinc.com>
Subject: Re: [PATCH v2 1/2] phy: qcom: qmp-pcie: Update PHY settings for SA8775P
Date: Wed, 14 May 2025 18:40:03 +0200 [thread overview]
Message-ID: <43aac8b0-1fec-4b2a-8046-c26f96ca532e@linaro.org> (raw)
In-Reply-To: <20250514-update_phy-v2-1-d4f319221474@quicinc.com>
Hi,
On 14/05/2025 13:37, Mrinmay Sarkar wrote:
> From: Mrinmay Sarkar <mrinmay.sarkar@oss.qualcomm.com>
>
> Make changes to update the PHY settings to align with the latest
> PCIe PHY Hardware Programming Guide for both PCIe controllers
> on the SA8775P platform.
>
> Add the ln_shrd region for SA8775P, incorporating new register
> writes as specified in the updated Hardware Programming Guide.
>
> Update pcs table for QCS8300, since both QCS8300 and SA8775P are
> closely related and share same pcs settings.
>
> Signed-off-by: Mrinmay Sarkar <mrinmay.sarkar@oss.qualcomm.com>
> ---
> drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 89 ++++++++++++----------
> drivers/phy/qualcomm/phy-qcom-qmp-pcs-pcie-v5_20.h | 2 +
> drivers/phy/qualcomm/phy-qcom-qmp-pcs-v5_20.h | 4 +
> .../phy/qualcomm/phy-qcom-qmp-qserdes-ln-shrd-v5.h | 11 +++
> drivers/phy/qualcomm/phy-qcom-qmp.h | 1 +
> 5 files changed, 66 insertions(+), 41 deletions(-
I think the subject should be "Update PHY settings for QCS8300 & SA8775P".
As my comment on patch 2, what's the relationship ? does those PHY settings fix
the "Gen4 stability issues" or are needed for the Gen4 equalization ?
Thanks,
Neil
next prev parent reply other threads:[~2025-05-14 16:40 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-14 11:37 [PATCH v2 0/2] Update PCIe " Mrinmay Sarkar
2025-05-14 11:37 ` [PATCH v2 1/2] phy: qcom: qmp-pcie: Update " Mrinmay Sarkar
2025-05-14 16:40 ` neil.armstrong [this message]
2025-05-17 18:16 ` Konrad Dybcio
[not found] ` <CAMyL0qPmMVt1Wd4fkQsf_pt8ggJhpR=u7GbXtifczK4Xp8yRJA@mail.gmail.com>
2025-05-20 11:03 ` Konrad Dybcio
2025-05-14 11:37 ` [PATCH v2 2/2] arm64: dts: qcom: sa8775p: Remove max link speed property for PCIe EP Mrinmay Sarkar
2025-05-14 16:38 ` neil.armstrong
2025-05-16 9:00 ` Konrad Dybcio
2025-05-16 10:29 ` Mrinmay Sarkar
2025-05-16 22:03 ` Dmitry Baryshkov
2025-05-19 12:16 ` Mrinmay Sarkar
2025-05-20 7:25 ` Neil Armstrong
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