From: "Mao Yilu" <ylmao@mail.ustc.edu.cn>
To: "'Henrique de Moraes Holschuh'" <hmh@hmh.eng.br>
Cc: <linux-kernel@vger.kernel.org>
Subject: RE: TSC unstable on Intel Pentium M processor 750
Date: Thu, 30 Apr 2009 15:40:02 +0800 [thread overview]
Message-ID: <441077283.08393@ustc.edu.cn> (raw)
Message-ID: <70DF5CB591F94B45BBC9BD2D41A047EF@xiaomao> (raw)
In-Reply-To: <441061189.03958@ustc.edu.cn>
> -----Original Message-----
> From: linux-kernel-owner@vger.kernel.org
> [mailto:linux-kernel-owner@vger.kernel.org] On Behalf Of Henrique de Moraes
> Holschuh
> Sent: Thursday, April 30, 2009 11:12 AM
> To: Mao Yilu
> Cc: 'Robert Hancock'; linux-kernel@vger.kernel.org
> Subject: Re: TSC unstable on Intel Pentium M processor 750
>
> On Thu, 30 Apr 2009, Mao Yilu wrote:
> > But I still don't know why the TSC is not correct in the C1 state (hlt
> > instruction). Is there anything more to influence the TSC? What happened
> > when the CPU is not running under hlt instruction?
>
> SMIs? Laptops love that crap...
What is SMIs?
next prev parent reply other threads:[~2009-04-30 7:40 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <9E8AFFF282BE4091BA53C5D4F911F6F0@xiaomao>
2009-04-26 14:59 ` Mao Yilu
2009-04-29 23:50 ` Robert Hancock
[not found] ` <441049102.10204@ustc.edu.cn>
[not found] ` <654E14825BCE4C9B94E5986000DC9BCE@xiaomao>
2009-04-30 0:32 ` Mao Yilu
2009-04-30 3:11 ` Henrique de Moraes Holschuh
[not found] ` <441061189.03958@ustc.edu.cn>
[not found] ` <70DF5CB591F94B45BBC9BD2D41A047EF@xiaomao>
2009-04-30 7:40 ` Mao Yilu [this message]
2009-04-30 14:32 ` Clark Williams
2009-04-30 14:31 ` Henrique de Moraes Holschuh
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