From: Marc Gonzalez <marc.w.gonzalez@free.fr>
To: Bjorn Andersson <bjorn.andersson@linaro.org>,
Jeffrey Hugo <jhugo@codeaurora.org>
Cc: MSM <linux-arm-msm@vger.kernel.org>, LKML <linux-kernel@vger.kernel.org>
Subject: [PATCH] arm64: dts: qcom: msm8998: Fix blsp2_i2c5 address
Date: Fri, 5 Apr 2019 12:36:27 +0200 [thread overview]
Message-ID: <464822ba-8bf9-a287-bf6c-05988c7d9f88@free.fr> (raw)
blsp1_i2c1 is at 0x0c175000
blsp2_i2c5 is at 0x0c1ba000 (the label is correct)
Fixes: 1e71d0c273d0a ("arm64: dts: qcom: msm8998: Enumerate i2c controllers")
Signed-off-by: Marc Gonzalez <marc.w.gonzalez@free.fr>
---
arch/arm64/boot/dts/qcom/msm8998.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi
index a692cbc8dd84..57426bde7580 100644
--- a/arch/arm64/boot/dts/qcom/msm8998.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi
@@ -982,7 +982,7 @@
blsp2_i2c5: i2c@c1ba000 {
compatible = "qcom,i2c-qup-v2.2.1";
- reg = <0x0c175000 0x600>;
+ reg = <0x0c1ba000 0x600>;
interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_BLSP2_QUP6_I2C_APPS_CLK>,
--
2.17.1
next reply other threads:[~2019-04-05 10:36 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-04-05 10:36 Marc Gonzalez [this message]
2019-04-05 14:02 ` Jeffrey Hugo
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