* [PATCH] arm64: dts: qcom: msm8998: Fix blsp2_i2c5 address
@ 2019-04-05 10:36 Marc Gonzalez
2019-04-05 14:02 ` Jeffrey Hugo
0 siblings, 1 reply; 2+ messages in thread
From: Marc Gonzalez @ 2019-04-05 10:36 UTC (permalink / raw)
To: Bjorn Andersson, Jeffrey Hugo; +Cc: MSM, LKML
blsp1_i2c1 is at 0x0c175000
blsp2_i2c5 is at 0x0c1ba000 (the label is correct)
Fixes: 1e71d0c273d0a ("arm64: dts: qcom: msm8998: Enumerate i2c controllers")
Signed-off-by: Marc Gonzalez <marc.w.gonzalez@free.fr>
---
arch/arm64/boot/dts/qcom/msm8998.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi
index a692cbc8dd84..57426bde7580 100644
--- a/arch/arm64/boot/dts/qcom/msm8998.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi
@@ -982,7 +982,7 @@
blsp2_i2c5: i2c@c1ba000 {
compatible = "qcom,i2c-qup-v2.2.1";
- reg = <0x0c175000 0x600>;
+ reg = <0x0c1ba000 0x600>;
interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_BLSP2_QUP6_I2C_APPS_CLK>,
--
2.17.1
^ permalink raw reply [flat|nested] 2+ messages in thread* Re: [PATCH] arm64: dts: qcom: msm8998: Fix blsp2_i2c5 address
2019-04-05 10:36 [PATCH] arm64: dts: qcom: msm8998: Fix blsp2_i2c5 address Marc Gonzalez
@ 2019-04-05 14:02 ` Jeffrey Hugo
0 siblings, 0 replies; 2+ messages in thread
From: Jeffrey Hugo @ 2019-04-05 14:02 UTC (permalink / raw)
To: Marc Gonzalez, Bjorn Andersson; +Cc: MSM, LKML
On 4/5/2019 4:36 AM, Marc Gonzalez wrote:
> blsp1_i2c1 is at 0x0c175000
> blsp2_i2c5 is at 0x0c1ba000 (the label is correct)
>
> Fixes: 1e71d0c273d0a ("arm64: dts: qcom: msm8998: Enumerate i2c controllers")
> Signed-off-by: Marc Gonzalez <marc.w.gonzalez@free.fr>
> ---
> arch/arm64/boot/dts/qcom/msm8998.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi
> index a692cbc8dd84..57426bde7580 100644
> --- a/arch/arm64/boot/dts/qcom/msm8998.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi
> @@ -982,7 +982,7 @@
>
> blsp2_i2c5: i2c@c1ba000 {
> compatible = "qcom,i2c-qup-v2.2.1";
> - reg = <0x0c175000 0x600>;
> + reg = <0x0c1ba000 0x600>;
> interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
>
> clocks = <&gcc GCC_BLSP2_QUP6_I2C_APPS_CLK>,
>
Whoops. Nice catch.
Reviewed-by: Jeffrey Hugo <jhugo@codeaurora.org>
--
Jeffrey Hugo
Qualcomm Datacenter Technologies as an affiliate of Qualcomm
Technologies, Inc.
Qualcomm Technologies, Inc. is a member of the
Code Aurora Forum, a Linux Foundation Collaborative Project.
^ permalink raw reply [flat|nested] 2+ messages in thread
end of thread, other threads:[~2019-04-05 14:02 UTC | newest]
Thread overview: 2+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-04-05 10:36 [PATCH] arm64: dts: qcom: msm8998: Fix blsp2_i2c5 address Marc Gonzalez
2019-04-05 14:02 ` Jeffrey Hugo
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
Powered by JetHome