Re: [PATCH 1/2] dt-bindings: arm: altera: add Agilex7F SoCDK multi-QSPI compatible

["Chan, Genevieve" <genevieve.chan@altera.com>]

On 15/9/2026 6:49 pm, Krzysztof Kozlowski wrote:
 > On Mon, Sep 14, 2026 at 10:50:51AM +0800, Genevieve Chan wrote:
 >> From: Genevieve Chan <genevieve.chan@altera.com>
 >>
 >> Add "intel,socfpga-agilex7f-socdk-multiqspi" for the Agilex7F SoCDK
 >> board variant with multi-QSPI flash support.
 >
 > Why is agilex7f the same as agilex?

Hi Krzysztof,

It is the same SoC. The original Agilex family was renamed to
"Agilex 7" when the Agilex 5 and Agilex 3 families were introduced,
so "Agilex 7 F-Series" is the current product name of the
Agilex F-Series device. The silicon and the HPS are unchanged, which
is why the board uses socfpga_agilex.dtsi and falls back to
"intel,socfpga-agilex", like the existing Agilex SoCDK boards.

Using "agilex7f" in the board compatible creates a confusion, as it
suggests a different SoC. In v2 I will rename it to
"intel,socfpga-agilex-socdk-multiqspi" to follow the existing
"intel,socfpga-agilex-socdk" and "intel,socfpga-agilex-socdk-emmc"
entries.

 > Your commit msg is pretty redundant, just copies diff instead of
 > explaining odd things like why do you have exception from rules in
 > writing bindings.

Understood. With the fixes mentioned earlier, there will no longer be an 
exception to the naming rules. In v2 the commit message will explain how 
this board differs from the standard Agilex SoCDK (the multi-QSPI flash
population) and why it needs its own compatible, instead of
repeating the diff.

Thanks,
Genevieve