From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Achal Verma <a-verma1@ti.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>,
Bjorn Andersson <quic_bjorande@quicinc.com>,
Arnd Bergmann <arnd@arndb.de>,
Geert Uytterhoeven <geert+renesas@glider.be>,
Konrad Dybcio <konrad.dybcio@linaro.org>,
"N_colas F . R . A . Prado" <nfraprado@collabora.com>,
Mark Brown <broonie@kernel.org>, Rafa_ Mi_ecki <rafal@milecki.pl>,
Vignesh Raghavendra <vigneshr@ti.com>, Nishanth Menon <nm@ti.com>,
Milind Parab <mparab@cadence.com>,
Swapnil Kashinath Jakhade <sjakhade@cadence.com>
Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] arm64: defconfig: enable PCIe controller on TI platforms
Date: Tue, 9 May 2023 08:39:25 +0200 [thread overview]
Message-ID: <46b0dbd4-5695-1a2d-8d06-0a60a7c3a151@linaro.org> (raw)
In-Reply-To: <20230509063431.1203367-1-a-verma1@ti.com>
On 09/05/2023 08:34, Achal Verma wrote:
> Enable PCIe controller and serdes drivers to enable PCIe functionality.
> * Enable Cadence serdes phy and wrapper driver.
> * Enable Cadence PCIe controller driver.
Why? IOW, which boards needs it?
>
> Signed-off-by: Achal Verma <a-verma1@ti.com>
> ---
> arch/arm64/configs/defconfig | 15 +++++++++++----
> 1 file changed, 11 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
> index a24609e14d50..ff187dd585c2 100644
> --- a/arch/arm64/configs/defconfig
> +++ b/arch/arm64/configs/defconfig
> @@ -230,9 +230,16 @@ CONFIG_PCIE_HISI_STB=y
> CONFIG_PCIE_TEGRA194_HOST=m
> CONFIG_PCIE_VISCONTI_HOST=y
> CONFIG_PCIE_LAYERSCAPE_GEN4=y
> +CONFIG_PCIE_CADENCE=y
=m
> +CONFIG_PCIE_CADENCE_HOST=y
> +CONFIG_PCIE_CADENCE_EP=y
> +CONFIG_PCI_J721E=y
=m
> +CONFIG_PCI_J721E_HOST=y
> +CONFIG_PCI_J721E_EP=y
> CONFIG_PCI_ENDPOINT=y
> CONFIG_PCI_ENDPOINT_CONFIGFS=y
> CONFIG_PCI_EPF_TEST=m
> +CONFIG_PCI_EPF_NTB=m
> CONFIG_DEVTMPFS=y
> CONFIG_DEVTMPFS_MOUNT=y
> CONFIG_FW_LOADER_USER_HELPER=y
> @@ -1330,8 +1337,8 @@ CONFIG_RESET_TI_SCI=y
> CONFIG_PHY_XGENE=y
> CONFIG_PHY_CAN_TRANSCEIVER=m
> CONFIG_PHY_SUN4I_USB=y
> -CONFIG_PHY_CADENCE_TORRENT=m
> -CONFIG_PHY_CADENCE_SIERRA=m
> +CONFIG_PHY_CADENCE_TORRENT=y
> +CONFIG_PHY_CADENCE_SIERRA=y
Why? Commit msg does not explain it.
> CONFIG_PHY_MIXEL_MIPI_DPHY=m
> CONFIG_PHY_FSL_IMX8M_PCIE=y
> CONFIG_PHY_HI6220_USB=y
> @@ -1363,8 +1370,8 @@ CONFIG_PHY_SAMSUNG_UFS=y
> CONFIG_PHY_UNIPHIER_USB2=y
> CONFIG_PHY_UNIPHIER_USB3=y
> CONFIG_PHY_TEGRA_XUSB=y
> -CONFIG_PHY_AM654_SERDES=m
> -CONFIG_PHY_J721E_WIZ=m
> +CONFIG_PHY_AM654_SERDES=y
> +CONFIG_PHY_J721E_WIZ=y
Why?
> CONFIG_ARM_CCI_PMU=m
> CONFIG_ARM_CCN=m
> CONFIG_ARM_CMN=m
Best regards,
Krzysztof
next prev parent reply other threads:[~2023-05-09 6:40 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-09 6:34 Achal Verma
2023-05-09 6:39 ` Krzysztof Kozlowski [this message]
2023-05-09 8:08 ` Vignesh Raghavendra
2023-05-09 8:28 ` Arnd Bergmann
2023-05-09 9:19 ` [EXTERNAL] " Verma, Achal
2023-05-09 9:31 ` Krzysztof Kozlowski
2023-05-09 10:02 ` Verma, Achal
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