* [PATCH 0/1] Add ExynosAutov920 hsi0 support to exynos-sysreg [not found] <CGME20251117085144epcas2p25da059e85e91568711fb1232487159e0@epcas2p2.samsung.com> @ 2025-11-17 8:51 ` Sanghoon Bae [not found] ` <CGME20251117085146epcas2p303931d9501af51f08639b17ab7cbe34b@epcas2p3.samsung.com> [not found] ` <CGME20251117085152epcas2p28df73e111ad216fc8356baad51864797@epcas2p2.samsung.com> 0 siblings, 2 replies; 5+ messages in thread From: Sanghoon Bae @ 2025-11-17 8:51 UTC (permalink / raw) To: robh, krzk, conor+dt, vkoul, alim.akhtar, kishon Cc: krzk+dt, linux-kernel, devicetree, linux-samsung-soc, sowon.na, Sanghoon Bae The ExynosAutov920 SoC includes a PCIe IP and a hsi0 register block that is mapped in the exynos-sysreg. To manage PCIe PHY power, configure the PCIe PLL, and set the device direction, the hsi0 registers need to be defined in exynos-sysreg. This patch must be applied before the ExynosAutov920 PCIe PHY is enabled. Sanghoon Bae (1): dt-bindings: soc: samsung: exynos-sysreg: add hsi0 for ExynosAutov920 .../devicetree/bindings/soc/samsung/samsung,exynos-sysreg.yaml | 1 + 1 file changed, 1 insertion(+) -- 2.45.2 ^ permalink raw reply [flat|nested] 5+ messages in thread
[parent not found: <CGME20251117085146epcas2p303931d9501af51f08639b17ab7cbe34b@epcas2p3.samsung.com>]
* [PATCH 1/1] dt-bindings: soc: samsung: exynos-sysreg: add hsi0 for ExynosAutov920 [not found] ` <CGME20251117085146epcas2p303931d9501af51f08639b17ab7cbe34b@epcas2p3.samsung.com> @ 2025-11-17 8:51 ` Sanghoon Bae 2025-11-17 9:23 ` Krzysztof Kozlowski 0 siblings, 1 reply; 5+ messages in thread From: Sanghoon Bae @ 2025-11-17 8:51 UTC (permalink / raw) To: robh, krzk, conor+dt, vkoul, alim.akhtar, kishon Cc: krzk+dt, linux-kernel, devicetree, linux-samsung-soc, sowon.na, Sanghoon Bae Add hsi0 compatible for ExynosAutov920 PCIe settings for: - PCIe PHY power control - PLL settings for PCIe - PCIe device direction (RC/EP) Signed-off-by: Sanghoon Bae <sh86.bae@samsung.com> --- .../devicetree/bindings/soc/samsung/samsung,exynos-sysreg.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/soc/samsung/samsung,exynos-sysreg.yaml b/Documentation/devicetree/bindings/soc/samsung/samsung,exynos-sysreg.yaml index d27ed6c9d61e..a44fd24ed0ea 100644 --- a/Documentation/devicetree/bindings/soc/samsung/samsung,exynos-sysreg.yaml +++ b/Documentation/devicetree/bindings/soc/samsung/samsung,exynos-sysreg.yaml @@ -30,6 +30,7 @@ properties: - samsung,exynos8895-fsys1-sysreg - samsung,exynos8895-peric0-sysreg - samsung,exynos8895-peric1-sysreg + - samsung,exynosautov920-hsi0-sysreg - samsung,exynosautov920-peric0-sysreg - samsung,exynosautov920-peric1-sysreg - tesla,fsd-cam-sysreg -- 2.45.2 ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH 1/1] dt-bindings: soc: samsung: exynos-sysreg: add hsi0 for ExynosAutov920 2025-11-17 8:51 ` [PATCH 1/1] dt-bindings: soc: samsung: exynos-sysreg: add hsi0 for ExynosAutov920 Sanghoon Bae @ 2025-11-17 9:23 ` Krzysztof Kozlowski 2026-02-12 8:16 ` Sanghoon Bae 0 siblings, 1 reply; 5+ messages in thread From: Krzysztof Kozlowski @ 2025-11-17 9:23 UTC (permalink / raw) To: Sanghoon Bae, robh, conor+dt, vkoul, alim.akhtar, kishon Cc: krzk+dt, linux-kernel, devicetree, linux-samsung-soc, sowon.na On 17/11/2025 09:51, Sanghoon Bae wrote: > Add hsi0 compatible for ExynosAutov920 PCIe settings for: > - PCIe PHY power control > - PLL settings for PCIe > - PCIe device direction (RC/EP) > > Signed-off-by: Sanghoon Bae <sh86.bae@samsung.com> > --- > .../devicetree/bindings/soc/samsung/samsung,exynos-sysreg.yaml | 1 + > 1 file changed, 1 insertion(+) You miss an user for this binding. Best regards, Krzysztof ^ permalink raw reply [flat|nested] 5+ messages in thread
* RE: [PATCH 1/1] dt-bindings: soc: samsung: exynos-sysreg: add hsi0 for ExynosAutov920 2025-11-17 9:23 ` Krzysztof Kozlowski @ 2026-02-12 8:16 ` Sanghoon Bae 0 siblings, 0 replies; 5+ messages in thread From: Sanghoon Bae @ 2026-02-12 8:16 UTC (permalink / raw) To: 'Krzysztof Kozlowski', robh, conor+dt, vkoul, alim.akhtar, kishon Cc: krzk+dt, linux-kernel, devicetree, linux-samsung-soc, sowon.na > On 17/11/2025 09:51, Sanghoon Bae wrote: > > Add hsi0 compatible for ExynosAutov920 PCIe settings for: > > - PCIe PHY power control > > - PLL settings for PCIe > > - PCIe device direction (RC/EP) > > > > Signed-off-by: Sanghoon Bae <sh86.bae@samsung.com> > > --- > > .../devicetree/bindings/soc/samsung/samsung,exynos-sysreg.yaml | 1 + > > 1 file changed, 1 insertion(+) > > You miss an user for this binding. Will add the dt node for samsung,exynosautov920-hsi0-sysreg in the patchset. ^ permalink raw reply [flat|nested] 5+ messages in thread
[parent not found: <CGME20251117085152epcas2p28df73e111ad216fc8356baad51864797@epcas2p2.samsung.com>]
* [PATCH 0/1] Add ExynosAutov920 hsi0 support to exynos-sysreg [not found] ` <CGME20251117085152epcas2p28df73e111ad216fc8356baad51864797@epcas2p2.samsung.com> @ 2025-11-17 8:51 ` Sanghoon Bae 0 siblings, 0 replies; 5+ messages in thread From: Sanghoon Bae @ 2025-11-17 8:51 UTC (permalink / raw) To: robh, krzk, conor+dt, vkoul, alim.akhtar, kishon Cc: krzk+dt, linux-kernel, devicetree, linux-samsung-soc, sowon.na, Sanghoon Bae The ExynosAutov920 SoC includes a PCIe IP and a hsi0 register block that is mapped in the exynos-sysreg. To manage PCIe PHY power, configure the PCIe PLL, and set the device direction, the hsi0 registers need to be defined in exynos-sysreg. This patch must be applied before the ExynosAutov920 PCIe PHY is enabled. Sanghoon Bae (1): dt-bindings: soc: samsung: exynos-sysreg: add hsi0 for ExynosAutov920 .../devicetree/bindings/soc/samsung/samsung,exynos-sysreg.yaml | 1 + 1 file changed, 1 insertion(+) -- 2.45.2 ^ permalink raw reply [flat|nested] 5+ messages in thread
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[not found] <CGME20251117085144epcas2p25da059e85e91568711fb1232487159e0@epcas2p2.samsung.com>
2025-11-17 8:51 ` [PATCH 0/1] Add ExynosAutov920 hsi0 support to exynos-sysreg Sanghoon Bae
[not found] ` <CGME20251117085146epcas2p303931d9501af51f08639b17ab7cbe34b@epcas2p3.samsung.com>
2025-11-17 8:51 ` [PATCH 1/1] dt-bindings: soc: samsung: exynos-sysreg: add hsi0 for ExynosAutov920 Sanghoon Bae
2025-11-17 9:23 ` Krzysztof Kozlowski
2026-02-12 8:16 ` Sanghoon Bae
[not found] ` <CGME20251117085152epcas2p28df73e111ad216fc8356baad51864797@epcas2p2.samsung.com>
2025-11-17 8:51 ` [PATCH 0/1] Add ExynosAutov920 hsi0 support to exynos-sysreg Sanghoon Bae
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