From: Konrad Dybcio <konrad.dybcio@linaro.org>
To: Tengfei Fan <quic_tengfan@quicinc.com>,
agross@kernel.org, andersson@kernel.org, tglx@linutronix.de,
maz@kernel.org, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org,
catalin.marinas@arm.com, will@kernel.org
Cc: geert+renesas@glider.be, arnd@arndb.de,
neil.armstrong@linaro.org, nfraprado@collabora.com,
rafal@milecki.pl, peng.fan@nxp.com,
linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
quic_tsoni@quicinc.com, quic_shashim@quicinc.com,
quic_kaushalk@quicinc.com, quic_tdas@quicinc.com,
quic_tingweiz@quicinc.com, quic_aiquny@quicinc.com,
quic_ajipan@quicinc.com, kernel@quicinc.com
Subject: Re: [PATCH v3 2/5] arm64: dts: qcom: sm4450: Add apps_rsc and cmd_db node
Date: Wed, 20 Sep 2023 12:14:56 +0200 [thread overview]
Message-ID: <479ce1da-10e5-589d-cb98-e7fef98c5543@linaro.org> (raw)
In-Reply-To: <20230920065459.12738-3-quic_tengfan@quicinc.com>
On 9/20/23 08:54, Tengfei Fan wrote:
> From: Ajit Pandey <quic_ajipan@quicinc.com>
>
> Add apps_rsc node and cmd_db memory region for sm4450.
>
> Signed-off-by: Ajit Pandey <quic_ajipan@quicinc.com>
> Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
> ---
> arch/arm64/boot/dts/qcom/sm4450.dtsi | 35 ++++++++++++++++++++++++++++
> 1 file changed, 35 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm4450.dtsi b/arch/arm64/boot/dts/qcom/sm4450.dtsi
> index c4e5b33f5169..3d9d3b5e9510 100644
> --- a/arch/arm64/boot/dts/qcom/sm4450.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm4450.dtsi
> @@ -5,6 +5,7 @@
>
> #include <dt-bindings/gpio/gpio.h>
> #include <dt-bindings/interrupt-controller/arm-gic.h>
> +#include <dt-bindings/soc/qcom,rpmh-rsc.h>
>
> / {
> interrupt-parent = <&intc>;
> @@ -328,6 +329,18 @@
> };
> };
>
> + reserved_memory: reserved-memory {
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> +
> + aop_cmd_db_mem: cmd-db@80860000 {
> + compatible = "qcom,cmd-db";
> + reg = <0x0 0x80860000 0x0 0x20000>;
> + no-map;
> + };
> + };
> +
> soc: soc@0 {
> #address-cells = <2>;
> #size-cells = <2>;
> @@ -419,6 +432,28 @@
> status = "disabled";
> };
> };
> +
> + apps_rsc: rsc@17a00000 {
> + compatible = "qcom,rpmh-rsc";
> + reg = <0 0x17a00000 0 0x10000>,
> + <0 0x17a10000 0 0x10000>,
> + <0 0x17a20000 0 0x10000>;
0x0 for consistency
> + reg-names = "drv-0", "drv-1", "drv-2";
> + interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
> + label = "apps_rsc";
> + qcom,tcs-offset = <0xd00>;
> + qcom,drv-id = <2>;
> + qcom,tcs-config = <ACTIVE_TCS 2>, <SLEEP_TCS 3>,
> + <WAKE_TCS 3>, <CONTROL_TCS 0>;
You haven't addressed Bjorn's comment about the number of
CONTROL_TCSes, are you sure 0 is correct?
Konrad
next prev parent reply other threads:[~2023-09-20 10:15 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-20 6:54 [PATCH v3 0/5] soc: qcom: Add uart console support for SM4450 Tengfei Fan
2023-09-20 6:54 ` [PATCH v3 1/5] dt-bindings: interrupt-controller: qcom,pdc: document qcom,sm4450-pdc Tengfei Fan
2023-09-20 6:54 ` [PATCH v3 2/5] arm64: dts: qcom: sm4450: Add apps_rsc and cmd_db node Tengfei Fan
2023-09-20 10:14 ` Konrad Dybcio [this message]
2023-09-22 1:24 ` Tengfei Fan
2023-09-20 6:54 ` [PATCH v3 3/5] arm64: dts: qcom: sm4450: Add RPMH and Global clock Tengfei Fan
2023-09-20 10:00 ` Konrad Dybcio
2023-09-22 1:27 ` Tengfei Fan
2023-09-22 5:51 ` Tengfei Fan
2023-09-20 6:54 ` [PATCH v3 4/5] arm64: dts: qcom: add uart console support for SM4450 Tengfei Fan
2023-09-20 10:03 ` Konrad Dybcio
2023-09-22 2:36 ` Tengfei Fan
2023-09-20 6:54 ` [PATCH v3 5/5] arm64: defconfig: enable clock controller and pinctrl " Tengfei Fan
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