* [PATCH v4 1/2] dt-bindings: mailbox: mediatek,mt8196-vcp-mbox: add mtk vcp-mbox document
2025-08-20 9:45 [PATCH v4 0/2] add VCP mailbox driver Jjian Zhou
@ 2025-08-20 9:45 ` Jjian Zhou
2025-08-20 10:30 ` Krzysztof Kozlowski
2025-08-20 13:32 ` Rob Herring (Arm)
2025-08-20 9:45 ` [PATCH v4 2/2] mailbox: mediatek: Add mtk-vcp-mailbox driver Jjian Zhou
1 sibling, 2 replies; 5+ messages in thread
From: Jjian Zhou @ 2025-08-20 9:45 UTC (permalink / raw)
To: Jassi Brar, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Matthias Brugger, AngeloGioacchino Del Regno, Jjian Zhou,
Chen-Yu Tsai
Cc: linux-kernel, devicetree, linux-arm-kernel, linux-mediatek,
Project_Global_Chrome_Upstream_Group, Jjian Zhou
The MTK VCP mailbox enables the SoC to communicate with the VCP by passing
messages through 64 32-bit wide registers. It has 32 interrupt vectors in
either direction for signalling purposes.
This adds a binding for Mediatek VCP mailbox.
Signed-off-by: Jjian Zhou <jjian.zhou@mediatek.com>
---
.../mailbox/mediatek,mt8196-vcp-mbox.yaml | 49 +++++++++++++++++++
1 file changed, 49 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mailbox/mediatek,mt8196-vcp-mbox.yaml
diff --git a/Documentation/devicetree/bindings/mailbox/mediatek,mt8196-vcp-mbox.yaml b/Documentation/devicetree/bindings/mailbox/mediatek,mt8196-vcp-mbox.yaml
new file mode 100644
index 000000000000..bd1b024e22f1
--- /dev/null
+++ b/Documentation/devicetree/bindings/mailbox/mediatek,mt8196-vcp-mbox.yaml
@@ -0,0 +1,49 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mailbox/mtk,mt8196-vcp-mbox.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MediaTek Video Companion Processor (VCP) mailbox
+
+maintainers:
+ - Jjian Zhou <Jjian.Zhou@mediatek.com>
+
+description:
+ The MTK VCP mailbox enables the SoC to communicate with the VCP by passing
+ messages through 64 32-bit wide registers. It has 32 interrupt vectors in
+ either direction for signalling purposes.
+
+properties:
+ compatible:
+ enum:
+ - mediatek,mt8196-vcp-mbox
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ "#mbox-cells":
+ const: 0
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - "#mbox-cells"
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+
+ mailbox@31b80000 {
+ compatible = "mediatek,mt8196-vcp-mbox";
+ reg = <0x31b80000 0x1000>;
+ interrupts = <GIC_SPI 789 IRQ_TYPE_LEVEL_HIGH 0>;
+ #mbox-cells = <0>;
+ };
--
2.45.2
^ permalink raw reply [flat|nested] 5+ messages in thread* [PATCH v4 2/2] mailbox: mediatek: Add mtk-vcp-mailbox driver
2025-08-20 9:45 [PATCH v4 0/2] add VCP mailbox driver Jjian Zhou
2025-08-20 9:45 ` [PATCH v4 1/2] dt-bindings: mailbox: mediatek,mt8196-vcp-mbox: add mtk vcp-mbox document Jjian Zhou
@ 2025-08-20 9:45 ` Jjian Zhou
1 sibling, 0 replies; 5+ messages in thread
From: Jjian Zhou @ 2025-08-20 9:45 UTC (permalink / raw)
To: Jassi Brar, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Matthias Brugger, AngeloGioacchino Del Regno, Jjian Zhou,
Chen-Yu Tsai
Cc: linux-kernel, devicetree, linux-arm-kernel, linux-mediatek,
Project_Global_Chrome_Upstream_Group, Jjian Zhou
Add mtk-vcp-mailbox driver to support the communication with
VCP remote microprocessor.
Signed-off-by: Jjian Zhou <jjian.zhou@mediatek.com>
---
drivers/mailbox/Kconfig | 9 ++
drivers/mailbox/Makefile | 2 +
drivers/mailbox/mtk-vcp-mailbox.c | 174 ++++++++++++++++++++++++
include/linux/mailbox/mtk-vcp-mailbox.h | 32 +++++
4 files changed, 217 insertions(+)
create mode 100644 drivers/mailbox/mtk-vcp-mailbox.c
create mode 100644 include/linux/mailbox/mtk-vcp-mailbox.h
diff --git a/drivers/mailbox/Kconfig b/drivers/mailbox/Kconfig
index 02432d4a5ccd..c28bdb855663 100644
--- a/drivers/mailbox/Kconfig
+++ b/drivers/mailbox/Kconfig
@@ -294,6 +294,15 @@ config MTK_CMDQ_MBOX
critical time limitation, such as updating display configuration
during the vblank.
+config MTK_VCP_MBOX
+ tristate "MediaTek VCP Mailbox Support"
+ depends on ARCH_MEDIATEK || COMPILE_TEST
+ help
+ Say yes here to add support for the MediaTek VCP mailbox driver.
+ The mailbox implementation provides access from the application
+ processor to Video Companion Processor Unit.
+ If unsure say N.
+
config ZYNQMP_IPI_MBOX
tristate "Xilinx ZynqMP IPI Mailbox"
depends on ARCH_ZYNQMP && OF
diff --git a/drivers/mailbox/Makefile b/drivers/mailbox/Makefile
index 98a68f838486..07278871d254 100644
--- a/drivers/mailbox/Makefile
+++ b/drivers/mailbox/Makefile
@@ -63,6 +63,8 @@ obj-$(CONFIG_MTK_ADSP_MBOX) += mtk-adsp-mailbox.o
obj-$(CONFIG_MTK_CMDQ_MBOX) += mtk-cmdq-mailbox.o
+obj-$(CONFIG_MTK_VCP_MBOX) += mtk-vcp-mailbox.o
+
obj-$(CONFIG_ZYNQMP_IPI_MBOX) += zynqmp-ipi-mailbox.o
obj-$(CONFIG_SUN6I_MSGBOX) += sun6i-msgbox.o
diff --git a/drivers/mailbox/mtk-vcp-mailbox.c b/drivers/mailbox/mtk-vcp-mailbox.c
new file mode 100644
index 000000000000..6f48215896d2
--- /dev/null
+++ b/drivers/mailbox/mtk-vcp-mailbox.c
@@ -0,0 +1,174 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2025 MediaTek Corporation. All rights reserved.
+ * Author: Jjian Zhou <jjian.zhou.@mediatek.com>
+ */
+
+#include <linux/interrupt.h>
+#include <linux/io.h>
+#include <linux/kernel.h>
+#include <linux/mailbox_controller.h>
+#include <linux/mailbox/mtk-vcp-mailbox.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+
+struct mtk_vcp_mbox_priv {
+ void __iomem *base;
+ struct device *dev;
+ struct mbox_controller mbox;
+ const struct mtk_vcp_mbox_cfg *cfg;
+ struct mtk_ipi_info ipi_recv;
+};
+
+struct mtk_vcp_mbox_cfg {
+ u32 set_in;
+ u32 clr_out;
+};
+
+static inline struct mtk_vcp_mbox_priv *get_mtk_vcp_mbox_priv(struct mbox_controller *mbox)
+{
+ return container_of(mbox, struct mtk_vcp_mbox_priv, mbox);
+}
+
+static irqreturn_t mtk_vcp_mbox_irq_thread(int irq, void *data)
+{
+ struct mbox_chan *chan = data;
+ struct mtk_vcp_mbox_priv *priv = get_mtk_vcp_mbox_priv(chan->mbox);
+
+ /* get irq status */
+ priv->ipi_recv.irq_status = readl(priv->base + priv->cfg->clr_out);
+
+ __ioread32_copy(priv->ipi_recv.msg, priv->base, MBOX_SLOT_MAX_SIZE / 4);
+
+ mbox_chan_received_data(chan, &priv->ipi_recv);
+
+ /* clear irq status */
+ writel(priv->ipi_recv.irq_status, priv->base + priv->cfg->clr_out);
+
+ return IRQ_HANDLED;
+}
+
+static struct mbox_chan *mtk_vcp_mbox_xlate(struct mbox_controller *mbox,
+ const struct of_phandle_args *sp)
+{
+ if (sp->args_count)
+ return NULL;
+
+ return mbox->chans;
+}
+
+static int mtk_vcp_mbox_send_data(struct mbox_chan *chan, void *data)
+{
+ struct mtk_vcp_mbox_priv *priv = get_mtk_vcp_mbox_priv(chan->mbox);
+ struct mtk_ipi_info *ipi_info = data;
+ u32 status;
+
+ if (!ipi_info->msg) {
+ dev_err(priv->dev, "msg buffer is NULL.\n");
+ return -EINVAL;
+ }
+
+ status = readl(priv->base + priv->cfg->set_in) & BIT(ipi_info->index);
+ if (status) {
+ dev_warn(priv->dev, "mailbox IPI %d is busy.\n", ipi_info->id);
+ return -EBUSY;
+ }
+
+ if (ipi_info->slot_ofs + ipi_info->len > MBOX_SLOT_MAX_SIZE)
+ return -EINVAL;
+ __iowrite32_copy(priv->base + ipi_info->slot_ofs, ipi_info->msg,
+ ipi_info->len);
+
+ writel(BIT(ipi_info->index), priv->base + priv->cfg->set_in);
+
+ return 0;
+}
+
+static bool mtk_vcp_mbox_last_tx_done(struct mbox_chan *chan)
+{
+ struct mtk_ipi_info *ipi_info = chan->active_req;
+ struct mtk_vcp_mbox_priv *priv = get_mtk_vcp_mbox_priv(chan->mbox);
+
+ return !(readl(priv->base + priv->cfg->set_in) & BIT(ipi_info->index));
+}
+
+static const struct mbox_chan_ops mtk_vcp_mbox_chan_ops = {
+ .send_data = mtk_vcp_mbox_send_data,
+ .last_tx_done = mtk_vcp_mbox_last_tx_done,
+};
+
+static int mtk_vcp_mbox_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct mtk_vcp_mbox_priv *priv;
+ struct mbox_controller *mbox;
+ int ret, irq;
+
+ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
+
+ priv->dev = dev;
+ mbox = &priv->mbox;
+ mbox->dev = dev;
+ mbox->ops = &mtk_vcp_mbox_chan_ops;
+ mbox->txdone_irq = false;
+ mbox->txdone_poll = true;
+ mbox->of_xlate = mtk_vcp_mbox_xlate;
+ mbox->num_chans = 1;
+ mbox->chans = devm_kzalloc(dev, sizeof(*mbox->chans), GFP_KERNEL);
+ if (!mbox->chans)
+ return -ENOMEM;
+
+ priv->ipi_recv.msg = devm_kzalloc(dev, MBOX_SLOT_MAX_SIZE, GFP_KERNEL);
+ if (!priv->ipi_recv.msg)
+ return -ENOMEM;
+
+ priv->base = devm_platform_ioremap_resource(pdev, 0);
+ if (IS_ERR(priv->base))
+ return PTR_ERR(priv->base);
+
+ priv->cfg = of_device_get_match_data(dev);
+ if (!priv->cfg)
+ return -EINVAL;
+
+ irq = platform_get_irq(pdev, 0);
+ if (irq < 0)
+ return irq;
+
+ ret = devm_request_threaded_irq(dev, irq, NULL,
+ mtk_vcp_mbox_irq_thread, IRQF_ONESHOT,
+ dev_name(dev), mbox->chans);
+ if (ret < 0)
+ return ret;
+
+ platform_set_drvdata(pdev, priv);
+
+ return devm_mbox_controller_register(dev, &priv->mbox);
+}
+
+static const struct mtk_vcp_mbox_cfg mt8196_cfg = {
+ .set_in = 0x100,
+ .clr_out = 0x10C,
+};
+
+static const struct of_device_id mtk_vcp_mbox_of_match[] = {
+ { .compatible = "mediatek,mt8196-vcp-mbox", .data = &mt8196_cfg },
+ {},
+};
+MODULE_DEVICE_TABLE(of, mtk_vcp_mbox_of_match);
+
+static struct platform_driver mtk_vcp_mbox_driver = {
+ .probe = mtk_vcp_mbox_probe,
+ .driver = {
+ .name = "mtk_vcp_mbox",
+ .of_match_table = mtk_vcp_mbox_of_match,
+ },
+};
+module_platform_driver(mtk_vcp_mbox_driver);
+
+MODULE_AUTHOR("Jjian Zhou <jjian.zhou@mediatek.com>");
+MODULE_DESCRIPTION("MTK VCP Mailbox Controller");
+MODULE_LICENSE("GPL");
diff --git a/include/linux/mailbox/mtk-vcp-mailbox.h b/include/linux/mailbox/mtk-vcp-mailbox.h
new file mode 100644
index 000000000000..143fb0d06e30
--- /dev/null
+++ b/include/linux/mailbox/mtk-vcp-mailbox.h
@@ -0,0 +1,32 @@
+/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
+/*
+ * Copyright (c) 2025 MediaTek Inc.
+ */
+
+#ifndef __MTK_VCP_MAILBOX_H__
+#define __MTK_VCP_MAILBOX_H__
+
+#define MBOX_SLOT_MAX_SIZE 0x100 /* mbox max slot size */
+
+/**
+ * struct mtk_ipi_info - mailbox message info for mtk-vcp-mailbox
+ * @msg: The share buffer between IPC and mailbox driver
+ * @len: Message length
+ * @id: This is for identification purposes and not actually used
+ * by the mailbox hardware.
+ * @index: The signal number of the mailbox message.
+ * @slot_ofs: Data slot offset.
+ * @irq_status: Captures incoming signals for the RX path.
+ *
+ * It is used between IPC with mailbox driver.
+ */
+struct mtk_ipi_info {
+ void *msg;
+ u32 len;
+ u32 id;
+ u32 index;
+ u32 slot_ofs;
+ u32 irq_status;
+};
+
+#endif
--
2.45.2
^ permalink raw reply [flat|nested] 5+ messages in thread