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* [PATCH] powerpc 4xx: DDR0_14[REDUC] decoded incorrectly
@ 2009-03-09 16:21 Mikhail Zolotaryov
  2009-03-09 17:12 ` Josh Boyer
  0 siblings, 1 reply; 3+ messages in thread
From: Mikhail Zolotaryov @ 2009-03-09 16:21 UTC (permalink / raw)
  To: linux-kernel; +Cc: linuxppc-dev, jwboyer

[-- Attachment #1: Type: text/plain, Size: 434 bytes --]

Hi,

according to the PPC440EPx Embedded Processor User Manual (rev 1.14) 
DDR0_14[REDUC] bit has the following meaning:

REDUC - Enable the half data path feature of the controller
0 = Standard operation using full 64/72-bit memory bus
1 = Memory data path width is 32/40 bits

However, "1" is decoded as 64 bit (8 byte), "0" - as 32 bit (4 byte) bus 
by the kernel code. My understanding is this is not correct - patch 
attached.



[-- Attachment #2: patch-ibm4xx_denali_fixup_memsize.patch --]
[-- Type: text/plain, Size: 412 bytes --]

--- linux.orig/arch/powerpc/boot/4xx.c	2009-03-09 17:55:01.000000000 +0200
+++ linux/arch/powerpc/boot/4xx.c	2009-03-09 17:58:07.000000000 +0200
@@ -193,9 +193,9 @@
 	val = SDRAM0_READ(DDR0_14);
 
 	if (DDR_GET_VAL(val, DDR_REDUC, DDR_REDUC_SHIFT))
-		dpath = 8; /* 64 bits */
-	else
 		dpath = 4; /* 32 bits */
+	else
+		dpath = 8; /* 64 bits */
 
 	/* get address pins (rows) */
  	val = SDRAM0_READ(DDR0_42);

^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2009-03-09 21:17 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2009-03-09 16:21 [PATCH] powerpc 4xx: DDR0_14[REDUC] decoded incorrectly Mikhail Zolotaryov
2009-03-09 17:12 ` Josh Boyer
2009-03-09 21:17   ` Mikhail Zolotaryov

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