From: "H. Peter Anvin" <hpa@zytor.com>
To: Jiri Slaby <jirislaby@gmail.com>
Cc: borislav.petkov@amd.com, x86@kernel.org,
Linux kernel mailing list <linux-kernel@vger.kernel.org>
Subject: Re: intel_cacheinfo: potential NULL dereference?
Date: Tue, 22 Jun 2010 08:15:47 -0700 [thread overview]
Message-ID: <4C20D3A3.9010709@zytor.com> (raw)
In-Reply-To: <4C209C6E.3060302@gmail.com>
On 06/22/2010 04:20 AM, Jiri Slaby wrote:
> On 06/22/2010 01:18 PM, Jiri Slaby wrote:
>> Hi,
>>
>> commit 9350f982 changed the code so it looks like:
>> static ssize_t store_cache_disable(struct _cpuid4_info *this_leaf,
>> const char *buf, size_t count,
>> unsigned int slot)
>> {
>> struct pci_dev *dev = this_leaf->l3->dev; <<1>>
>> int cpu = cpumask_first(to_cpumask(this_leaf->shared_cpu_map));
>> unsigned long val = 0;
>>
>> #define SUBCACHE_MASK (3UL << 20)
>> #define SUBCACHE_INDEX 0xfff
>>
>> if (!this_leaf->l3 || !this_leaf->l3->can_disable) <<2>>
>> return -EINVAL;
>>
>> Stanse found, that this_leaf->l3 is dereferenced at <<1>>, but checked
>> for being NULL at <<2>>. Is the check superfluous or the dev assignment
>> should go after the check?
>
> Oh, and I have another report with same symptoms for show_cache_disable.
>
Looks broken to me, indeed.
-hpa
--
H. Peter Anvin, Intel Open Source Technology Center
I work for Intel. I don't speak on their behalf.
prev parent reply other threads:[~2010-06-22 15:16 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-06-22 11:18 Jiri Slaby
2010-06-22 11:20 ` Jiri Slaby
2010-06-22 13:08 ` Borislav Petkov
2010-06-22 14:11 ` Jiri Slaby
2010-06-22 17:09 ` H. Peter Anvin
2010-06-22 19:19 ` Borislav Petkov
2010-06-22 19:45 ` [PATCH -v2] x86, cacheinfo: Carve out L3 cache slot accessors Borislav Petkov
2010-06-22 15:15 ` H. Peter Anvin [this message]
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