* [PATCH -tip] perf, x86: P4 PMU - Restore code alignment
@ 2011-03-27 20:46 Cyrill Gorcunov
2011-03-29 9:16 ` [tip:perf/core] perf, x86: P4 PMU - clean up the code a bit tip-bot for Cyrill Gorcunov
0 siblings, 1 reply; 2+ messages in thread
From: Cyrill Gorcunov @ 2011-03-27 20:46 UTC (permalink / raw)
To: Ingo Molnar; +Cc: lkml, Lin Ming
No change on functional level. This code style nit escaped
me somewhere at very first commits.
Signed-off-by: Cyrill Gorcunov <gorcunov@openvz.org>
---
Found it while were at perf-p4 code for nmi-watchdog reason
so decided to fix it just to not forget after. Note the other code
already aligned this way so this snippet stabs my eyes.
arch/x86/kernel/cpu/perf_event_p4.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/x86/kernel/cpu/perf_event_p4.c b/arch/x86/kernel/cpu/perf_event_p4.c
index c2520e1..8ff882f 100644
--- a/arch/x86/kernel/cpu/perf_event_p4.c
+++ b/arch/x86/kernel/cpu/perf_event_p4.c
@@ -468,7 +468,7 @@ static struct p4_event_bind p4_event_bind_map[] = {
.opcode = P4_OPCODE(P4_EVENT_MISPRED_BRANCH_RETIRED),
.escr_msr = { MSR_P4_CRU_ESCR0, MSR_P4_CRU_ESCR1 },
.escr_emask =
- P4_ESCR_EMASK_BIT(P4_EVENT_MISPRED_BRANCH_RETIRED, NBOGUS),
+ P4_ESCR_EMASK_BIT(P4_EVENT_MISPRED_BRANCH_RETIRED, NBOGUS),
.cntr = { {12, 13, 16}, {14, 15, 17} },
},
[P4_EVENT_X87_ASSIST] = {
--
Cyrill
^ permalink raw reply [flat|nested] 2+ messages in thread
* [tip:perf/core] perf, x86: P4 PMU - clean up the code a bit
2011-03-27 20:46 [PATCH -tip] perf, x86: P4 PMU - Restore code alignment Cyrill Gorcunov
@ 2011-03-29 9:16 ` tip-bot for Cyrill Gorcunov
0 siblings, 0 replies; 2+ messages in thread
From: tip-bot for Cyrill Gorcunov @ 2011-03-29 9:16 UTC (permalink / raw)
To: linux-tip-commits
Cc: linux-kernel, hpa, mingo, gorcunov, ming.m.lin, tglx, mingo
Commit-ID: 1d321881afb955bba1e0a8f50d3a04e111fcb581
Gitweb: http://git.kernel.org/tip/1d321881afb955bba1e0a8f50d3a04e111fcb581
Author: Cyrill Gorcunov <gorcunov@openvz.org>
AuthorDate: Mon, 28 Mar 2011 00:46:11 +0400
Committer: Ingo Molnar <mingo@elte.hu>
CommitDate: Tue, 29 Mar 2011 09:36:33 +0200
perf, x86: P4 PMU - clean up the code a bit
No change on the functional level, just align the table properly.
Signed-off-by: Cyrill Gorcunov <gorcunov@openvz.org>
Cc: Lin Ming <ming.m.lin@intel.com>
LKML-Reference: <4D8FA213.5050108@openvz.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
---
arch/x86/kernel/cpu/perf_event_p4.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/x86/kernel/cpu/perf_event_p4.c b/arch/x86/kernel/cpu/perf_event_p4.c
index c2520e1..8ff882f 100644
--- a/arch/x86/kernel/cpu/perf_event_p4.c
+++ b/arch/x86/kernel/cpu/perf_event_p4.c
@@ -468,7 +468,7 @@ static struct p4_event_bind p4_event_bind_map[] = {
.opcode = P4_OPCODE(P4_EVENT_MISPRED_BRANCH_RETIRED),
.escr_msr = { MSR_P4_CRU_ESCR0, MSR_P4_CRU_ESCR1 },
.escr_emask =
- P4_ESCR_EMASK_BIT(P4_EVENT_MISPRED_BRANCH_RETIRED, NBOGUS),
+ P4_ESCR_EMASK_BIT(P4_EVENT_MISPRED_BRANCH_RETIRED, NBOGUS),
.cntr = { {12, 13, 16}, {14, 15, 17} },
},
[P4_EVENT_X87_ASSIST] = {
^ permalink raw reply [flat|nested] 2+ messages in thread
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