From: Tomoya MORINAGA <tomoya-linux@dsn.lapis-semi.com>
To: Tomoya MORINAGA <tomoya-linux@dsn.lapis-semi.com>
Cc: Jean Delvare <khali@linux-fr.org>,
Ben Dooks <ben-linux@fluff.org>,
Wolfram Sang <w.sang@pengutronix.de>, Qi Wang <qi.wang@intel.com>,
Linus Walleij <linus.walleij@stericsson.com>,
linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org,
yong.y.wang@intel.com, joel.clark@intel.com,
kok.howg.ewe@intel.com
Subject: Re: [PATCH 3/7 v3] i2c-eg20t: delete 10bit access processing
Date: Thu, 06 Oct 2011 16:00:22 +0900 [thread overview]
Message-ID: <4E8D5206.4080608@dsn.lapis-semi.com> (raw)
In-Reply-To: <1317884192-10694-4-git-send-email-tomoya-linux@dsn.lapis-semi.com>
(2011/10/06 15:56), Tomoya MORINAGA wrote:
Previous [PATCH 3/7] is duplicated like below.
[PATCH 3/7 v3] i2c-eg20t: delete 10bit access processing
[PATCH 3/7 v1] i2c-eg20t: Fix 10bit access issue
Please ignore "[PATCH 3/7 v3] i2c-eg20t: delete 10bit access processing"
Sorry for the in inconvenience.
--
tomoya
ROHM Co., Ltd.
> From: Tomoya MORINAGA<tomoya-linux@dsn.okisemi.com>
>
> Linux I2C core doesn't support 10bit access formally.
> Additionally, we can't test with 10bit mode.
> This patch deletes the 10bit access processing.
>
> Signed-off-by: Tomoya MORINAGA<tomoya-linux@dsn.lapis-semi.com>
> ---
> drivers/i2c/busses/i2c-eg20t.c | 3 +--
> 1 files changed, 1 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/i2c/busses/i2c-eg20t.c b/drivers/i2c/busses/i2c-eg20t.c
> index c5b9924..aa1705e 100644
> --- a/drivers/i2c/busses/i2c-eg20t.c
> +++ b/drivers/i2c/busses/i2c-eg20t.c
> @@ -410,7 +410,7 @@ static s32 pch_i2c_writebytes(struct i2c_adapter *i2c_adap,
> }
>
> if (msgs->flags& I2C_M_TEN) {
> - addr_2_msb = ((addr& I2C_MSB_2B_MSK)>> 7);
> + addr_2_msb = ((addr& I2C_MSB_2B_MSK)>> 7)& 0x06;
> iowrite32(addr_2_msb | TEN_BIT_ADDR_MASK, p + PCH_I2CDR);
> if (first)
> pch_i2c_start(adap);
> @@ -515,7 +515,6 @@ static s32 pch_i2c_readbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs,
> if (msgs->flags& I2C_M_TEN) {
> addr_2_msb = (((addr& I2C_MSB_2B_MSK)>> 7) | (I2C_RD));
> iowrite32(addr_2_msb | TEN_BIT_ADDR_MASK, p + PCH_I2CDR);
> -
> } else {
> /* 7 address bits + R/W bit */
> addr = (((addr)<< 1) | (I2C_RD));
next prev parent reply other threads:[~2011-10-06 7:00 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-10-06 6:56 [PATCH 1/7 v3] i2c-eg20t: Fix bus-idle waiting issue Tomoya MORINAGA
2011-10-06 6:56 ` [PATCH 2/7 v3] i2c-eg20t: Modify returned value s32 to long Tomoya MORINAGA
2011-10-06 6:56 ` [PATCH 3/7 v1] i2c-eg20t: Fix 10bit access issue Tomoya MORINAGA
2011-10-06 6:56 ` [PATCH 3/7 v3] i2c-eg20t: delete 10bit access processing Tomoya MORINAGA
2011-10-06 7:00 ` Tomoya MORINAGA [this message]
2011-10-06 6:56 ` [PATCH 4/7 v3] i2c-eg20t: Separate error processing Tomoya MORINAGA
2011-10-06 6:56 ` [PATCH 5/7 v3] i2c-eg20t: add stop sequence in case wait-event timeout occurs Tomoya MORINAGA
2011-10-06 6:56 ` [PATCH 6/7 v3] i2c-eg20t: Fix flag setting issue Tomoya MORINAGA
2011-10-06 6:56 ` [PATCH 7/7 v3] i2c-eg20t: Add initialize processing in case i2c-error occurs Tomoya MORINAGA
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