From: Bibek Kumar Patro <quic_bibekkum@quicinc.com>
To: Pavan Kondeti <quic_pkondeti@quicinc.com>
Cc: <will@kernel.org>, <robin.murphy@arm.com>, <joro@8bytes.org>,
<dmitry.baryshkov@linaro.org>, <konrad.dybcio@linaro.org>,
<jsnitsel@redhat.com>, <quic_bjorande@quicinc.com>,
<mani@kernel.org>, <quic_eberman@quicinc.com>,
<robdclark@chromium.org>, <u.kleine-koenig@pengutronix.de>,
<robh@kernel.org>, <vladimir.oltean@nxp.com>,
<quic_molvera@quicinc.com>, <linux-arm-msm@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>, <iommu@lists.linux.dev>,
<linux-kernel@vger.kernel.org>,
<qipl.kernel.upstream@quicinc.com>
Subject: Re: [PATCH v7 3/5] iommu/arm-smmu: introduction of ACTLR for custom prefetcher settings
Date: Wed, 10 Jan 2024 18:25:24 +0530 [thread overview]
Message-ID: <4a595815-7fcc-47e2-b22c-dac349af6d79@quicinc.com> (raw)
In-Reply-To: <ec31fafa-b912-454a-8b64-e0593911aaf2@quicinc.com>
On 1/10/2024 4:46 PM, Bibek Kumar Patro wrote:
>
>
> On 1/10/2024 9:36 AM, Pavan Kondeti wrote:
[...]
>>> @@ -274,6 +321,21 @@ static const struct of_device_id
>>> qcom_smmu_client_of_match[] __maybe_unused = {
>>> static int qcom_smmu_init_context(struct arm_smmu_domain *smmu_domain,
>>> struct io_pgtable_cfg *pgtbl_cfg, struct device *dev)
>>> {
>>> + struct arm_smmu_device *smmu = smmu_domain->smmu;
>>> + struct qcom_smmu *qsmmu = to_qcom_smmu(smmu);
>>> + const struct actlr_variant *actlrvar;
>>> + int cbndx = smmu_domain->cfg.cbndx;
>>> +
>>> + if (qsmmu->data->actlrvar) {
>>> + actlrvar = qsmmu->data->actlrvar;
>>> + for (; actlrvar->io_start; actlrvar++) {
>>> + if (actlrvar->io_start == smmu->ioaddr) {
>>> + qcom_smmu_set_actlr(dev, smmu, cbndx,
>>> actlrvar->actlrcfg);
>>> + break;
>>> + }
>>> + }
>>> + }
>>> +
>>
>> This block and the one in qcom_adreno_smmu_init_context() are exactly
>> the same. Possible to do some refactoring?
>>
>
> I will check if this repeated blocks can be accomodated this into
> qcom_smmu_set_actlr function if that would be fine.
>
Also adding to this, this might increase the number of indentation
inside qcom_smmu_set_actlr as well, to around 5. So wouldn't this
be an issue?
Thanks,
Bibek
next prev parent reply other threads:[~2024-01-10 12:55 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-09 11:42 [PATCH v7 0/5] iommu/arm-smmu: introduction of ACTLR implementation for Qualcomm SoCs Bibek Kumar Patro
2024-01-09 11:42 ` [PATCH v7 1/5] iommu/arm-smmu: re-enable context caching in smmu reset operation Bibek Kumar Patro
2024-01-10 11:00 ` Konrad Dybcio
2024-01-10 11:17 ` Bibek Kumar Patro
2024-01-09 11:42 ` [PATCH v7 2/5] iommu/arm-smmu: refactor qcom_smmu structure to include single pointer Bibek Kumar Patro
2024-01-09 11:42 ` [PATCH v7 3/5] iommu/arm-smmu: introduction of ACTLR for custom prefetcher settings Bibek Kumar Patro
2024-01-10 4:06 ` Pavan Kondeti
2024-01-10 11:16 ` Bibek Kumar Patro
2024-01-10 12:55 ` Bibek Kumar Patro [this message]
2024-01-10 17:56 ` Konrad Dybcio
2024-01-11 18:09 ` Bibek Kumar Patro
2024-01-12 10:01 ` Konrad Dybcio
2024-01-12 13:06 ` Bibek Kumar Patro
2024-01-12 13:14 ` Dmitry Baryshkov
2024-01-16 11:42 ` Bibek Kumar Patro
2024-01-09 11:42 ` [PATCH v7 4/5] iommu/arm-smmu: add ACTLR data and support for SM8550 Bibek Kumar Patro
2024-01-10 4:35 ` Pavan Kondeti
2024-01-10 10:49 ` Konrad Dybcio
2024-01-10 11:35 ` Bibek Kumar Patro
2024-01-09 11:42 ` [PATCH v7 5/5] iommu/arm-smmu: add ACTLR data and support for SC7280 Bibek Kumar Patro
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