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* [PATCH v2] usb: dwc2: Change TxFIFO and RxFIFO flushing flow
@ 2017-12-08  8:30 Minas Harutyunyan
  0 siblings, 0 replies; only message in thread
From: Minas Harutyunyan @ 2017-12-08  8:30 UTC (permalink / raw)
  To: John Youn, Felipe Balbi, Greg Kroah-Hartman, linux-usb, linux-kernel
  Cc: Minas Harutyunyan

Before flushing fifos required to check AHB master state and
flush when AHB master is in IDLE state.

Signed-off-by: Minas Harutyunyan <hminas@synopsys.com>
---
 drivers/usb/dwc2/core.c | 27 +++++++++++++++++++++++++++
 1 file changed, 27 insertions(+)

diff --git a/drivers/usb/dwc2/core.c b/drivers/usb/dwc2/core.c
index dbca3b8890da..4d2a8c452e6b 100644
--- a/drivers/usb/dwc2/core.c
+++ b/drivers/usb/dwc2/core.c
@@ -670,10 +670,23 @@ void dwc2_flush_tx_fifo(struct dwc2_hsotg *hsotg, const int num)
 
 	dev_vdbg(hsotg->dev, "Flush Tx FIFO %d\n", num);
 
+	/* Wait for AHB master IDLE state */
+	do {
+		greset = dwc2_readl(hsotg->regs + GRSTCTL);
+		if (++count > 10000) {
+			dev_warn(hsotg->dev,
+				 "%s() HANG! AHB Idle GRSTCTL=%0x\n",
+				 __func__, greset);
+			return;
+		}
+		udelay(1);
+	} while (!(greset & GRSTCTL_AHBIDLE));
+
 	greset = GRSTCTL_TXFFLSH;
 	greset |= num << GRSTCTL_TXFNUM_SHIFT & GRSTCTL_TXFNUM_MASK;
 	dwc2_writel(greset, hsotg->regs + GRSTCTL);
 
+	count = 0;
 	do {
 		greset = dwc2_readl(hsotg->regs + GRSTCTL);
 		if (++count > 10000) {
@@ -702,9 +715,23 @@ void dwc2_flush_rx_fifo(struct dwc2_hsotg *hsotg)
 
 	dev_vdbg(hsotg->dev, "%s()\n", __func__);
 
+	/* Wait for AHB master IDLE state */
+	do {
+		greset = dwc2_readl(hsotg->regs + GRSTCTL);
+		if (++count > 10000) {
+			dev_warn(hsotg->dev,
+				 "%s() HANG! AHB Idle GRSTCTL=%0x\n",
+				 __func__, greset);
+			return;
+		}
+		udelay(1);
+	} while (!(greset & GRSTCTL_AHBIDLE));
+
 	greset = GRSTCTL_RXFFLSH;
 	dwc2_writel(greset, hsotg->regs + GRSTCTL);
 
+	/* Wait for RxFIFO flush done */
+	count = 0;
 	do {
 		greset = dwc2_readl(hsotg->regs + GRSTCTL);
 		if (++count > 10000) {
-- 
2.11.0

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2017-12-08  8:30 [PATCH v2] usb: dwc2: Change TxFIFO and RxFIFO flushing flow Minas Harutyunyan

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