From: Anshuman Khandual <anshuman.khandual@arm.com>
To: Ryan Roberts <ryan.roberts@arm.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
James Morse <james.morse@arm.com>
Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [RFC PATCH v1 1/2] arm64: tlbflush: Move invocation of __flush_tlb_range_op() to a macro
Date: Thu, 11 Sep 2025 11:20:07 +0530 [thread overview]
Message-ID: <4ac449f1-d5cc-42d6-bded-2db6984d55f0@arm.com> (raw)
In-Reply-To: <20250829153510.2401161-2-ryan.roberts@arm.com>
On 29/08/25 9:05 PM, Ryan Roberts wrote:
> __flush_tlb_range_op() is a pre-processor macro that takes the TLBI
> operation as a string, and builds the instruction from it. This prevents
> passing the TLBI operation around as a variable. __flush_tlb_range_op()
> also takes 7 other arguments.
>
> Adding extra invocations for different TLB operations means duplicating
> the whole thing, but those 7 extra arguments are the same each time.
>
> Add an enum for the TLBI operations that __flush_tlb_range() uses, and a
> macro to pass the operation name as a string to __flush_tlb_range_op(),
> and the rest of the arguments using __VA_ARGS_.
>
> The result is easier to add new TLBI operations to, and to modify any of
> the other arguments as they only appear once.
>
> Suggested-by: James Morse <james.morse@arm.com>
> Signed-off-by: Ryan Roberts <ryan.roberts@arm.com>
> ---
> arch/arm64/include/asm/tlbflush.h | 30 ++++++++++++++++++++++++------
> 1 file changed, 24 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm64/include/asm/tlbflush.h b/arch/arm64/include/asm/tlbflush.h
> index 18a5dc0c9a54..f66b8c4696d0 100644
> --- a/arch/arm64/include/asm/tlbflush.h
> +++ b/arch/arm64/include/asm/tlbflush.h
> @@ -11,6 +11,7 @@
> #ifndef __ASSEMBLY__
>
> #include <linux/bitfield.h>
> +#include <linux/build_bug.h>
> #include <linux/mm_types.h>
> #include <linux/sched.h>
> #include <linux/mmu_notifier.h>
> @@ -433,12 +434,32 @@ static inline bool __flush_tlb_range_limit_excess(unsigned long start,
> return false;
> }
>
> +enum tlbi_op {
> + TLBI_VALE1IS,
> + TLBI_VAE1IS,
> +};
> +
> +#define flush_tlb_range_op(op, ...) \
> +do { \
> + switch (op) { \
> + case TLBI_VALE1IS: \
> + __flush_tlb_range_op(vale1is, __VA_ARGS__); \
> + break; \
> + case TLBI_VAE1IS: \
> + __flush_tlb_range_op(vae1is, __VA_ARGS__); \
> + break; \
> + default: \
> + BUILD_BUG_ON_MSG(1, "Unknown TLBI op"); \
> + } \
> +} while (0)
> +
> static inline void __flush_tlb_range_nosync(struct mm_struct *mm,
> unsigned long start, unsigned long end,
> unsigned long stride, bool last_level,
> int tlb_level)
> {
> unsigned long asid, pages;
> + enum tlbi_op tlbi_op;
>
> start = round_down(start, stride);
> end = round_up(end, stride);
> @@ -452,12 +473,9 @@ static inline void __flush_tlb_range_nosync(struct mm_struct *mm,
> dsb(ishst);
> asid = ASID(mm);
>
> - if (last_level)
> - __flush_tlb_range_op(vale1is, start, pages, stride, asid,
> - tlb_level, true, lpa2_is_enabled());
> - else
> - __flush_tlb_range_op(vae1is, start, pages, stride, asid,
> - tlb_level, true, lpa2_is_enabled());
> + tlbi_op = last_level ? TLBI_VALE1IS : TLBI_VAE1IS;
> + flush_tlb_range_op(tlbi_op, start, pages, stride, asid, tlb_level,
> + true, lpa2_is_enabled());
>
> mmu_notifier_arch_invalidate_secondary_tlbs(mm, start, end);
> }
Should the remaining __flush_tlb_range_op() in flush_tlb_kernel_range()
converted into flush_tlb_range_op() adding another similar enum variable
i.e TLBI_VAALE1IS ? Because this will ensure that there is one variant
helper i.e flush_tlb_range_op() that gets called.
diff --git a/arch/arm64/include/asm/tlbflush.h b/arch/arm64/include/asm/tlbflush.h
index f66b8c4696d0..a23169751deb 100644
--- a/arch/arm64/include/asm/tlbflush.h
+++ b/arch/arm64/include/asm/tlbflush.h
@@ -437,6 +437,7 @@ static inline bool __flush_tlb_range_limit_excess(unsigned long start,
enum tlbi_op {
TLBI_VALE1IS,
TLBI_VAE1IS,
+ TLBI_VAALE1IS,
};
#define flush_tlb_range_op(op, ...) \
@@ -448,6 +449,9 @@ do { \
case TLBI_VAE1IS: \
__flush_tlb_range_op(vae1is, __VA_ARGS__); \
break; \
+ case TLBI_VAALE1IS: \
+ __flush_tlb_range_op(vaale1is, __VA_ARGS__); \
+ break; \
default: \
BUILD_BUG_ON_MSG(1, "Unknown TLBI op"); \
} \
@@ -517,7 +521,7 @@ static inline void flush_tlb_kernel_range(unsigned long start, unsigned long end
}
dsb(ishst);
- __flush_tlb_range_op(vaale1is, start, pages, stride, 0,
+ flush_tlb_range_op(TLBI_VAALE1IS, start, pages, stride, 0,
TLBI_TTL_UNKNOWN, false, lpa2_is_enabled());
dsb(ish);
isb();
next prev parent reply other threads:[~2025-09-11 5:50 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-29 15:35 [RFC PATCH v1 0/2] Don't broadcast TLBI if mm was only active on local CPU Ryan Roberts
2025-08-29 15:35 ` [RFC PATCH v1 1/2] arm64: tlbflush: Move invocation of __flush_tlb_range_op() to a macro Ryan Roberts
2025-09-02 16:25 ` Catalin Marinas
2025-09-11 5:50 ` Anshuman Khandual [this message]
2025-09-11 14:12 ` Ryan Roberts
2025-08-29 15:35 ` [RFC PATCH v1 2/2] arm64: tlbflush: Don't broadcast if mm was only active on local cpu Ryan Roberts
2025-09-01 9:08 ` Alexandru Elisei
2025-09-01 9:18 ` Ryan Roberts
2025-09-02 16:23 ` Catalin Marinas
2025-09-02 16:54 ` Ryan Roberts
2025-09-10 23:58 ` Yang Shi
2025-09-11 1:20 ` Huang, Ying
2025-09-11 14:19 ` Ryan Roberts
2025-09-11 22:29 ` Yang Shi
2025-09-18 15:18 ` Catalin Marinas
2025-09-02 16:47 ` [RFC PATCH v1 0/2] Don't broadcast TLBI if mm was only active on local CPU Catalin Marinas
2025-09-02 16:56 ` Ryan Roberts
2025-09-15 16:05 ` Christoph Lameter (Ampere)
2025-09-03 2:12 ` Huang, Ying
2025-09-15 16:02 ` Christoph Lameter (Ampere)
2025-09-10 10:57 ` Huang, Ying
2025-09-10 12:42 ` Ryan Roberts
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