[PATCH v2 1/2] KVM: VMX: Cleanup VMX basic information defines and usages

[PATCH v2 1/2] KVM: VMX: Cleanup VMX basic information defines and usages

[Xin Li (Intel)]

From: Xin Li <xin3.li@intel.com>

Define VMX basic information fields with BIT_ULL()/GENMASK_ULL(), and
replace hardcoded VMX basic numbers with these macros.

Per Sean's ask, read MSR_IA32_VMX_BASIC into an u64 to get rid of the
hi/lo crud.

Tested-by: Shan Kang <shan.kang@intel.com>
Signed-off-by: Xin Li <xin3.li@intel.com>
---

Changes since v1:
* Don't add field shift macros unless it's really needed, extra layer
  of indirect makes it harder to read (Sean Christopherson).
* Add a static_assert() to ensure that VMX_BASIC_FEATURES_MASK doesn't
  overlap with VMX_BASIC_RESERVED_BITS (Sean Christopherson).
* read MSR_IA32_VMX_BASIC into an u64 rather than 2 u32 (Sean
  Christopherson).
* Add 2 new functions for extracting fields from VMX basic (Sean
  Christopherson).
* Drop the tools header update (Sean Christopherson).
* Move VMX basic field macros to arch/x86/include/asm/vmx.h.
---
 arch/x86/include/asm/msr-index.h |  9 ---------
 arch/x86/include/asm/vmx.h       | 16 ++++++++++++++++
 arch/x86/kvm/vmx/nested.c        | 25 ++++++++++++++++++-------
 arch/x86/kvm/vmx/vmx.c           | 22 ++++++++++------------
 4 files changed, 44 insertions(+), 28 deletions(-)

diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index 8bcbebb56b8f..d83195f53e33 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -1084,15 +1084,6 @@
 #define MSR_IA32_VMX_VMFUNC             0x00000491
 #define MSR_IA32_VMX_PROCBASED_CTLS3	0x00000492
 
-/* VMX_BASIC bits and bitmasks */
-#define VMX_BASIC_VMCS_SIZE_SHIFT	32
-#define VMX_BASIC_TRUE_CTLS		(1ULL << 55)
-#define VMX_BASIC_64		0x0001000000000000LLU
-#define VMX_BASIC_MEM_TYPE_SHIFT	50
-#define VMX_BASIC_MEM_TYPE_MASK	0x003c000000000000LLU
-#define VMX_BASIC_MEM_TYPE_WB	6LLU
-#define VMX_BASIC_INOUT		0x0040000000000000LLU
-
 /* Resctrl MSRs: */
 /* - Intel: */
 #define MSR_IA32_L3_QOS_CFG		0xc81
diff --git a/arch/x86/include/asm/vmx.h b/arch/x86/include/asm/vmx.h
index 0e73616b82f3..f919397900f1 100644
--- a/arch/x86/include/asm/vmx.h
+++ b/arch/x86/include/asm/vmx.h
@@ -120,6 +120,12 @@
 
 #define VM_ENTRY_ALWAYSON_WITHOUT_TRUE_MSR	0x000011ff
 
+/* VMX_BASIC bits and bitmasks */
+#define VMX_BASIC_32BIT_PHYS_ADDR_ONLY		BIT_ULL(48)
+#define VMX_BASIC_MEM_TYPE_WB			6LLU
+#define VMX_BASIC_INOUT				BIT_ULL(54)
+
+/* VMX_MISC bits and bitmasks */
 #define VMX_MISC_PREEMPTION_TIMER_RATE_MASK	0x0000001f
 #define VMX_MISC_SAVE_EFER_LMA			0x00000020
 #define VMX_MISC_ACTIVITY_HLT			0x00000040
@@ -143,6 +149,16 @@ static inline u32 vmx_basic_vmcs_size(u64 vmx_basic)
 	return (vmx_basic & GENMASK_ULL(44, 32)) >> 32;
 }
 
+static inline u32 vmx_basic_vmcs_basic_cap(u64 vmx_basic)
+{
+	return (vmx_basic & GENMASK_ULL(63, 45)) >> 32;
+}
+
+static inline u32 vmx_basic_vmcs_mem_type(u64 vmx_basic)
+{
+	return (vmx_basic & GENMASK_ULL(53, 50)) >> 50;
+}
+
 static inline int vmx_misc_preemption_timer_rate(u64 vmx_misc)
 {
 	return vmx_misc & VMX_MISC_PREEMPTION_TIMER_RATE_MASK;
diff --git a/arch/x86/kvm/vmx/nested.c b/arch/x86/kvm/vmx/nested.c
index 4ba46e1b29d2..274d480d9071 100644
--- a/arch/x86/kvm/vmx/nested.c
+++ b/arch/x86/kvm/vmx/nested.c
@@ -1201,23 +1201,34 @@ static bool is_bitwise_subset(u64 superset, u64 subset, u64 mask)
 	return (superset | subset) == superset;
 }
 
+#define VMX_BASIC_VMCS_SIZE_SHIFT		32
+#define VMX_BASIC_DUAL_MONITOR_TREATMENT	BIT_ULL(49)
+#define VMX_BASIC_MEM_TYPE_SHIFT		50
+#define VMX_BASIC_TRUE_CTLS			BIT_ULL(55)
+
+#define VMX_BASIC_FEATURES_MASK			\
+	(VMX_BASIC_DUAL_MONITOR_TREATMENT |	\
+	 VMX_BASIC_INOUT |			\
+	 VMX_BASIC_TRUE_CTLS)
+
+#define VMX_BASIC_RESERVED_BITS			\
+	(GENMASK_ULL(63, 56) | GENMASK_ULL(47, 45) | BIT_ULL(31))
+
 static int vmx_restore_vmx_basic(struct vcpu_vmx *vmx, u64 data)
 {
-	const u64 feature_and_reserved =
-		/* feature (except bit 48; see below) */
-		BIT_ULL(49) | BIT_ULL(54) | BIT_ULL(55) |
-		/* reserved */
-		BIT_ULL(31) | GENMASK_ULL(47, 45) | GENMASK_ULL(63, 56);
 	u64 vmx_basic = vmcs_config.nested.basic;
 
-	if (!is_bitwise_subset(vmx_basic, data, feature_and_reserved))
+	static_assert(!(VMX_BASIC_FEATURES_MASK & VMX_BASIC_RESERVED_BITS));
+
+	if (!is_bitwise_subset(vmx_basic, data,
+			       VMX_BASIC_FEATURES_MASK | VMX_BASIC_RESERVED_BITS))
 		return -EINVAL;
 
 	/*
 	 * KVM does not emulate a version of VMX that constrains physical
 	 * addresses of VMX structures (e.g. VMCS) to 32-bits.
 	 */
-	if (data & BIT_ULL(48))
+	if (data & VMX_BASIC_32BIT_PHYS_ADDR_ONLY)
 		return -EINVAL;
 
 	if (vmx_basic_vmcs_revision_id(vmx_basic) !=
diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
index 4c3a70f26b42..b68d54f6e9f8 100644
--- a/arch/x86/kvm/vmx/vmx.c
+++ b/arch/x86/kvm/vmx/vmx.c
@@ -2568,14 +2568,13 @@ static u64 adjust_vmx_controls64(u64 ctl_opt, u32 msr)
 static int setup_vmcs_config(struct vmcs_config *vmcs_conf,
 			     struct vmx_capability *vmx_cap)
 {
-	u32 vmx_msr_low, vmx_msr_high;
 	u32 _pin_based_exec_control = 0;
 	u32 _cpu_based_exec_control = 0;
 	u32 _cpu_based_2nd_exec_control = 0;
 	u64 _cpu_based_3rd_exec_control = 0;
 	u32 _vmexit_control = 0;
 	u32 _vmentry_control = 0;
-	u64 misc_msr;
+	u64 vmx_basic;
 	int i;
 
 	/*
@@ -2693,28 +2692,26 @@ static int setup_vmcs_config(struct vmcs_config *vmcs_conf,
 		_vmexit_control &= ~x_ctrl;
 	}
 
-	rdmsr(MSR_IA32_VMX_BASIC, vmx_msr_low, vmx_msr_high);
+	rdmsrl(MSR_IA32_VMX_BASIC, vmx_basic);
 
 	/* IA-32 SDM Vol 3B: VMCS size is never greater than 4kB. */
-	if ((vmx_msr_high & 0x1fff) > PAGE_SIZE)
+	if ((vmx_basic_vmcs_size(vmx_basic) > PAGE_SIZE))
 		return -EIO;
 
 #ifdef CONFIG_X86_64
 	/* IA-32 SDM Vol 3B: 64-bit CPUs always have VMX_BASIC_MSR[48]==0. */
-	if (vmx_msr_high & (1u<<16))
+	if (vmx_basic & VMX_BASIC_32BIT_PHYS_ADDR_ONLY)
 		return -EIO;
 #endif
 
 	/* Require Write-Back (WB) memory type for VMCS accesses. */
-	if (((vmx_msr_high >> 18) & 15) != 6)
+	if (vmx_basic_vmcs_mem_type(vmx_basic) != VMX_BASIC_MEM_TYPE_WB)
 		return -EIO;
 
-	rdmsrl(MSR_IA32_VMX_MISC, misc_msr);
-
-	vmcs_conf->size = vmx_msr_high & 0x1fff;
-	vmcs_conf->basic_cap = vmx_msr_high & ~0x1fff;
+	vmcs_conf->size = vmx_basic_vmcs_size(vmx_basic);
+	vmcs_conf->basic_cap = vmx_basic_vmcs_basic_cap(vmx_basic);
 
-	vmcs_conf->revision_id = vmx_msr_low;
+	vmcs_conf->revision_id = vmx_basic_vmcs_revision_id(vmx_basic);
 
 	vmcs_conf->pin_based_exec_ctrl = _pin_based_exec_control;
 	vmcs_conf->cpu_based_exec_ctrl = _cpu_based_exec_control;
@@ -2722,7 +2719,8 @@ static int setup_vmcs_config(struct vmcs_config *vmcs_conf,
 	vmcs_conf->cpu_based_3rd_exec_ctrl = _cpu_based_3rd_exec_control;
 	vmcs_conf->vmexit_ctrl         = _vmexit_control;
 	vmcs_conf->vmentry_ctrl        = _vmentry_control;
-	vmcs_conf->misc	= misc_msr;
+
+	rdmsrl(MSR_IA32_VMX_MISC, vmcs_conf->misc);
 
 #if IS_ENABLED(CONFIG_HYPERV)
 	if (enlightened_vmcs)
-- 
2.40.1

[PATCH v2 2/2] KVM: VMX: Cleanup VMX misc information defines and usages

[Xin Li (Intel)]

From: Xin Li <xin3.li@intel.com>

Define VMX misc information fields with BIT_ULL()/GENMASK_ULL(), and move
VMX misc field macros to vmx.h if used in multiple files or where they are
used only once.

Signed-off-by: Xin Li <xin3.li@intel.com>
---
 arch/x86/include/asm/msr-index.h |  4 ----
 arch/x86/include/asm/vmx.h       | 10 ++++------
 arch/x86/kvm/vmx/capabilities.h  |  4 ++--
 arch/x86/kvm/vmx/nested.c        | 34 ++++++++++++++++++++++++--------
 arch/x86/kvm/vmx/nested.h        |  2 +-
 arch/x86/kvm/vmx/vmx.c           |  2 +-
 6 files changed, 34 insertions(+), 22 deletions(-)

diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index d83195f53e33..181366f1512c 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -1100,10 +1100,6 @@
 #define MSR_IA32_SMBA_BW_BASE		0xc0000280
 #define MSR_IA32_EVT_CFG_BASE		0xc0000400
 
-/* MSR_IA32_VMX_MISC bits */
-#define MSR_IA32_VMX_MISC_INTEL_PT                 (1ULL << 14)
-#define MSR_IA32_VMX_MISC_VMWRITE_SHADOW_RO_FIELDS (1ULL << 29)
-#define MSR_IA32_VMX_MISC_PREEMPTION_TIMER_SCALE   0x1F
 /* AMD-V MSRs */
 
 #define MSR_VM_CR                       0xc0010114
diff --git a/arch/x86/include/asm/vmx.h b/arch/x86/include/asm/vmx.h
index f919397900f1..6afda61429e6 100644
--- a/arch/x86/include/asm/vmx.h
+++ b/arch/x86/include/asm/vmx.h
@@ -126,12 +126,10 @@
 #define VMX_BASIC_INOUT				BIT_ULL(54)
 
 /* VMX_MISC bits and bitmasks */
-#define VMX_MISC_PREEMPTION_TIMER_RATE_MASK	0x0000001f
-#define VMX_MISC_SAVE_EFER_LMA			0x00000020
-#define VMX_MISC_ACTIVITY_HLT			0x00000040
-#define VMX_MISC_ACTIVITY_WAIT_SIPI		0x00000100
-#define VMX_MISC_ZERO_LEN_INS			0x40000000
-#define VMX_MISC_MSR_LIST_MULTIPLIER		512
+#define VMX_MISC_PREEMPTION_TIMER_RATE_MASK	GENMASK_ULL(4, 0)
+#define VMX_MISC_INTEL_PT			BIT_ULL(14)
+#define VMX_MISC_VMWRITE_SHADOW_RO_FIELDS	BIT_ULL(29)
+#define VMX_MISC_ZERO_LEN_INS			BIT_ULL(30)
 
 /* VMFUNC functions */
 #define VMFUNC_CONTROL_BIT(x)	BIT((VMX_FEATURE_##x & 0x1f) - 28)
diff --git a/arch/x86/kvm/vmx/capabilities.h b/arch/x86/kvm/vmx/capabilities.h
index 41a4533f9989..c88e33a13ae1 100644
--- a/arch/x86/kvm/vmx/capabilities.h
+++ b/arch/x86/kvm/vmx/capabilities.h
@@ -225,7 +225,7 @@ static inline bool cpu_has_vmx_vmfunc(void)
 static inline bool cpu_has_vmx_shadow_vmcs(void)
 {
 	/* check if the cpu supports writing r/o exit information fields */
-	if (!(vmcs_config.misc & MSR_IA32_VMX_MISC_VMWRITE_SHADOW_RO_FIELDS))
+	if (!(vmcs_config.misc & VMX_MISC_VMWRITE_SHADOW_RO_FIELDS))
 		return false;
 
 	return vmcs_config.cpu_based_2nd_exec_ctrl &
@@ -367,7 +367,7 @@ static inline bool cpu_has_vmx_invvpid_global(void)
 
 static inline bool cpu_has_vmx_intel_pt(void)
 {
-	return (vmcs_config.misc & MSR_IA32_VMX_MISC_INTEL_PT) &&
+	return (vmcs_config.misc & VMX_MISC_INTEL_PT) &&
 		(vmcs_config.cpu_based_2nd_exec_ctrl & SECONDARY_EXEC_PT_USE_GPA) &&
 		(vmcs_config.vmentry_ctrl & VM_ENTRY_LOAD_IA32_RTIT_CTL);
 }
diff --git a/arch/x86/kvm/vmx/nested.c b/arch/x86/kvm/vmx/nested.c
index 274d480d9071..40dd77c76565 100644
--- a/arch/x86/kvm/vmx/nested.c
+++ b/arch/x86/kvm/vmx/nested.c
@@ -886,6 +886,8 @@ static int nested_vmx_store_msr_check(struct kvm_vcpu *vcpu,
 	return 0;
 }
 
+#define VMX_MISC_MSR_LIST_MULTIPLIER	512
+
 static u32 nested_vmx_max_atomic_switch_msrs(struct kvm_vcpu *vcpu)
 {
 	struct vcpu_vmx *vmx = to_vmx(vcpu);
@@ -1295,18 +1297,34 @@ vmx_restore_control_msr(struct vcpu_vmx *vmx, u32 msr_index, u64 data)
 	return 0;
 }
 
+#define VMX_MISC_SAVE_EFER_LMA		BIT_ULL(5)
+#define VMX_MISC_ACTIVITY_STATE_BITMAP	GENMASK_ULL(8, 6)
+#define VMX_MISC_ACTIVITY_HLT		BIT_ULL(6)
+#define VMX_MISC_ACTIVITY_WAIT_SIPI	BIT_ULL(8)
+#define VMX_MISC_RDMSR_IN_SMM		BIT_ULL(15)
+#define VMX_MISC_VMXOFF_BLOCK_SMI	BIT_ULL(28)
+
+#define VMX_MISC_FEATURES_MASK			\
+	(VMX_MISC_SAVE_EFER_LMA |		\
+	 VMX_MISC_ACTIVITY_STATE_BITMAP |	\
+	 VMX_MISC_INTEL_PT |			\
+	 VMX_MISC_RDMSR_IN_SMM |		\
+	 VMX_MISC_VMXOFF_BLOCK_SMI |		\
+	 VMX_MISC_VMWRITE_SHADOW_RO_FIELDS |	\
+	 VMX_MISC_ZERO_LEN_INS)
+
+#define VMX_MISC_RESERVED_BITS			\
+	(BIT_ULL(31) | GENMASK_ULL(13, 9))
+
 static int vmx_restore_vmx_misc(struct vcpu_vmx *vmx, u64 data)
 {
-	const u64 feature_and_reserved_bits =
-		/* feature */
-		BIT_ULL(5) | GENMASK_ULL(8, 6) | BIT_ULL(14) | BIT_ULL(15) |
-		BIT_ULL(28) | BIT_ULL(29) | BIT_ULL(30) |
-		/* reserved */
-		GENMASK_ULL(13, 9) | BIT_ULL(31);
 	u64 vmx_misc = vmx_control_msr(vmcs_config.nested.misc_low,
 				       vmcs_config.nested.misc_high);
 
-	if (!is_bitwise_subset(vmx_misc, data, feature_and_reserved_bits))
+	static_assert(!(VMX_MISC_FEATURES_MASK & VMX_MISC_RESERVED_BITS));
+
+	if (!is_bitwise_subset(vmx_misc, data,
+			       VMX_MISC_FEATURES_MASK | VMX_MISC_RESERVED_BITS))
 		return -EINVAL;
 
 	if ((vmx->nested.msrs.pinbased_ctls_high &
@@ -6961,7 +6979,7 @@ static void nested_vmx_setup_misc_data(struct vmcs_config *vmcs_conf,
 {
 	msrs->misc_low = (u32)vmcs_conf->misc & VMX_MISC_SAVE_EFER_LMA;
 	msrs->misc_low |=
-		MSR_IA32_VMX_MISC_VMWRITE_SHADOW_RO_FIELDS |
+		VMX_MISC_VMWRITE_SHADOW_RO_FIELDS |
 		VMX_MISC_EMULATED_PREEMPTION_TIMER_RATE |
 		VMX_MISC_ACTIVITY_HLT |
 		VMX_MISC_ACTIVITY_WAIT_SIPI;
diff --git a/arch/x86/kvm/vmx/nested.h b/arch/x86/kvm/vmx/nested.h
index b4b9d51438c6..24ff4df509b6 100644
--- a/arch/x86/kvm/vmx/nested.h
+++ b/arch/x86/kvm/vmx/nested.h
@@ -108,7 +108,7 @@ static inline unsigned nested_cpu_vmx_misc_cr3_count(struct kvm_vcpu *vcpu)
 static inline bool nested_cpu_has_vmwrite_any_field(struct kvm_vcpu *vcpu)
 {
 	return to_vmx(vcpu)->nested.msrs.misc_low &
-		MSR_IA32_VMX_MISC_VMWRITE_SHADOW_RO_FIELDS;
+		VMX_MISC_VMWRITE_SHADOW_RO_FIELDS;
 }
 
 static inline bool nested_cpu_has_zero_length_injection(struct kvm_vcpu *vcpu)
diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
index b68d54f6e9f8..6bb96515185b 100644
--- a/arch/x86/kvm/vmx/vmx.c
+++ b/arch/x86/kvm/vmx/vmx.c
@@ -8602,7 +8602,7 @@ static __init int hardware_setup(void)
 		u64 use_timer_freq = 5000ULL * 1000 * 1000;
 
 		cpu_preemption_timer_multi =
-			vmcs_config.misc & VMX_MISC_PREEMPTION_TIMER_RATE_MASK;
+			vmx_misc_preemption_timer_rate(vmcs_config.misc);
 
 		if (tsc_khz)
 			use_timer_freq = (u64)tsc_khz * 1000;
-- 
2.40.1

Re: [PATCH v2 1/2] KVM: VMX: Cleanup VMX basic information defines and usages

[Xin Li]

On 10/26/2023 10:25 AM, Xin Li (Intel) wrote:
> From: Xin Li <xin3.li@intel.com>
> 
> Define VMX basic information fields with BIT_ULL()/GENMASK_ULL(), and
> replace hardcoded VMX basic numbers with these macros.
> 
> Per Sean's ask, read MSR_IA32_VMX_BASIC into an u64 to get rid of the
> hi/lo crud.
> 
> Tested-by: Shan Kang <shan.kang@intel.com>
> Signed-off-by: Xin Li <xin3.li@intel.com>
> ---
> 
> Changes since v1:
> * Don't add field shift macros unless it's really needed, extra layer
>    of indirect makes it harder to read (Sean Christopherson).
> * Add a static_assert() to ensure that VMX_BASIC_FEATURES_MASK doesn't
>    overlap with VMX_BASIC_RESERVED_BITS (Sean Christopherson).
> * read MSR_IA32_VMX_BASIC into an u64 rather than 2 u32 (Sean
>    Christopherson).
> * Add 2 new functions for extracting fields from VMX basic (Sean
>    Christopherson).
> * Drop the tools header update (Sean Christopherson).
> * Move VMX basic field macros to arch/x86/include/asm/vmx.h.
> ---
>   arch/x86/include/asm/msr-index.h |  9 ---------
>   arch/x86/include/asm/vmx.h       | 16 ++++++++++++++++
>   arch/x86/kvm/vmx/nested.c        | 25 ++++++++++++++++++-------
>   arch/x86/kvm/vmx/vmx.c           | 22 ++++++++++------------
>   4 files changed, 44 insertions(+), 28 deletions(-)

Sigh, forgot to add "--base=HEAD~2".

This is based on commit c076acf10c78c0d7e1aa50670e9cc4c91e8d59b4 of the 
'next' branch in the kvm-x86 tree.

Thanks!
     Xin

Re: [PATCH v2 1/2] KVM: VMX: Cleanup VMX basic information defines and usages

[Huang, Kai]

>  
> +/* VMX_BASIC bits and bitmasks */
> +#define VMX_BASIC_32BIT_PHYS_ADDR_ONLY		BIT_ULL(48)
> +#define VMX_BASIC_MEM_TYPE_WB			6LLU

Strictly speaking, VMX_BASIC_MEM_TYPE_MB isn't any bit definition or bitmasks of
VMX_BASIC MSR.  So perhaps better to put it somewhere under separately.
 
> +#define VMX_BASIC_INOUT				BIT_ULL(54)
> +
> +/* VMX_MISC bits and bitmasks */

Your next patch is to "Cleanup VMX misc information defines and usages", so I
guess it's better to move any VMX_MISC related change to that patch.

>  #define VMX_MISC_PREEMPTION_TIMER_RATE_MASK	0x0000001f
>  #define VMX_MISC_SAVE_EFER_LMA			0x00000020
>  #define VMX_MISC_ACTIVITY_HLT			0x00000040
> @@ -143,6 +149,16 @@ static inline u32 vmx_basic_vmcs_size(u64 vmx_basic)
>  	return (vmx_basic & GENMASK_ULL(44, 32)) >> 32;
>  }
>  
> +static inline u32 vmx_basic_vmcs_basic_cap(u64 vmx_basic)
> +{
> +	return (vmx_basic & GENMASK_ULL(63, 45)) >> 32;
> +}
> +
> +static inline u32 vmx_basic_vmcs_mem_type(u64 vmx_basic)
> +{
> +	return (vmx_basic & GENMASK_ULL(53, 50)) >> 50;
> +}
> +
>  static inline int vmx_misc_preemption_timer_rate(u64 vmx_misc)
>  {
>  	return vmx_misc & VMX_MISC_PREEMPTION_TIMER_RATE_MASK;
> diff --git a/arch/x86/kvm/vmx/nested.c b/arch/x86/kvm/vmx/nested.c
> index 4ba46e1b29d2..274d480d9071 100644
> --- a/arch/x86/kvm/vmx/nested.c
> +++ b/arch/x86/kvm/vmx/nested.c
> @@ -1201,23 +1201,34 @@ static bool is_bitwise_subset(u64 superset, u64 subset, u64 mask)
>  	return (superset | subset) == superset;
>  }
>  
> +#define VMX_BASIC_VMCS_SIZE_SHIFT		32
> +#define VMX_BASIC_DUAL_MONITOR_TREATMENT	BIT_ULL(49)
> +#define VMX_BASIC_MEM_TYPE_SHIFT		50
> +#define VMX_BASIC_TRUE_CTLS			BIT_ULL(55)

If I am reading correctly, the two "*_SHIFT" above are not used?  The above
vmx_basic_vmcs_mem_type() and vmx_basic_vmcs_basic_cap() use hard-coded values
directly.

And How about moving all these bit/mask definitions to <asm/vmx.h> above?

It's better they stay together for better readability.

> +
> +#define VMX_BASIC_FEATURES_MASK			\
> +	(VMX_BASIC_DUAL_MONITOR_TREATMENT |	\
> +	 VMX_BASIC_INOUT |			\
> +	 VMX_BASIC_TRUE_CTLS)
> +
> +#define VMX_BASIC_RESERVED_BITS			\
> +	(GENMASK_ULL(63, 56) | GENMASK_ULL(47, 45) | BIT_ULL(31))
> +

Also move these to <asm/vmx.h>?

>  static int vmx_restore_vmx_basic(struct vcpu_vmx *vmx, u64 data)
>  {
> -	const u64 feature_and_reserved =
> -		/* feature (except bit 48; see below) */
> -		BIT_ULL(49) | BIT_ULL(54) | BIT_ULL(55) |
> -		/* reserved */
> -		BIT_ULL(31) | GENMASK_ULL(47, 45) | GENMASK_ULL(63, 56);
>  	u64 vmx_basic = vmcs_config.nested.basic;
>  
> -	if (!is_bitwise_subset(vmx_basic, data, feature_and_reserved))
> +	static_assert(!(VMX_BASIC_FEATURES_MASK & VMX_BASIC_RESERVED_BITS));
> +
> +	if (!is_bitwise_subset(vmx_basic, data,
> +			       VMX_BASIC_FEATURES_MASK | VMX_BASIC_RESERVED_BITS))
>  		return -EINVAL;
>  
>  	/*
>  	 * KVM does not emulate a version of VMX that constrains physical
>  	 * addresses of VMX structures (e.g. VMCS) to 32-bits.
>  	 */
> -	if (data & BIT_ULL(48))
> +	if (data & VMX_BASIC_32BIT_PHYS_ADDR_ONLY)
>  		return -EINVAL;
>  
>  	if (vmx_basic_vmcs_revision_id(vmx_basic) !=
> diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
> index 4c3a70f26b42..b68d54f6e9f8 100644
> --- a/arch/x86/kvm/vmx/vmx.c
> +++ b/arch/x86/kvm/vmx/vmx.c
> @@ -2568,14 +2568,13 @@ static u64 adjust_vmx_controls64(u64 ctl_opt, u32 msr)
>  static int setup_vmcs_config(struct vmcs_config *vmcs_conf,
>  			     struct vmx_capability *vmx_cap)
>  {
> -	u32 vmx_msr_low, vmx_msr_high;
>  	u32 _pin_based_exec_control = 0;
>  	u32 _cpu_based_exec_control = 0;
>  	u32 _cpu_based_2nd_exec_control = 0;
>  	u64 _cpu_based_3rd_exec_control = 0;
>  	u32 _vmexit_control = 0;
>  	u32 _vmentry_control = 0;
> -	u64 misc_msr;
> +	u64 vmx_basic;
>  	int i;
>  
>  	/*
> @@ -2693,28 +2692,26 @@ static int setup_vmcs_config(struct vmcs_config *vmcs_conf,
>  		_vmexit_control &= ~x_ctrl;
>  	}
>  
> -	rdmsr(MSR_IA32_VMX_BASIC, vmx_msr_low, vmx_msr_high);
> +	rdmsrl(MSR_IA32_VMX_BASIC, vmx_basic);
>  
>  	/* IA-32 SDM Vol 3B: VMCS size is never greater than 4kB. */
> -	if ((vmx_msr_high & 0x1fff) > PAGE_SIZE)
> +	if ((vmx_basic_vmcs_size(vmx_basic) > PAGE_SIZE))
>  		return -EIO;
>  
>  #ifdef CONFIG_X86_64
>  	/* IA-32 SDM Vol 3B: 64-bit CPUs always have VMX_BASIC_MSR[48]==0. */
> -	if (vmx_msr_high & (1u<<16))
> +	if (vmx_basic & VMX_BASIC_32BIT_PHYS_ADDR_ONLY)
>  		return -EIO;
>  #endif
>  
>  	/* Require Write-Back (WB) memory type for VMCS accesses. */
> -	if (((vmx_msr_high >> 18) & 15) != 6)
> +	if (vmx_basic_vmcs_mem_type(vmx_basic) != VMX_BASIC_MEM_TYPE_WB)
>  		return -EIO;
>  
> -	rdmsrl(MSR_IA32_VMX_MISC, misc_msr);
> -
> -	vmcs_conf->size = vmx_msr_high & 0x1fff;
> -	vmcs_conf->basic_cap = vmx_msr_high & ~0x1fff;
> +	vmcs_conf->size = vmx_basic_vmcs_size(vmx_basic);
> +	vmcs_conf->basic_cap = vmx_basic_vmcs_basic_cap(vmx_basic);
>  
> -	vmcs_conf->revision_id = vmx_msr_low;
> +	vmcs_conf->revision_id = vmx_basic_vmcs_revision_id(vmx_basic);

I actually tried to do similar thing before, and Sean gave me below advice:

	Rather than do all of these weird dances, what about saving the
full/raw
	MSR in the config, and then using the helpers to extract info as
needed? 

https://lkml.kernel.org/kvm/20230330092149.101047-1-kai.huang@intel.com/T/#m4879a3c7e66ede7bfa568a25aea4f6e3778e6e34

I agreed, but I has been too lazy to do this, sorry :-)

So maybe we should still go with this approach?

>  
>  	vmcs_conf->pin_based_exec_ctrl = _pin_based_exec_control;
>  	vmcs_conf->cpu_based_exec_ctrl = _cpu_based_exec_control;
> @@ -2722,7 +2719,8 @@ static int setup_vmcs_config(struct vmcs_config *vmcs_conf,
>  	vmcs_conf->cpu_based_3rd_exec_ctrl = _cpu_based_3rd_exec_control;
>  	vmcs_conf->vmexit_ctrl         = _vmexit_control;
>  	vmcs_conf->vmentry_ctrl        = _vmentry_control;
> -	vmcs_conf->misc	= misc_msr;
> +
> +	rdmsrl(MSR_IA32_VMX_MISC, vmcs_conf->misc);

Better to move VMX_MISC code to next patch I suppose.

Re: [PATCH v2 1/2] KVM: VMX: Cleanup VMX basic information defines and usages

[Xin Li]

On 10/27/2023 2:29 AM, Huang, Kai wrote:
> 
>>   
>> +/* VMX_BASIC bits and bitmasks */
>> +#define VMX_BASIC_32BIT_PHYS_ADDR_ONLY		BIT_ULL(48)
>> +#define VMX_BASIC_MEM_TYPE_WB			6LLU
> 
> Strictly speaking, VMX_BASIC_MEM_TYPE_MB isn't any bit definition or bitmasks of
> VMX_BASIC MSR.  So perhaps better to put it somewhere under separately.

Actually you reminded me that the memory type WB is architectural on
x86, but I can't find it defined in a common x86 header.

We also have:
#define VMX_EPTP_MT_WB                               0x6ull
which is simply redundant if we have a common definition MEMTYPE_WB.


>   
>> +#define VMX_BASIC_INOUT				BIT_ULL(54)
>> +
>> +/* VMX_MISC bits and bitmasks */
> 
> Your next patch is to "Cleanup VMX misc information defines and usages", so I
> guess it's better to move any VMX_MISC related change to that patch.

ah, you're right.

> 
>>   #define VMX_MISC_PREEMPTION_TIMER_RATE_MASK	0x0000001f
>>   #define VMX_MISC_SAVE_EFER_LMA			0x00000020
>>   #define VMX_MISC_ACTIVITY_HLT			0x00000040
>> @@ -143,6 +149,16 @@ static inline u32 vmx_basic_vmcs_size(u64 vmx_basic)
>>   	return (vmx_basic & GENMASK_ULL(44, 32)) >> 32;
>>   }
>>   
>> +static inline u32 vmx_basic_vmcs_basic_cap(u64 vmx_basic)
>> +{
>> +	return (vmx_basic & GENMASK_ULL(63, 45)) >> 32;
>> +}
>> +
>> +static inline u32 vmx_basic_vmcs_mem_type(u64 vmx_basic)
>> +{
>> +	return (vmx_basic & GENMASK_ULL(53, 50)) >> 50;
>> +}
>> +
>>   static inline int vmx_misc_preemption_timer_rate(u64 vmx_misc)
>>   {
>>   	return vmx_misc & VMX_MISC_PREEMPTION_TIMER_RATE_MASK;
>> diff --git a/arch/x86/kvm/vmx/nested.c b/arch/x86/kvm/vmx/nested.c
>> index 4ba46e1b29d2..274d480d9071 100644
>> --- a/arch/x86/kvm/vmx/nested.c
>> +++ b/arch/x86/kvm/vmx/nested.c
>> @@ -1201,23 +1201,34 @@ static bool is_bitwise_subset(u64 superset, u64 subset, u64 mask)
>>   	return (superset | subset) == superset;
>>   }
>>   
>> +#define VMX_BASIC_VMCS_SIZE_SHIFT		32
>> +#define VMX_BASIC_DUAL_MONITOR_TREATMENT	BIT_ULL(49)
>> +#define VMX_BASIC_MEM_TYPE_SHIFT		50
>> +#define VMX_BASIC_TRUE_CTLS			BIT_ULL(55)
> 
> If I am reading correctly, the two "*_SHIFT" above are not used?  The above
> vmx_basic_vmcs_mem_type() and vmx_basic_vmcs_basic_cap() use hard-coded values
> directly.

The 2 shift macros are needed in arch/x86/kvm/vmx/nested.c.

> 
> And How about moving all these bit/mask definitions to <asm/vmx.h> above?
> 
> It's better they stay together for better readability.

Sean kind of prefers to keep the macros close to code that uses it,
unless they are used somewhere else.

> 
>> +
>> +#define VMX_BASIC_FEATURES_MASK			\
>> +	(VMX_BASIC_DUAL_MONITOR_TREATMENT |	\
>> +	 VMX_BASIC_INOUT |			\
>> +	 VMX_BASIC_TRUE_CTLS)
>> +
>> +#define VMX_BASIC_RESERVED_BITS			\
>> +	(GENMASK_ULL(63, 56) | GENMASK_ULL(47, 45) | BIT_ULL(31))
>> +
> 
> Also move these to <asm/vmx.h>?
> 
>>   static int vmx_restore_vmx_basic(struct vcpu_vmx *vmx, u64 data)
>>   {
>> -	const u64 feature_and_reserved =
>> -		/* feature (except bit 48; see below) */
>> -		BIT_ULL(49) | BIT_ULL(54) | BIT_ULL(55) |
>> -		/* reserved */
>> -		BIT_ULL(31) | GENMASK_ULL(47, 45) | GENMASK_ULL(63, 56);
>>   	u64 vmx_basic = vmcs_config.nested.basic;
>>   
>> -	if (!is_bitwise_subset(vmx_basic, data, feature_and_reserved))
>> +	static_assert(!(VMX_BASIC_FEATURES_MASK & VMX_BASIC_RESERVED_BITS));
>> +
>> +	if (!is_bitwise_subset(vmx_basic, data,
>> +			       VMX_BASIC_FEATURES_MASK | VMX_BASIC_RESERVED_BITS))
>>   		return -EINVAL;
>>   
>>   	/*
>>   	 * KVM does not emulate a version of VMX that constrains physical
>>   	 * addresses of VMX structures (e.g. VMCS) to 32-bits.
>>   	 */
>> -	if (data & BIT_ULL(48))
>> +	if (data & VMX_BASIC_32BIT_PHYS_ADDR_ONLY)
>>   		return -EINVAL;
>>   
>>   	if (vmx_basic_vmcs_revision_id(vmx_basic) !=
>> diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
>> index 4c3a70f26b42..b68d54f6e9f8 100644
>> --- a/arch/x86/kvm/vmx/vmx.c
>> +++ b/arch/x86/kvm/vmx/vmx.c
>> @@ -2568,14 +2568,13 @@ static u64 adjust_vmx_controls64(u64 ctl_opt, u32 msr)
>>   static int setup_vmcs_config(struct vmcs_config *vmcs_conf,
>>   			     struct vmx_capability *vmx_cap)
>>   {
>> -	u32 vmx_msr_low, vmx_msr_high;
>>   	u32 _pin_based_exec_control = 0;
>>   	u32 _cpu_based_exec_control = 0;
>>   	u32 _cpu_based_2nd_exec_control = 0;
>>   	u64 _cpu_based_3rd_exec_control = 0;
>>   	u32 _vmexit_control = 0;
>>   	u32 _vmentry_control = 0;
>> -	u64 misc_msr;
>> +	u64 vmx_basic;
>>   	int i;
>>   
>>   	/*
>> @@ -2693,28 +2692,26 @@ static int setup_vmcs_config(struct vmcs_config *vmcs_conf,
>>   		_vmexit_control &= ~x_ctrl;
>>   	}
>>   
>> -	rdmsr(MSR_IA32_VMX_BASIC, vmx_msr_low, vmx_msr_high);
>> +	rdmsrl(MSR_IA32_VMX_BASIC, vmx_basic);
>>   
>>   	/* IA-32 SDM Vol 3B: VMCS size is never greater than 4kB. */
>> -	if ((vmx_msr_high & 0x1fff) > PAGE_SIZE)
>> +	if ((vmx_basic_vmcs_size(vmx_basic) > PAGE_SIZE))
>>   		return -EIO;
>>   
>>   #ifdef CONFIG_X86_64
>>   	/* IA-32 SDM Vol 3B: 64-bit CPUs always have VMX_BASIC_MSR[48]==0. */
>> -	if (vmx_msr_high & (1u<<16))
>> +	if (vmx_basic & VMX_BASIC_32BIT_PHYS_ADDR_ONLY)
>>   		return -EIO;
>>   #endif
>>   
>>   	/* Require Write-Back (WB) memory type for VMCS accesses. */
>> -	if (((vmx_msr_high >> 18) & 15) != 6)
>> +	if (vmx_basic_vmcs_mem_type(vmx_basic) != VMX_BASIC_MEM_TYPE_WB)
>>   		return -EIO;
>>   
>> -	rdmsrl(MSR_IA32_VMX_MISC, misc_msr);
>> -
>> -	vmcs_conf->size = vmx_msr_high & 0x1fff;
>> -	vmcs_conf->basic_cap = vmx_msr_high & ~0x1fff;
>> +	vmcs_conf->size = vmx_basic_vmcs_size(vmx_basic);
>> +	vmcs_conf->basic_cap = vmx_basic_vmcs_basic_cap(vmx_basic);
>>   
>> -	vmcs_conf->revision_id = vmx_msr_low;
>> +	vmcs_conf->revision_id = vmx_basic_vmcs_revision_id(vmx_basic);
> 
> I actually tried to do similar thing before, and Sean gave me below advice:
> 
> 	Rather than do all of these weird dances, what about saving the
> full/raw
> 	MSR in the config, and then using the helpers to extract info as
> needed?
> 
> https://lkml.kernel.org/kvm/20230330092149.101047-1-kai.huang@intel.com/T/#m4879a3c7e66ede7bfa568a25aea4f6e3778e6e34
> 
> I agreed, but I has been too lazy to do this, sorry :-)
> 
> So maybe we should still go with this approach?

Yes, this looks more consistent.

> 
>>   
>>   	vmcs_conf->pin_based_exec_ctrl = _pin_based_exec_control;
>>   	vmcs_conf->cpu_based_exec_ctrl = _cpu_based_exec_control;
>> @@ -2722,7 +2719,8 @@ static int setup_vmcs_config(struct vmcs_config *vmcs_conf,
>>   	vmcs_conf->cpu_based_3rd_exec_ctrl = _cpu_based_3rd_exec_control;
>>   	vmcs_conf->vmexit_ctrl         = _vmexit_control;
>>   	vmcs_conf->vmentry_ctrl        = _vmentry_control;
>> -	vmcs_conf->misc	= misc_msr;
>> +
>> +	rdmsrl(MSR_IA32_VMX_MISC, vmcs_conf->misc);
> 
> Better to move VMX_MISC code to next patch I suppose.

I view it a bit different, but maybe your suggestion is better.

> 

Thanks!
     Xin