Re: [RFC] SCTLR_EL1.TIDCP toggling for performance

["Kristina Martšenko" <kristina.martsenko@arm.com>]

Hi Chang,

On 18/07/2025 03:32, Liao, Chang wrote:
> Hi, Kristina
> 
> I've reviewed your patch [1] for FEAT_TIDCP1 support, which by default traps EL0
> accesses to implementation-defined system registers and instructions at EL1/EL2.
> 
> Do you have any plans to add support for toggling the SCTLR_EL1.TIDCP1 bit? I'm
> encountering performance degradation on CPU where certain implementation-defined
> registers and instructions are designed for EL0 performance use. The trapping
> overhead is substantial enough to compromise any benefits, and it's even worse
> in virtualization. Therefore, I'm hoping there's a way to clear the SCTLR_EL1.TIDCP1
> bit on such platforms, perhaps via a kernel config option or command-line parameter.
> Alternatively, do you have a better solution for gracefully toggling this bit on
> and off?
> 
> Thanks
> 
> [1] https://lore.kernel.org/linux-arm-kernel/Yrw3NWkH6D0CgRsF@sirena.org.uk/T/#m5cfdb27b48d9d7e30db73e991fc6c232ba8a7349

I don't have any plans to add support for toggling it. You could try sending a
patch for a Kconfig option or kernel command-line parameter. I'm not really
sure what the maintainers' view on supporting IMP-DEF features is.

Thanks,
Kristina