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From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
To: Xilin Wu <sophon@radxa.com>,
	Bjorn Andersson <andersson@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>
Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH RFC] clk: qcom: gcc-sc7280: switch GP clocks to clk_rcg2_gp_ops
Date: Tue, 7 Apr 2026 15:29:44 +0200	[thread overview]
Message-ID: <4be1efbe-ec76-458d-9abf-c24b80a6da4b@oss.qualcomm.com> (raw)
In-Reply-To: <20260407-gcc-gpclk-sc7280-v1-1-2445c2f7a539@radxa.com>

On 4/6/26 6:00 PM, Xilin Wu wrote:
> The GP1/GP2/GP3 clock sources are general-purpose timer/PWM clocks
> that require runtime-computed MND divider values and duty cycle
> control. They are currently using clk_rcg2_ops with a frequency table
> containing only a few fixed entries (50/100/200 MHz), which:
> 
> - Cannot produce arbitrary frequencies needed for PWM periods
> - Bypasses the MND divider (m=0, n=0), making duty cycle control
>   impossible (MND is in bypass mode, set_duty_cycle returns -EINVAL)
> 
> Switch to clk_rcg2_gp_ops which uses clk_rcg2_calc_mnd() to
> dynamically compute optimal M/N/pre_div values from any requested
> frequency, and empty the frequency table since it is not used by the
> GP ops path.
> 
> Signed-off-by: Xilin Wu <sophon@radxa.com>
> ---
> Sending this as RFC, because I'm not sure if all other gcc drivers require
> the same change.

Possibly!

It's only been introduced recently, so it may be that we do a mass update

However

The introductory commit notes:

 Limitations:
	- The driver doesn't select a parent clock (it may be selected by client
	in device tree with assigned-clocks, assigned-clock-parents properties)

which could potentially break some existing users that rely on the clock
provider to do it..

> ---
>  drivers/clk/qcom/gcc-sc7280.c | 9 +++------
>  1 file changed, 3 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/clk/qcom/gcc-sc7280.c b/drivers/clk/qcom/gcc-sc7280.c
> index 4502926a2691..e7748c468721 100644
> --- a/drivers/clk/qcom/gcc-sc7280.c
> +++ b/drivers/clk/qcom/gcc-sc7280.c
> @@ -457,9 +457,6 @@ static struct clk_regmap_mux gcc_usb3_sec_phy_pipe_clk_src = {
>  };
>  
>  static const struct freq_tbl ftbl_gcc_gp1_clk_src[] = {
> -	F(50000000, P_GCC_GPLL0_OUT_EVEN, 6, 0, 0),
> -	F(100000000, P_GCC_GPLL0_OUT_EVEN, 3, 0, 0),
> -	F(200000000, P_GCC_GPLL0_OUT_ODD, 1, 0, 0),
>  	{ }
>  };

I don't think any of the rcg2_gp ops use the frequency table, you
should be able to simply remove it

Konrad

      reply	other threads:[~2026-04-07 13:29 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-04-06 16:00 Xilin Wu
2026-04-07 13:29 ` Konrad Dybcio [this message]

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