From: "Liang, Kan" <kan.liang@linux.intel.com>
To: Dave Hansen <dave.hansen@intel.com>,
tony.luck@intel.com, peterz@infradead.org,
dave.hansen@linux.intel.com, tglx@linutronix.de,
mingo@redhat.com, bp@alien8.de, hpa@zytor.com, x86@kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [RFC PATCH] x86/cpu: Update Intel model naming rule
Date: Tue, 6 Jun 2023 14:08:19 -0400 [thread overview]
Message-ID: <4c2c7c64-a956-ab2b-eaac-b800333ee177@linux.intel.com> (raw)
In-Reply-To: <84292c84-6f12-2df5-dc4c-3a7abc6659ea@intel.com>
On 2023-06-06 1:28 p.m., Dave Hansen wrote:
> On 6/6/23 10:02, kan.liang@linux.intel.com wrote:
>> * MICROARCH Is the code name for the micro-architecture for this core.
>> * N.B. Not the platform name.
>> + * PROCESSOR Is the code name for the processor
>
> I think we should refine the definition of "MICROARCH" here. We want it
> to refer to the combination of cores, not just "this core".
>
> ALDERLAKE is a fine name to refer to a processor that has a mix of
> "Golden Cove / Gracemont" cores. Let's just have it say:
>
> * MICROARCH Is the code name for the collection of micro-
> architectures for this processor. N.B. Not the
> platform name.
>
OK. It should address the issue for hybrid.
But for the non-hybrid, it may not work by only redefining the
"MICROARCH". They usually have different code name for microarchitecture
and processor. For example, the Sapphire Rapids should be the code name
of the processor, while the Golden Cove is the code name of the
microarchitecture.
The other option is to still only use the microarch name. Then we have
to change all the big core names at least since Ice Lake and the latest
Atom names. All the names below will be changed. We also need to change
all the places where using them. It could be a big change.
#define INTEL_FAM6_ICELAKE_X 0x6A /* Sunny Cove */
#define INTEL_FAM6_ICELAKE_D 0x6C /* Sunny Cove */
#define INTEL_FAM6_ICELAKE 0x7D /* Sunny Cove */
#define INTEL_FAM6_ICELAKE_L 0x7E /* Sunny Cove */
#define INTEL_FAM6_ICELAKE_NNPI 0x9D /* Sunny Cove */
#define INTEL_FAM6_ROCKETLAKE 0xA7 /* Cypress Cove */
#define INTEL_FAM6_TIGERLAKE_L 0x8C /* Willow Cove */
#define INTEL_FAM6_TIGERLAKE 0x8D /* Willow Cove */
#define INTEL_FAM6_SAPPHIRERAPIDS_X 0x8F /* Golden Cove */
#define INTEL_FAM6_EMERALDRAPIDS_X 0xCF
#define INTEL_FAM6_GRANITERAPIDS_X 0xAD
#define INTEL_FAM6_GRANITERAPIDS_D 0xAE
#define INTEL_FAM6_SIERRAFOREST_X 0xAF
#define INTEL_FAM6_GRANDRIDGE 0xB6
Thanks,
Kan
prev parent reply other threads:[~2023-06-06 18:08 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-06 17:02 kan.liang
2023-06-06 17:28 ` Dave Hansen
2023-06-06 18:08 ` Liang, Kan [this message]
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