From: Dave Hansen <dave.hansen@intel.com>
To: kan.liang@linux.intel.com, tony.luck@intel.com,
peterz@infradead.org, dave.hansen@linux.intel.com,
tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
hpa@zytor.com, x86@kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [RFC PATCH] x86/cpu: Update Intel model naming rule
Date: Tue, 6 Jun 2023 10:28:40 -0700 [thread overview]
Message-ID: <84292c84-6f12-2df5-dc4c-3a7abc6659ea@intel.com> (raw)
In-Reply-To: <20230606170257.3213720-1-kan.liang@linux.intel.com>
On 6/6/23 10:02, kan.liang@linux.intel.com wrote:
> * MICROARCH Is the code name for the micro-architecture for this core.
> * N.B. Not the platform name.
> + * PROCESSOR Is the code name for the processor
I think we should refine the definition of "MICROARCH" here. We want it
to refer to the combination of cores, not just "this core".
ALDERLAKE is a fine name to refer to a processor that has a mix of
"Golden Cove / Gracemont" cores. Let's just have it say:
* MICROARCH Is the code name for the collection of micro-
architectures for this processor. N.B. Not the
platform name.
next prev parent reply other threads:[~2023-06-06 17:30 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-06 17:02 kan.liang
2023-06-06 17:28 ` Dave Hansen [this message]
2023-06-06 18:08 ` Liang, Kan
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