mirror of https://lore.kernel.org/lkml/
 help / color / mirror / Atom feed
* [PATCH] irqchip:Correct the offset value of interrupt status register
@ 2024-01-05 13:42 Xiaochuan Mao
  2024-01-06 15:35 ` Jiaxun Yang
  0 siblings, 1 reply; 2+ messages in thread
From: Xiaochuan Mao @ 2024-01-05 13:42 UTC (permalink / raw)
  To: Huacai Chen, Jiaxun Yang, Thomas Gleixner, linux-mips,
	linux-kernel, maoxiaochuan

from 2k500/2k1000 mannual known that the offset value between
the interrupt status register and the interrupt entry register
is 0x20.

Signed-off-by: Xiaochuan Mao <maoxiaochuan@loongson.cn>
---
 drivers/irqchip/irq-loongson-liointc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/irqchip/irq-loongson-liointc.c b/drivers/irqchip/irq-loongson-liointc.c
index e4b33aed1c97..417b4c91ca67 100644
--- a/drivers/irqchip/irq-loongson-liointc.c
+++ b/drivers/irqchip/irq-loongson-liointc.c
@@ -28,7 +28,7 @@
 
 #define LIOINTC_INTC_CHIP_START	0x20
 
-#define LIOINTC_REG_INTC_STATUS	(LIOINTC_INTC_CHIP_START + 0x20)
+#define LIOINTC_REG_INTC_STATUS	(LIOINTC_INTC_CHIP_START)
 #define LIOINTC_REG_INTC_EN_STATUS	(LIOINTC_INTC_CHIP_START + 0x04)
 #define LIOINTC_REG_INTC_ENABLE	(LIOINTC_INTC_CHIP_START + 0x08)
 #define LIOINTC_REG_INTC_DISABLE	(LIOINTC_INTC_CHIP_START + 0x0c)
-- 
2.17.1


^ permalink raw reply	[flat|nested] 2+ messages in thread

end of thread, other threads:[~2024-01-06 15:36 UTC | newest]

Thread overview: 2+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2024-01-05 13:42 [PATCH] irqchip:Correct the offset value of interrupt status register Xiaochuan Mao
2024-01-06 15:35 ` Jiaxun Yang

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox

all inboxes | Powered by JetHome®